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1. 发明授权

US07265004B2 Electronic devices including a semiconductor layer and a process for forming the same 有权
标题翻译：包括半导体层的电子器件及其形成方法
公开(公告)号：US07265004B2
公开(公告)日：2007-09-04
申请号：US11273092
申请日：2005-11-14
申请人： Voon-Yew Thean , Brian J. Goolsby , Linda B. McCormick , Bich-Yen Nguyen , Colita M. Parker , Mariam G. Sadaka , Victor H. Vartanian , Ted R. White , Melissa O. Zavala
发明人： Voon-Yew Thean , Brian J. Goolsby , Linda B. McCormick , Bich-Yen Nguyen , Colita M. Parker , Mariam G. Sadaka , Victor H. Vartanian , Ted R. White , Melissa O. Zavala
IPC分类号： H01L21/84
CPC分类号： H01L21/84 , H01L21/823807 , H01L21/823842 , H01L21/823857 , H01L21/823878 , H01L27/1203
摘要： An electronic device can include a first semiconductor portion and a second semiconductor portion, wherein the compositions of the first and second semiconductor portions are different from each other. In one embodiment, the first and second semiconductor portions can have different stresses compared to each other. In one embodiment, the electronic device may be formed by forming an oxidation mask over the first semiconductor portion. A second semiconductor layer can be formed over the second semiconductor portion of the first semiconductor layer and have a different composition compared to the first semiconductor layer. An oxidation can be performed, and a concentration of a semiconductor element (e.g., germanium) within the second portion of the first semiconductor layer can be increased. In another embodiment, a selective condensation may be performed, and a field isolation region can be formed between the first and second portions of the first semiconductor layer.
摘要翻译：电子设备可以包括第一半导体部分和第二半导体部分，其中第一半导体部分和第二半导体部分的组成彼此不同。在一个实施例中，第一和第二半导体部分可以具有彼此不同的应力。在一个实施例中，可以通过在第一半导体部分上形成氧化掩模来形成电子器件。可以在第一半导体层的第二半导体部分上形成第二半导体层，并且与第一半导体层相比具有不同的组成。可以进行氧化，并且可以增加第一半导体层的第二部分内的半导体元素（例如锗）的浓度。在另一个实施例中，可以执行选择性冷凝，并且可以在第一半导体层的第一和第二部分之间形成场隔离区。

2. 发明授权

US07737496B2 Electronic devices including a semiconductor layer 有权
公开(公告)号：US07737496B2
公开(公告)日：2010-06-15
申请号：US11836844
申请日：2007-08-10
申请人： Voon-Yew Thean , Brian J. Goolsby , Linda B. McCormick , Bich-Yen Nguyen , Colita M. Parker , Mariam G. Sadaka , Victor H. Vartanian , Ted R. White , Melissa O. Zavala
发明人： Voon-Yew Thean , Brian J. Goolsby , Linda B. McCormick , Bich-Yen Nguyen , Colita M. Parker , Mariam G. Sadaka , Victor H. Vartanian , Ted R. White , Melissa O. Zavala
IPC分类号： H01L21/84
摘要： An electronic device can include a first semiconductor portion and a second semiconductor portion, wherein the compositions of the first and second semiconductor portions are different from each other. In one embodiment, the first and second semiconductor portions can have different stresses compared to each other. In one embodiment, the electronic device may be formed by forming an oxidation mask over the first semiconductor portion. A second semiconductor layer can be formed over the second semiconductor portion of the first semiconductor layer and have a different composition compared to the first semiconductor layer. An oxidation can be performed, and a concentration of a semiconductor element (e.g., germanium) within the second portion of the first semiconductor layer can be increased. In another embodiment, a selective condensation may be performed, and a field isolation region can be formed between the first and second portions of the first semiconductor layer.

3. 发明授权

US07821067B2 Electronic devices including a semiconductor layer 有权
标题翻译：包括半导体层的电子器件
公开(公告)号：US07821067B2
公开(公告)日：2010-10-26
申请号：US11836844
申请日：2007-08-10
申请人： Voon-Yew Thean , Brian J. Goolsby , Linda B. McCormick , Bich-Yen Nguyen , Colita M. Parker , Mariam G. Sadaka , Victor H. Vartanian , Ted R. White , Melissa O. Zavala
发明人： Voon-Yew Thean , Brian J. Goolsby , Linda B. McCormick , Bich-Yen Nguyen , Colita M. Parker , Mariam G. Sadaka , Victor H. Vartanian , Ted R. White , Melissa O. Zavala
IPC分类号： H01L21/84
CPC分类号： H01L21/84 , H01L21/823807 , H01L21/823842 , H01L21/823857 , H01L21/823878 , H01L27/1203
摘要： An electronic device can include a first semiconductor portion and a second semiconductor portion, wherein the compositions of the first and second semiconductor portions are different from each other. In one embodiment, the first and second semiconductor portions can have different stresses compared to each other. In one embodiment, the electronic device may be formed by forming an oxidation mask over the first semiconductor portion. A second semiconductor layer can be formed over the second semiconductor portion of the first semiconductor layer and have a different composition compared to the first semiconductor layer. An oxidation can be performed, and a concentration of a semiconductor element (e.g., germanium) within the second portion of the first semiconductor layer can be increased. In another embodiment, a selective condensation may be performed, and a field isolation region can be formed between the first and second portions of the first semiconductor layer.
摘要翻译：电子设备可以包括第一半导体部分和第二半导体部分，其中第一半导体部分和第二半导体部分的组成彼此不同。在一个实施例中，第一和第二半导体部分可以具有彼此不同的应力。在一个实施例中，可以通过在第一半导体部分上形成氧化掩模来形成电子器件。可以在第一半导体层的第二半导体部分上形成第二半导体层，并且与第一半导体层相比具有不同的组成。可以进行氧化，并且可以增加第一半导体层的第二部分内的半导体元素（例如锗）的浓度。在另一个实施例中，可以执行选择性冷凝，并且可以在第一半导体层的第一和第二部分之间形成场隔离区。

4. 发明授权

US07067868B2 Double gate device having a heterojunction source/drain and strained channel 有权
公开(公告)号：US07067868B2
公开(公告)日：2006-06-27
申请号：US10952676
申请日：2004-09-29
申请人： Voon-Yew Thean , Mariam G. Sadaka , Ted R. White , Alexander L. Barr , Venkat R. Kolagunta , Bich-Yen Nguyen , Victor H. Vartanian , Da Zhang
发明人： Voon-Yew Thean , Mariam G. Sadaka , Ted R. White , Alexander L. Barr , Venkat R. Kolagunta , Bich-Yen Nguyen , Victor H. Vartanian , Da Zhang
IPC分类号： H01L27/108
CPC分类号： H01L29/785 , H01L29/42392 , H01L29/66628 , H01L29/66742 , H01L29/7842 , H01L29/78621 , H01L29/78648 , H01L29/78687
摘要： A semiconductor device (10) is formed by positioning a gate (22) overlying a semiconductor layer (16) of preferably silicon. A semiconductor material (26) of, for example only, SiGe or Ge, is formed adjacent the gate over the semiconductor layer and over source/drain regions. A thermal process diffuses the stressor material into the semiconductor layer. Lateral diffusion occurs to cause the formation of a strained channel (17) in which a stressor material layer (30) is immediately adjacent the strained channel. Extension implants create source and drain implants from a first portion of the stressor material layer. A second portion of the stressor material layer remains in the channel between the strained channel and the source and drain implants. A heterojunction is therefore formed in the strained channel. In another form, oxidation of the stressor material occurs rather than extension implants to form the strained channel.

5. 发明授权

US07018901B1 Method for forming a semiconductor device having a strained channel and a heterojunction source/drain 失效
标题翻译：用于形成具有应变通道和异质结源极/漏极的半导体器件的方法
公开(公告)号：US07018901B1
公开(公告)日：2006-03-28
申请号：US10954121
申请日：2004-09-29
申请人： Voon-Yew Thean , Mariam G. Sadaka , Ted R. White , Alexander L. Barr , Venkat R. Kolagunta , Bich-Yen Nguyen , Victor H. Vartanian , Da Zhang
发明人： Voon-Yew Thean , Mariam G. Sadaka , Ted R. White , Alexander L. Barr , Venkat R. Kolagunta , Bich-Yen Nguyen , Victor H. Vartanian , Da Zhang
IPC分类号： H01L21/336
CPC分类号： H01L21/2254 , H01L29/665 , H01L29/66787 , H01L29/7848 , H01L29/785 , H01L29/78648
摘要： A semiconductor device (10) is formed by positioning a gate (22) overlying a semiconductor layer (16) of preferably silicon. A semiconductor material (26) of, for example only, SiGe or Ge, is formed adjacent the gate over the semiconductor layer and over source/drain regions. A thermal process diffuses the stressor material into the semiconductor layer. Lateral diffusion occurs to cause the formation of a strained channel (17) in which a stressor material layer (30) is immediately adjacent the strained channel. Extension implants create source and drain implants from a first portion of the stressor material layer. A second portion of the stressor material layer remains in the channel between the strained channel and the source and drain implants. A heterojunction is therefore formed in the strained channel. In another form, oxidation of the stressor material occurs rather than extension implants to form the strained channel.
摘要翻译：半导体器件（10）通过将覆盖在优选硅的半导体层（16）上的栅极（22）定位而形成。例如仅SiGe或Ge的半导体材料（26）形成在半导体层上方的栅极和源极/漏极区域附近。热处理将应力源材料扩散到半导体层。发生横向扩散以形成应变通道（17），其中应力材料层（30）紧邻应变通道。延伸植入物从应力源材料层的第一部分产生源和漏植入物。应力源材料层的第二部分保留在应变通道和源极和漏极植入物之间的通道中。因此，在应变通道中形成异质结。在另一种形式中，发生应力源材料的氧化而不是延伸植入物以形成应变通道。

6. 发明授权

US07700420B2 Integrated circuit with different channel materials for P and N channel transistors and method therefor 有权
标题翻译：用于P和N沟道晶体管的不同沟道材料的集成电路及其方法
公开(公告)号：US07700420B2
公开(公告)日：2010-04-20
申请号：US11402395
申请日：2006-04-12
申请人： Voon-Yew Thean , Bich-Yen Nguyen , Mariam G. Sadaka , Victor H. Vartanian , Ted R. White
发明人： Voon-Yew Thean , Bich-Yen Nguyen , Mariam G. Sadaka , Victor H. Vartanian , Ted R. White
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： H01L21/823807 , H01L21/823878 , H01L21/8258 , H01L27/1203
摘要： A substrate includes a first region and a second region. The first region comprises a III-nitride layer, and the second region comprises a first semiconductor layer. A first transistor (such as an n-type transistor) is formed in and on the III-nitride layer, and a second transistor (such as a p-type transistor) is formed in and on the first semiconductor layer. The III-nitride layer may be indium nitride. In the first region, the substrate may include a second semiconductor layer, a graded transition layer over the second semiconductor layer, and a buffer layer over the transition layer, where the III-nitride layer is over the buffer layer. In the second region, the substrate may include the second semiconductor layer and an insulating layer over the second semiconductor layer, where the first semiconductor layer is over the insulating layer.
摘要翻译：衬底包括第一区域和第二区域。第一区域包括III族氮化物层，第二区域包括第一半导体层。在III族氮化物层上形成第一晶体管（例如n型晶体管），并且在第一半导体层上形成第二晶体管（例如p型晶体管）。 III族氮化物层可以是氮化铟。在第一区域中，衬底可以包括第二半导体层，在第二半导体层上的渐变过渡层，以及过渡层上的缓冲层，其中III族氮化物层在缓冲层之上。在第二区域中，衬底可以包括第二半导体层和在第二半导体层上的绝缘层，其中第一半导体层在绝缘层之上。

7. 发明申请

US20070281435A1 ENGINEERING STRAIN IN THICK STRAINED-SOI SUBSTRATES 有权
标题翻译：在厚度很小的SOI衬底上的工程应变
公开(公告)号：US20070281435A1
公开(公告)日：2007-12-06
申请号：US11420849
申请日：2006-05-30
申请人： Voon-Yew Thean , Victor H. Vartanian , Brian A. Winstead
发明人： Voon-Yew Thean , Victor H. Vartanian , Brian A. Winstead
IPC分类号： H01L21/76
CPC分类号： H01L21/823481 , H01L21/823412 , H01L21/84
摘要： A semiconductor fabrication process preferably used with a semiconductor on insulator (SOI) wafer. The wafer's active layer is biaxially strained and has first and second regions. The second region is amorphized to alter its strain component(s). The wafer is annealed to re-crystallize the amorphous semiconductor. First and second types of transistors are fabricated in the first region and the second region respectively. Third and possibly fourth regions of the active layer may be processed to alter their strain characteristics. A sacrificial strain structure may be formed overlying the third region. The strain structure may be a compressive. When annealing the wafer with the strain structure in place, its strain characteristics may be mirrored in the third active layer region. The fourth active layer region may be amorphized in stripes that run parallel to a width direction of the transistor strain to produce uniaxial stress in the width direction.
摘要翻译：优选与半导体绝缘体（SOI）晶片一起使用的半导体制造工艺。晶圆的活性层是双轴应变的，并具有第一和第二区域。第二个区域被非晶化以改变其应变分量。将晶片退火以使非晶半导体再结晶。分别在第一区域和第二区域中制造第一和第二类型的晶体管。可以处理活性层的第三和可能的第四区域以改变它们的应变特性。可以形成覆盖在第三区域上的牺牲应变结构。应变结构可以是压缩的。当将具有应变结构的晶片退火就位时，其应变特性可以被镜像在第三有源层区域中。第四有源层区域可以以与晶体管应变的宽度方向平行的条状非晶化，以在宽度方向上产生单轴应力。

8. 发明授权

US07911002B2 Semiconductor device with selectively modulated gate work function 有权
标题翻译：具有选择性调制门功能的半导体器件
公开(公告)号：US07911002B2
公开(公告)日：2011-03-22
申请号：US12641714
申请日：2009-12-18
申请人： Voon-Yew Thean , Marc Rossow , Gregory S. Spencer , Tab A. Stephens , Dina H. Triyoso , Victor H. Vartanian
发明人： Voon-Yew Thean , Marc Rossow , Gregory S. Spencer , Tab A. Stephens , Dina H. Triyoso , Victor H. Vartanian
IPC分类号： H01L29/94
CPC分类号： H01L21/84 , H01L21/82345 , H01L21/823462 , H01L21/823842 , H01L29/4908 , H01L29/513 , H01L29/517
摘要： A semiconductor device is provided which comprises a semiconductor layer (109), a dielectric layer (111), first and second gate electrodes (129, 131) having first and second respective work functions associated therewith, and a layer of hafnium oxide (113) disposed between said dielectric layer and said first and second gate electrodes.
摘要翻译：提供一种半导体器件，其包括半导体层（109），介电层（111），具有与其相关联的第一和第二相应功函数的第一和第二栅电极（129,131）和氧化铪层（113）设置在所述介电层和所述第一和第二栅电极之间。

9. 发明授权

US07659156B2 Method to selectively modulate gate work function through selective Ge condensation and high-K dielectric layer 有权
标题翻译：通过选择性Ge缩合和高K电介质层选择性调制栅极功能的方法
公开(公告)号：US07659156B2
公开(公告)日：2010-02-09
申请号：US11788216
申请日：2007-04-18
申请人： Voon-Yew Thean , Marc Rossow , Gregory S. Spencer , Tab A. Stephens , Dina H. Triyoso , Victor H. Vartanian
发明人： Voon-Yew Thean , Marc Rossow , Gregory S. Spencer , Tab A. Stephens , Dina H. Triyoso , Victor H. Vartanian
IPC分类号： H01L21/336
CPC分类号： H01L21/84 , H01L21/82345 , H01L21/823462 , H01L21/823842 , H01L29/4908 , H01L29/513 , H01L29/517
摘要： A semiconductor device is provided which comprises a semiconductor layer (109), a dielectric layer (111), first and second gate electrodes (129, 131) having first and second respective work functions associated therewith, and a layer of hafnium oxide (113) disposed between said dielectric layer and said first and second gate electrodes.
摘要翻译：提供一种半导体器件，其包括半导体层（109），介电层（111），具有与其相关联的第一和第二相应功函数的第一和第二栅电极（129,131）和氧化铪层（113）设置在所述介电层和所述第一和第二栅电极之间。

10. 发明申请

US20100230756A1 SEMICONDUCTOR DEVICE WITH SELECTIVELY MODULATED GATE WORK FUNCTION 有权
标题翻译：具有选择性调节门功能的半导体器件
公开(公告)号：US20100230756A1
公开(公告)日：2010-09-16
申请号：US12641714
申请日：2009-12-18
申请人： Voon-Yew Thean , Marc Rossow , Gregory S. Spencer , Tab A. Stephens , Dina H. Triyoso , Victor H. Vartanian
发明人： Voon-Yew Thean , Marc Rossow , Gregory S. Spencer , Tab A. Stephens , Dina H. Triyoso , Victor H. Vartanian
IPC分类号： H01L27/12 , H01L29/49
CPC分类号： H01L21/84 , H01L21/82345 , H01L21/823462 , H01L21/823842 , H01L29/4908 , H01L29/513 , H01L29/517
摘要： A semiconductor device is provided which comprises a semiconductor layer (109), a dielectric layer (111), first and second gate electrodes (129, 131) having first and second respective work functions associated therewith, and a layer of hafnium oxide (113) disposed between said dielectric layer and said first and second gate electrodes.
摘要翻译：提供一种半导体器件，其包括半导体层（109），介电层（111），具有与其相关联的第一和第二相应功函数的第一和第二栅电极（129,131）和氧化铪层（113）设置在所述介电层和所述第一和第二栅电极之间。

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