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1. 发明申请

US20160109519A1 SYSTEM AND METHOD FOR ELIMINATING INDETERMINISM IN INTEGRATED CIRCUIT TESTING 审中-公开
标题翻译：用于消除集成电路测试中的不确定性的系统和方法
公开(公告)号：US20160109519A1
公开(公告)日：2016-04-21
申请号：US14516557
申请日：2014-10-16
申请人： Vishal Vadhavania , Akhil Jain , Sachin Jain , Arvind Garg
发明人： Vishal Vadhavania , Akhil Jain , Sachin Jain , Arvind Garg
IPC分类号： G01R31/317 , G01R31/3177
CPC分类号： G01R31/31726 , G01R31/31701
摘要： Indeterministic launch of test transactions in a system-on-chip device having asynchronous paths may be avoided by gating test mode bus transactions at the functional (IP) module interface. The gated bus transactions are released using an external trigger in order to control loss of cycle accuracy caused by on-board synchronizers during functional testing. Conventional interfaces can be driven from automatic test equipment and controlled in order to account for PVT variations and achieve deterministic and stable behavior of the device while being tested.
摘要翻译：可以通过在功能（IP）模块接口上选通测试模式总线事务来避免在具有异步路径的片上系统设备中确定性地启动测试事务。门控总线事务是使用外部触发器来释放的，以便在功能测试期间控制由车载同步器引起的周期精度损失。常规接口可以从自动测试设备驱动并进行控制，以便考虑PVT变化，并在测试时实现设备的确定性和稳定的行为。

2. 发明授权

US09204312B2 Method for adding leaf node to multi-node base station 有权
标题翻译：叶节点添加到多节点基站的方法
公开(公告)号：US09204312B2
公开(公告)日：2015-12-01
申请号：US14092881
申请日：2013-11-27
申请人： Arindam Sinha , Somvir Dahiya , Arvind Garg , Sachin Jain , Arvind Kaushik
发明人： Arindam Sinha , Somvir Dahiya , Arvind Garg , Sachin Jain , Arvind Kaushik
IPC分类号： H04L5/00 , H04W16/18 , H04W56/00
CPC分类号： H04W16/18 , H04L5/008 , H04W56/001
摘要： Adding a new subsystem node to a multi-node base station topology (e.g., a chain or tree topology) in a telecommunications network can disrupt the effective operation of the existing multi-node base station. By accurately measuring the timing difference between uplink and downlink signaling across a current terminating node during the configuration of the new terminating node, the new node can be added with reduced impact upon the operation of the existing base station nodes.
摘要翻译：将新的子系统节点添加到电信网络中的多节点基站拓扑（例如，链或树拓扑）可能会破坏现有多节点基站的有效操作。通过在新的终止节点的配置期间准确地测量跨当前终止节点的上行链路和下行链路信令之间的定时差异，可以增加新节点对现有基站节点的操作的影响。

3. 发明授权

US09031056B2 Wireless communication apparatus and method 有权
标题翻译：无线通信装置及方法
公开(公告)号：US09031056B2
公开(公告)日：2015-05-12
申请号：US13938239
申请日：2013-07-10
申请人： Sachin Jain , Somvir Dahiya , Arvind Garg , Arvind Kaushik , Arindam Sinha
发明人： Sachin Jain , Somvir Dahiya , Arvind Garg , Arvind Kaushik , Arindam Sinha
IPC分类号： H04J3/16 , H04W56/00
CPC分类号： H04W56/001
摘要： A transmission node for use in a wireless communication network includes a first register for storing a set of first mask bits, a second register for storing a set of second mask bits, and a mask switching block for multiplexing the set of first mask bits and the set of second mask bits and outputting the set of third mask bits. The transmission node further includes a CPRI unit with an auxiliary interface for receiving the set of third mask bits. An activation block is connected between the CPRI unit and the mask switching block for causing the mask switching block to output the set of second mask bits based on data in a current frame in the CPRI unit.
摘要翻译：用于无线通信网络的传输节点包括用于存储一组第一掩码位的第一寄存器，用于存储一组第二掩码位的第二寄存器和用于复用该组第一掩码位的掩码切换块一组第二掩码位并输出该组第三掩码位。传输节点还包括具有用于接收该组第三掩码位的辅助接口的CPRI单元。激活块连接在CPRI单元和掩码切换块之间，用于使得掩码切换块基于CPRI单元中的当前帧中的数据输出第二掩码位集合。

4. 发明授权

US09088941B2 Wireless communication apparatus and method 有权
标题翻译：无线通信装置及方法
公开(公告)号：US09088941B2
公开(公告)日：2015-07-21
申请号：US13938248
申请日：2013-07-10
申请人： Arvind Garg , Somvir Dahiya , Sachin Jain , Arvind Kaushik , Arindam Sinha
发明人： Arvind Garg , Somvir Dahiya , Sachin Jain , Arvind Kaushik , Arindam Sinha
IPC分类号： H04W56/00 , H04L12/863
CPC分类号： H04W56/001 , H04L47/622
摘要： A transmission node for use in a wireless communication network includes a first CPRI unit for transmitting auxiliary data to a second CPRI unit in the transmission node. A memory unit stores control word data of the auxiliary data. A memory write block is connected between the first CPRI unit and the memory unit for writing the control word data to the memory unit based on a first set of frame timing signals received from the first CPRI unit. A memory read and merge block is connected to the memory unit for reading the control word data stored in the memory unit based on a second set of frame timing signals, merging the control word data with IQ data, and transmitting the merged auxiliary data to the second CPRI unit.
摘要翻译：用于无线通信网络的传输节点包括用于将辅助数据发送到传输节点中的第二CPRI单元的第一CPRI单元。存储单元存储辅助数据的控制字数据。存储器写入块连接在第一CPRI单元和存储器单元之间，用于基于从第一CPRI单元接收的第一组帧定时信号将控制字数据写入存储器单元。存储器读和合并块连接到存储器单元，用于基于第二组帧定时信号读取存储在存储器单元中的控制字数据，将控制字数据与IQ数据合并，并将合并的辅助数据发送到第二个CPRI单位。

5. 发明申请

US20150016445A1 WIRELESS COMMUNICATION APPARATUS AND METHOD 有权
标题翻译：无线通信装置和方法
公开(公告)号：US20150016445A1
公开(公告)日：2015-01-15
申请号：US13938248
申请日：2013-07-10
申请人： Arvind Garg , Somvir Dahiya , Sachin Jain , Arvind Kaushik , Arindam Sinha
发明人： Arvind Garg , Somvir Dahiya , Sachin Jain , Arvind Kaushik , Arindam Sinha
IPC分类号： H04W56/00 , H04L12/863
CPC分类号： H04W56/001 , H04L47/622
摘要： A transmission node for use in a wireless communication network includes a first CPRI unit for transmitting auxiliary data to a second CPRI unit in the transmission node. A memory unit stores control word data of the auxiliary data. A memory write block is connected between the first CPRI unit and the memory unit for writing the control word data to the memory unit based on a first set of frame timing signals received from the first CPRI unit. A memory read and merge block is connected to the memory unit for reading the control word data stored in the memory unit based on a second set of frame timing signals, merging the control word data with IQ data, and transmitting the merged auxiliary data to the second CPRI unit.
摘要翻译：用于无线通信网络的传输节点包括用于将辅助数据发送到传输节点中的第二CPRI单元的第一CPRI单元。存储单元存储辅助数据的控制字数据。存储器写入块连接在第一CPRI单元和存储器单元之间，用于基于从第一CPRI单元接收的第一组帧定时信号将控制字数据写入存储器单元。存储器读和合并块连接到存储器单元，用于基于第二组帧定时信号读取存储在存储器单元中的控制字数据，将控制字数据与IQ数据合并，并将合并的辅助数据发送到第二个CPRI单位。

6. 发明申请

US20150016444A1 WIRELESS COMMUNICATION APPARATUS AND METHOD 有权
标题翻译：无线通信装置和方法
公开(公告)号：US20150016444A1
公开(公告)日：2015-01-15
申请号：US13938239
申请日：2013-07-10
申请人： Sachin Jain , Somvir Dahiya , Arvind Garg , Arvind Kaushik , Arindam Sinha
发明人： Sachin Jain , Somvir Dahiya , Arvind Garg , Arvind Kaushik , Arindam Sinha
IPC分类号： H04W56/00
CPC分类号： H04W56/001
摘要： A transmission node for use in a wireless communication network includes a first register for storing a set of first mask bits, a second register for storing a set of second mask bits, and a mask switching block for multiplexing the set of first mask bits and the set of second mask bits and outputting the set of third mask bits. The transmission node further includes a CPRI unit with an auxiliary interface for receiving the set of third mask bits. An activation block is connected between the CPRI unit and the mask switching block for causing the mask switching block to output the set of second mask bits based on data in a current frame in the CPRI unit.
摘要翻译：用于无线通信网络的传输节点包括用于存储一组第一掩码位的第一寄存器，用于存储一组第二掩码位的第二寄存器和用于复用该组第一掩码位的掩码切换块一组第二掩码位并输出该组第三掩码位。传输节点还包括具有用于接收该组第三掩码位的辅助接口的CPRI单元。激活块连接在CPRI单元和掩码切换块之间，用于使得掩码切换块基于CPRI单元中的当前帧中的数据输出第二掩码位集合。

7. 发明申请

US20150146626A1 METHOD FOR ADDING LEAF NODE TO MULTI-NODE BASE STATION 有权
标题翻译：将叶节点添加到多节点基站的方法
公开(公告)号：US20150146626A1
公开(公告)日：2015-05-28
申请号：US14092881
申请日：2013-11-27
申请人： Arindam Sinha , Somvir Dahiya , Arvind Garg , Sachin Jain , Arvind Kaushik
发明人： Arindam Sinha , Somvir Dahiya , Arvind Garg , Sachin Jain , Arvind Kaushik
IPC分类号： H04L5/00 , H04W16/18 , H04W56/00
CPC分类号： H04W16/18 , H04L5/008 , H04W56/001
摘要： Adding a new subsystem node to a multi-node base station topology (e.g., a chain or tree topology) in a telecommunications network can disrupt the effective operation of the existing multi-node base station. By accurately measuring the timing difference between uplink and downlink signaling across a current terminating node during the configuration of the new terminating node, the new node can be added with reduced impact upon the operation of the existing base station nodes.
摘要翻译：将新的子系统节点添加到电信网络中的多节点基站拓扑（例如，链或树拓扑）可能会破坏现有多节点基站的有效操作。通过在新的终止节点的配置期间准确地测量跨当前终止节点的上行链路和下行链路信令之间的定时差异，可以增加新节点对现有基站节点的操作的影响。

8. 发明申请

US20160233852A1 PROGRAMMABLE SYNCHRONOUS CLOCK DIVIDER 有权
标题翻译：可编程同步时钟分频器
公开(公告)号：US20160233852A1
公开(公告)日：2016-08-11
申请号：US14617950
申请日：2015-02-10
申请人： Inayat Ali , Puneet Dodeja , Sachin Jain
发明人： Inayat Ali , Puneet Dodeja , Sachin Jain
IPC分类号： H03K3/017 , H03K23/00
CPC分类号： H03K3/017 , H03K5/1565 , H03K21/00 , H03K21/026 , H03K21/10 , H03K23/00 , H03K23/002
摘要： A divided clock signal is generated from an input clock signal. The duty cycle of the divided clock signal is programmed by generating a compare value based on values of duty cycle input and a divide value of the input clock signal. The compare value is compared to a count value to generate short and long pulse signals. The divided clock signal is generated based on the short and long pulse signals. The duty cycle of the divided clock signal varies in accordance with the compare value.
摘要翻译：从输入时钟信号产生分频时钟信号。通过基于占空比输入的值和输入时钟信号的除法产生比较值来编程分频时钟信号的占空比。将比较值与计数值进行比较，以生成短和长脉冲信号。基于短脉冲信号和长脉冲信号产生分频时钟信号。分频时钟信号的占空比根据比较值而变化。

9. 发明授权

US08830330B2 Analysis of video footage 有权
标题翻译：视频分析
公开(公告)号：US08830330B2
公开(公告)日：2014-09-09
申请号：US13612826
申请日：2012-09-12
申请人： Sachin Jain , Peter Rowan Kellock , Sheng Lo
发明人： Sachin Jain , Peter Rowan Kellock , Sheng Lo
IPC分类号： G06K9/00 , H04N5/225 , G03B17/00
CPC分类号： G11B27/28 , G11B27/031
摘要： Segments of interest within video footage are identified automatically. Such segments of interest include portions of the footage which were taken using a hand held camera and which show a static subject, portions which track the motion of a moving subject, and portions which show an abrupt event. Methods are presented for identifying such segments, based on motion and/or colour analysis of the video footage or based on observations of discontinuities in the video footage following a period of stability.
摘要翻译：视频素材内的兴趣部分会自动识别。感兴趣的这些片段包括使用手持照相机拍摄的并且显示静态被摄体的部分，跟踪移动被摄体的运动的部分和显示突发事件的部分。提出了基于视频镜头的运动和/或颜色分析或基于在稳定时间段之后的视频片段中的不连续性的观察来识别这些片段的方法。

10. 发明授权

US08829953B1 Programmable clock divider 有权
标题翻译：可编程时钟分频器
公开(公告)号：US08829953B1
公开(公告)日：2014-09-09
申请号：US14151790
申请日：2014-01-09
申请人： Inayat Ali , Sachin Jain , Kanishka Patwal
发明人： Inayat Ali , Sachin Jain , Kanishka Patwal
IPC分类号： H03K21/00 , H03K23/00 , H03K25/00 , H03K21/02
CPC分类号： H03K21/026 , H03K21/10 , H03K23/667
摘要： A programmable clock divider includes first and second comparators for generating first and second signals respectively based on a count value of a counter and a frequency ratio value. First and second flip-flops delay the first and second signals by one clock cycle of the input clock signal. An active-low latch delays the second signal by half a clock cycle of the input clock signal. A multiplexer receives the delayed first and second signals at first and second input terminals respectively and the input clock signal at a select terminal, and generates a divided clock signal. The multiplexer outputs the second delayed signal when the input clock signal is at a logic high state and outputs the first delayed signal when the input clock signal is at a logic low state.
摘要翻译：可编程时钟分频器包括分别基于计数器的计数值和频率比值产生第一和第二信号的第一和第二比较器。第一和第二触发器将第一和第二信号延迟输入时钟信号的一个时钟周期。低电平有效锁存器将第二个信号延迟半个时钟周期的输入时钟信号。多路复用器在第一和第二输入端分别接收延迟的第一和第二信号，并在选择端接收输入时钟信号，并产生分频时钟信号。当输入时钟信号处于逻辑高电平状态时，多路复用器输出第二延迟信号，并在输入时钟信号处于逻辑低电平状态时输出第一延迟信号。

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