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    • 2. 发明授权
    • Selective snooping by snoop masters to locate updated data
    • 通过窥探大师进行选择性窥探以查找更新的数据
    • US07685373B2
    • 2010-03-23
    • US11970599
    • 2008-01-08
    • James N. DieffenderferBernard C. DrerupJaya P. GanasanRichard G. HofmannThomas A. SartoriusThomas P. SpeierBarry J. Wolford
    • James N. DieffenderferBernard C. DrerupJaya P. GanasanRichard G. HofmannThomas A. SartoriusThomas P. SpeierBarry J. Wolford
    • G06F12/00
    • G06F12/0831Y02D10/13
    • A system and structure for snooping cache memories of several snooping masters connected to a bus macro, wherein each non-originating snooping master has a cache memory, and wherein some, but less than all the cache memories, may have the data requested by an originating snooping master and wherein the needed data in an non-originating snooping master is marked as updated, and wherein a main memory having addresses for all data is connected to the bus macro. Only those non-originating snooping masters which may have the requested data are queried. All the non-originating snooping masters that have been queried reply. If a non-originating snooping master has the requested data marked as updated, that non-originating snooping master returns the updated data to the originating snooping master and possibly to the main memory. If none of the non-originating snooping masters has the requested data marked as updated, then the requested data is read from main memory.
    • 一种用于窥探连接到总线宏的多个窥探主机的高速缓存存储器的系统和结构,其中每个非起始侦听主机具有高速缓冲存储器,并且其中一些但不到全部高速缓冲存储器可具有始发请求的数据 窥探主机,其中在非始发侦听主机中所需的数据被标记为更新,并且其中具有用于所有数据的地址的主存储器连接到总线宏。 只有那些可能具有请求的数据的非始发侦听主机才被查询。 所有被查询的非始发侦听主人都回复。 如果非始发侦听主机具有被标记为更新的请求数据,则该非起始侦听主机会将更新的数据返回给始发侦听主机,并将其返回到主内存。 如果非始发侦听主机中没有一个被标记为已更新的请求数据,则从主存储器读取所请求的数据。
    • 3. 发明授权
    • Selective snooping by snoop masters to locate updated data
    • 通过窥探大师进行选择性窥探以查找更新的数据
    • US07395380B2
    • 2008-07-01
    • US10393116
    • 2003-03-20
    • James N. DieffenderferBernard C. DrerupJaya P. GanasanRichard G. HofmannThomas A. SartoriusThomas P. SpeierBarry J. Wolford
    • James N. DieffenderferBernard C. DrerupJaya P. GanasanRichard G. HofmannThomas A. SartoriusThomas P. SpeierBarry J. Wolford
    • G06F12/00G06F3/00
    • G06F12/0831Y02D10/13
    • A method and structure for snooping cache memories of several snooping masters connected to a bus macro, wherein each non-originating snooping master has cache memory, and wherein some, but less than all the cache memories, may have the data requested by an originating snooping master and wherein the needed data in a non-originating snooping master is marked as updated, and wherein a main memory having addresses for all data is connected to the bus macro.Only those non-originating snooping masters which may have the requested data are queried. All the non-originating snooping masters that have been queried reply. If a non-originating snooping master has the requested data marked as updated, that non-originating snooping master returns the updated data to the originating snooping master and possibly to the main memory. If none of the non-originating snooping masters has the requested data marked as updated, then the requested data is read from main memory.
    • 一种用于窥探连接到总线宏的多个窥探主机的高速缓冲存储器的方法和结构,其中每个非起始侦听主机具有高速缓冲存储器,并且其中一些但是小于所有高速缓存存储器可以具有由始发侦听器请求的数据 主站,并且其中非起始侦听主控器中的所需数据被标记为更新,并且其中具有用于所有数据的地址的主存储器连接到总线宏。 只有那些可能具有请求的数据的非始发侦听主机才被查询。 所有被查询的非始发侦听主人都回复。 如果非始发侦听主机具有被标记为更新的请求数据,则该非起始侦听主机会将更新的数据返回给始发侦听主机,并将其返回到主内存。 如果非始发侦听主机中没有一个被标记为已更新的请求数据,则从主存储器读取所请求的数据。
    • 6. 发明授权
    • Single request data transfer regardless of size and alignment
    • 单个请求数据传输,无论大小和对齐方式
    • US07093058B2
    • 2006-08-15
    • US11246427
    • 2005-10-07
    • Victor R. AngsburgJames N. DieffenderferBernard C. DrerupRichard G. HofmannThomas A. SartoriusBarry J. Wolford
    • Victor R. AngsburgJames N. DieffenderferBernard C. DrerupRichard G. HofmannThomas A. SartoriusBarry J. Wolford
    • G06F13/40H04L12/56
    • G06F13/4204Y02D10/14Y02D10/151
    • A method, computer system and set of signals are disclosed allowing for communication of a data transfer, via a bus, between a master and a slave using a single transfer request regardless of transfer size and alignment. The invention provides three transfer qualifier signals including: a first signal including a starting byte address of the data transfer; a second signal including a size of the data transfer in data beats; and a third signal including a byte enable for each byte required during a last data beat of the data transfer. The invention is usable with single or multiple beat, aligned or unaligned data transfers. Usage of the three transfer qualifier signals provides the slave with how many data beats it will transfer at the start of the transfer, and the alignment of both the starting and ending data beats. As a result, the slave need not calculate the number of bytes it will transfer. In terms of multiple beat transfers, the number of data transfer requests are reduced, which reduces the amount of switching, bus arbitration and power consumption required. In addition, the invention allows byte enable signals to be used for subsequent data transfer requests prior to the completion of the initial data transfer, which reduces power consumption and allows for pipelining of data transfer requests.
    • 公开了一种方法,计算机系统和一组信号,允许通过总线在使用单个传送请求的主机和从机之间进行数据传输的通信,而不管传送大小和对准。 本发明提供了三个传送限定符信号,包括:包括数据传送的起始字节地址的第一信号; 第二信号,包括数据传输数据的大小; 以及第三信号,包括在数据传输的最后数据跳动期间所需的每个字节的字节使能。 本发明可用于单节拍或多节拍,对齐或未对齐的数据传送。 三个传输限定符信号的使用为从机提供了在传输开始时传输的数据跳数以及起始和结束数据跳数的对齐。 因此,从机不需要计算它将传输的字节数。 在多节拍传输方面,减少了数据传输请求的数量,从而减少了切换量,总线仲裁和所需的功耗。 此外,本发明允许在完成初始数据传输之前将字节使能信号用于随后的数据传输请求,这降低了功耗并且允许数据传送请求的流水线化。
    • 8. 发明授权
    • On-chip ECC status
    • 片上ECC状态
    • US5535226A
    • 1996-07-09
    • US251056
    • 1994-05-31
    • Charles E. DrakeJohn A. FifieldRichard D. WheelerBarry J. Wolford
    • Charles E. DrakeJohn A. FifieldRichard D. WheelerBarry J. Wolford
    • G06F12/16G06F11/10G11C29/00
    • G06F11/1008G06F11/1024
    • In one aspect, a memory device employing device-level error correction tracks the status of the error correction in terms of whether error correction is active or inactive, whether an uncorrectable error beyond the capability of the device-level correction is detected, whether a recovery option from an uncorrectable error is active and whether the recovery option has been reset. In another aspect, a diagnostic method for determining a status for one or more aspects of device-level error correction employed by a memory device is provided. In the diagnostic method, the status is determined for the one or more aspects, a flag is set based on the status, the flag is latched, a diagnostic code is input into the memory device and the latched flag is read.
    • 在一个方面,采用设备级错误校正的存储器件根据纠错是有效还是无效来跟踪纠错的状态,是否检测到超出设备级校正能力的不可校正错误,是否恢复 来自不可校正错误的选项处于活动状态,以及恢复选项是否已重置。 另一方面,提供了一种用于确定存储器件所采用的器件级错误校正的一个或多个方面的状态的诊断方法。 在诊断方法中,针对一个或多个方面确定状态,基于状态设置标志,锁存标志,将诊断代码输入到存储器件中,并且读取锁存标志。