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1. 发明授权

US08930670B2 Partition redispatching using page tracking 有权
标题翻译：使用页面跟踪进行分区重新分配
公开(公告)号：US08930670B2
公开(公告)日：2015-01-06
申请号：US11936456
申请日：2007-11-07
申请人： Vaijayanthimala K. Anand , Bret R. Olszewski , Mysore Sathyanarayana Srinivas
发明人： Vaijayanthimala K. Anand , Bret R. Olszewski , Mysore Sathyanarayana Srinivas
IPC分类号： G06F12/06 , G06F12/10
CPC分类号： G06F12/1009 , G06F2212/401
摘要： Illustrated embodiments provide a computer implemented method and data processing system for redispatching a partition by tracking a set of memory pages, belonging to the dispatched partition. In one illustrative embodiment the computer implemented method comprises finding an effective page address to real page address mapping for a page address miss in response to determining the page address miss in a page addressing buffer, and saving the mapping as an entry in an array. The computer implemented method creates a preserved array from the array in response to determining the dispatched partition to be an undispatched partition. The computer implemented method further analyzes of the preserved array for a compressed page in response to determining the undispatched partition is now redispatched, and decompresses the compressed page prior to the partition being redispatched.
摘要翻译：说明的实施例提供了一种计算机实现的方法和数据处理系统，用于通过跟踪属于所分派的分区的一组存储器页来重新分配分区。在一个说明性实施例中，计算机实现的方法包括响应于确定页寻址缓冲器中的页面地址未命中而找到页面地址未命中的实际页面地址映射的有效页面地址，并将映射保存为阵列中的条目。计算机实现的方法从数组中创建一个保留的数组，以响应将分派的分区确定为未分配的分区。计算机实现的方法进一步分析压缩页面的保留数组，以响应确定未分配的分区现在被重新分配，并在重新分配分区之前解压缩压缩页面。

2. 发明申请

US20090119474A1 PARTITION REDISPATCHING USING PAGE TRACKING 有权
标题翻译：使用页面跟踪进行分区重新分类
公开(公告)号：US20090119474A1
公开(公告)日：2009-05-07
申请号：US11936456
申请日：2007-11-07
申请人： Vaijayanthimala K. Anand , Bret R. Olszewski , Mysore Sathyanarayana Srinivas
发明人： Vaijayanthimala K. Anand , Bret R. Olszewski , Mysore Sathyanarayana Srinivas
IPC分类号： G06F13/00
CPC分类号： G06F12/1009 , G06F2212/401
摘要： Illustrated embodiments provide a computer implemented method and data processing system for redispatching a partition by tracking a set of memory pages, belonging to the dispatched partition. In one illustrative embodiment the computer implemented method comprises finding an effective page address to real page address mapping for a page address miss to create a found real page address and page size combination, responsive to determining the page address miss in a page addressing buffer, and saving the found real page address and page size combination as an entry in set of entries in an array. Further in the computer implemented method, creating a preserved array from the array, responsive to determining the dispatched partition to be an undispatched partition. The computer implemented method further, analyzing each entry of the preserved array for a compressed page, responsive to determining the undispatched partition is now redispatched, and invoking a partition management firmware function to decompress the compressed page, prior to the partition being redispatched, responsive to determining a compressed page.
摘要翻译：说明的实施例提供了一种计算机实现的方法和数据处理系统，用于通过跟踪属于所分派的分区的一组存储器页来重新分配分区。在一个说明性实施例中，计算机实现的方法包括：响应于确定页面寻址缓冲器中的页面地址未命中，找到用于寻址页面地址的真实页面地址映射以产生找到的真实页面地址和页面大小组合的有效页面地址，以及将发现的真实页面地址和页面大小组合保存为数组中的条目集中的条目。此外，在计算机实现的方法中，响应于将分派的分区确定为未分配的分区，从阵列创建保留的数组。计算机实现的方法还包括：响应于确定未分配的分区现在被重新分配，分析压缩页面的保留数组的每个条目，并且在重新分配分区之前调用分区管理固件功能来解压缩压缩页面，响应于确定压缩页面。

3. 发明授权

US08392659B2 Extending cache capacity on multiple-core processor systems 有权
标题翻译：在多核处理器系统上扩展缓存容量
公开(公告)号：US08392659B2
公开(公告)日：2013-03-05
申请号：US12612767
申请日：2009-11-05
申请人： Vaijayanthimala K. Anand , Diane Garza Flemming , William A. Maron , Mysore Sathyanarayana Srinivas
发明人： Vaijayanthimala K. Anand , Diane Garza Flemming , William A. Maron , Mysore Sathyanarayana Srinivas
IPC分类号： G06F12/08
CPC分类号： G06F12/084 , G06F2212/601
摘要： A method, programmed medium and system are provided for enabling a core's cache capacity to be increased by using the caches of the disabled or non-enabled cores on the same chip. Caches of disabled or non-enabled cores on a chip are made accessible to store cachelines for those chip cores that have been enabled, thereby extending cache capacity of enabled cores.
摘要翻译：提供了一种编程介质和系统，用于通过使用同一芯片上的禁用或非使能内核的高速缓存来实现内核的高速缓存容量的增加。对芯片上的禁用或非启用内核的缓存进行访问，以存储已启用的那些芯片内核的高速缓存线，从而扩展启用核心的高速缓存容量。

4. 发明申请

US20110107031A1 Extended Cache Capacity 有权
标题翻译：扩展缓存容量
公开(公告)号：US20110107031A1
公开(公告)日：2011-05-05
申请号：US12612767
申请日：2009-11-05
申请人： Vaijayanthimala K. Anand , Diane Garza Flemming , William A. Maron , Mysore Sathyanarayana Srinivas
发明人： Vaijayanthimala K. Anand , Diane Garza Flemming , William A. Maron , Mysore Sathyanarayana Srinivas
IPC分类号： G06F12/08 , G06F12/00 , G06F9/44
CPC分类号： G06F12/084 , G06F2212/601
摘要： A method, programmed medium and system are provided for enabling a core's cache capacity to be increased by using the caches of the disabled or non-enabled cores on the same chip. Caches of disabled or non-enabled cores on a chip are made accessible to store cachelines for those chip cores that have been enabled, thereby extending cache capacity of enabled cores.
摘要翻译：提供了一种编程介质和系统，用于通过使用同一芯片上的禁用或非使能内核的高速缓存来实现内核的高速缓存容量的增加。对芯片上的禁用或非启用内核的缓存进行访问，以存储已启用的那些芯片内核的高速缓存线，从而扩展启用核心的高速缓存容量。

5. 发明申请

US20090182893A1 CACHE COHERENCE IN A VIRTUAL MACHINE MANAGED SYSTEM 审中-公开
标题翻译：虚拟机管理系统中的高速缓存
公开(公告)号：US20090182893A1
公开(公告)日：2009-07-16
申请号：US11972788
申请日：2008-01-11
申请人： Vaijayanthimala K. Anand , Bret Ronald Olszewski , Mysore Sathyanarayana Srinivas
发明人： Vaijayanthimala K. Anand , Bret Ronald Olszewski , Mysore Sathyanarayana Srinivas
IPC分类号： G06F15/173
CPC分类号： G06F15/16 , G06F12/0831
摘要： A method, a system, and computer readable program code for managing cache coherence in a virtual machine managed system are provided. In response to a processor issuing a message to be broadcast, a determination is made as to whether the processor is part of a virtual domain. In response to a determination that the processor is part of the virtual domain, the message and a first bit mask are sent from a source node to a destination node. In response to receiving the message and the first bit mask, one of a primary link or a secondary link is selected to send the message and the first bit mask over, forming a selected link. The message and the first bit mask are sent to the destination node over the selected link.
摘要翻译：提供了一种用于管理虚拟机管理系统中的高速缓存一致性的方法，系统和计算机可读程序代码。响应于处理器发出要广播的消息，确定处理器是否是虚拟域的一部分。响应于处理器是虚拟域的一部分的确定，消息和第一位掩码从源节点发送到目的地节点。响应于接收到所述消息和所述第一位掩码，选择主链路或辅助链路中的一个以发送所述消息和所述第一位掩码，从而形成所选择的链路。消息和第一个位掩码通过所选链接发送到目标节点。

6. 发明授权

US08291430B2 Optimizing system performance using spare cores in a virtualized environment 有权
标题翻译：在虚拟化环境中使用备用内核优化系统性能
公开(公告)号：US08291430B2
公开(公告)日：2012-10-16
申请号：US12500628
申请日：2009-07-10
申请人： Vaijayanthimala K. Anand , Mysore Sathyanarayana Srinivas
发明人： Vaijayanthimala K. Anand , Mysore Sathyanarayana Srinivas
IPC分类号： G06F9/46
CPC分类号： G06F9/45533 , G06F9/5077
摘要： A mechanism for optimizing system performance using spare processing cores in a virtualized environment. When detecting a workload partition needs to run on a virtual processor in the virtualized system, a state of the virtual processor is changed to a wait state. A first node comprising memory that is local to the workload partition is determined. A determination is also made as to whether a non-spare processor core in the first node is available to run the workload partition. If no non-spare processor core is available, a free non-spare processor core in a second node is located, and the state of the free non-spare processor core in the second node is changed to an inactive state. The state of a spare processor core in the first node is changed to an active state, and the workload partition is dispatched to the spare processor core in the first node for execution.
摘要翻译：在虚拟化环境中使用备用处理核心优化系统性能的机制。当检测到工作负载分区需要在虚拟化系统中的虚拟处理器上运行时，虚拟处理器的状态被改变为等待状态。确定包括工作负载分区本地的存储器的第一节点。还确定第一节点中的非备用处理器核心是否可用于运行工作负载分区。如果没有非备用处理器核心可用，则定位第二节点中的空闲非备用处理器核心，并且将第二节点中的空闲非备用处理器核心的状态改变为非活动状态。第一个节点中的备用处理器核心的状态更改为活动状态，并将工作负载分区分派到第一个节点中的备用处理器核心，以执行。

7. 发明申请

US20110010709A1 Optimizing System Performance Using Spare Cores in a Virtualized Environment 有权
标题翻译：在虚拟化环境中使用备用内核优化系统性能
公开(公告)号：US20110010709A1
公开(公告)日：2011-01-13
申请号：US12500628
申请日：2009-07-10
申请人： Vaijayanthimala K. Anand , Mysore Sathyanarayana Srinivas
发明人： Vaijayanthimala K. Anand , Mysore Sathyanarayana Srinivas
IPC分类号： G06F9/44
CPC分类号： G06F9/45533 , G06F9/5077
摘要： A mechanism for optimizing system performance using spare processing cores in a virtualized environment. When detecting a workload partition needs to run on a virtual processor in the virtualized system, a state of the virtual processor is changed to a wait state. A first node comprising memory that is local to the workload partition is determined. A determination is also made as to whether a non-spare processor core in the first node is available to run the workload partition. If no non-spare processor core is available, a free non-spare processor core in a second node is located, and the state of the free non-spare processor core in the second node is changed to an inactive state. The state of a spare processor core in the first node is changed to an active state, and the workload partition is dispatched to the spare processor core in the first node for execution.
摘要翻译：在虚拟化环境中使用备用处理核心优化系统性能的机制。当检测到工作负载分区需要在虚拟化系统中的虚拟处理器上运行时，虚拟处理器的状态被改变为等待状态。确定包括工作负载分区本地的存储器的第一节点。还确定第一节点中的非备用处理器核心是否可用于运行工作负载分区。如果没有非备用处理器核心可用，则定位第二节点中的空闲非备用处理器核心，并且将第二节点中的空闲非备用处理器核心的状态改变为非活动状态。第一个节点中的备用处理器核心的状态更改为活动状态，并将工作负载分区分派到第一个节点中的备用处理器核心，以执行。

8. 发明授权

US07865895B2 Heuristic based affinity dispatching for shared processor partition dispatching 有权
标题翻译：用于共享处理器分区调度的基于启发式的亲和性调度
公开(公告)号：US07865895B2
公开(公告)日：2011-01-04
申请号：US11419019
申请日：2006-05-18
申请人： Vaijayanthimala K. Anand , Dean J. Burdick , Bret R. Olszewski
发明人： Vaijayanthimala K. Anand , Dean J. Burdick , Bret R. Olszewski
IPC分类号： G06F9/46 , G06F12/00
CPC分类号： G06F9/5033 , G06F9/5077 , G06F2209/508
摘要： A mechanism is provided for determining whether to use cache affinity as a criterion for software thread dispatching in a shared processor logical partitioning data processing system. The server firmware may store data about when and/or how often logical processors are dispatched. Given these data, the operating system may collect metrics. Using the logical processor metrics, the operating system may determine whether cache affinity is likely to provide a significant performance benefit relative to the cost of dispatching a particular logical processor to the operating system.
摘要翻译：提供了一种用于确定是否使用高速缓存亲和力作为在共享处理器逻辑分区数据处理系统中的软件线程调度的标准的机制。服务器固件可以存储关于何时和/或多少逻辑处理器被调度的数据。鉴于这些数据，操作系统可能会收集指标。使用逻辑处理器度量，操作系统可以确定高速缓存关联性是否可能相对于将特定逻辑处理器调度到操作系统的成本提供显着的性能优点。

9. 发明申请

US20100115522A1 MECHANISM TO CONTROL HARDWARE MULTI-THREADED PRIORITY BY SYSTEM CALL 有权
标题翻译：通过系统呼叫控制硬件多线程优先级的机制
公开(公告)号：US20100115522A1
公开(公告)日：2010-05-06
申请号：US12261275
申请日：2008-10-30
申请人： Vaijayanthimala K. Anand , Joerg Droste , Bruce Mealey , Bret R. Olszewski
发明人： Vaijayanthimala K. Anand , Joerg Droste , Bruce Mealey , Bret R. Olszewski
IPC分类号： G06F9/46 , G06F15/00
CPC分类号： G06F9/485 , G06F9/4881 , Y02D10/24
摘要： A method, a system and a computer program product for controlling the hardware priority of hardware threads in a data processing system. A Thread Priority Control (TPC) utility assigns a primary level and one or more secondary levels of hardware priority to a hardware thread. When a hardware thread initiates execution in the absence of a system call, the TPC utility enables execution based on the primary level. When the hardware thread initiates execution within a system call, the TPC utility dynamically adjusts execution from the primary level to the secondary level associated with the system call. The TPC utility adjusts hardware priority levels in order to: (a) raise the hardware priority of one hardware thread relative to another; (b) reduce energy consumed by the hardware thread; and (c) fulfill requirements of time critical hardware sections.
摘要翻译：一种用于控制数据处理系统中硬件线程的硬件优先级的方法，系统和计算机程序产品。线程优先级控制（TPC）实用程序为硬件线程分配一级和一级以上的硬件优先级。当硬件线程在没有系统调用的情况下启动执行时，TPC实用程序将启用基于主级别的执行。当硬件线程在系统调用中启动执行时，TPC实用程序会将执行从主级别动态调整到与系统调用相关联的辅助级别。 TPC实用程序调整硬件优先级，以便：（a）提高一个硬件线程相对于另一个的硬件优先级; （b）减少硬件螺纹消耗的能量; 和（c）满足时间关键硬件部分的要求。

10. 发明申请

US20130346967A1 Determining Placement Fitness For Partitions Under A Hypervisor 有权
公开(公告)号：US20130346967A1
公开(公告)日：2013-12-26
申请号：US13529790
申请日：2012-06-21
申请人： Vaijayanthimala K. Anand , Richard Mankowski , Bret R. Olszewski , Sergio Reyes
发明人： Vaijayanthimala K. Anand , Richard Mankowski , Bret R. Olszewski , Sergio Reyes
IPC分类号： G06F9/455
CPC分类号： G06F9/45558 , G06F9/45533 , G06F9/5077 , G06F2009/4557 , G06F2009/45583
摘要： A technique for determining placement fitness for partitions under a hypervisor in a host computing system having non-uniform memory access (NUMA) nodes. In an embodiment, a partition resource specification is received from a partition score requester. The partition resource specification identifies a set of computing resources needed for a virtual machine partition to be created by a hypervisor in the host computing system. Resource availability within the NUMA nodes of the host computing system is assessed to determine possible partition placement options. A partition fitness score of a most suitable one of the partition placement options is calculated. The partition fitness score is reported to the partition score requester.

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