会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 5. 发明申请
    • METHOD OF IDENTIFYING LOGICAL INFORMATION IN A PROGRAMMING AND ERASING CELL BY ON-SIDE READING SCHEME
    • 通过边界读取方案识别编程和擦除单元中的逻辑信息的方法
    • US20100290293A1
    • 2010-11-18
    • US12845064
    • 2010-07-28
    • Chao-I WuMing-Hsiu LeeTzu-Hsuan Hsu
    • Chao-I WuMing-Hsiu LeeTzu-Hsuan Hsu
    • G11C16/04
    • G11C16/0475
    • A method of identifying logical information in a cell, particularly in a programming by hot hole injection nitride electron storage (PHINES) cell by one-side reading scheme is disclosed. The method comprise steps of: erasing the first region and the second region of PHINES cell by increasing a local threshold voltage (Vt) to a certain value; programming at least one of the first region and the second region of the PHINES cell by hot hole injection; and reading a logical state of the PHINES cell by measuring an output current of one of the first region and the second region; wherein different quantity of the output current is caused by interaction between different quantity of the hot hole stored in the first region and the second region, so as to determine the logical state of the PHINES cell by one-side reading scheme.
    • 公开了一种识别单元中的逻辑信息的方法,特别是在通过单孔读取方案通过热空穴注入氮化物电子存储(PHINES)单元编程中的方法。 该方法包括以下步骤:通过将局部阈值电压(Vt)增加到一定值来擦除PHINES单元的第一区域和第二区域; 通过热空穴注入来编程PHINES单元的第一区域和第二区域中的至少一个; 以及通过测量所述第一区域和所述第二区域之一的输出电流来读取所述PHINES单元的逻辑状态; 其中,通过存储在第一区域和第二区域中的不同量的热孔之间的相互作用引起不同量的输出电流,以便通过单面读取方案确定PHINES单元的逻辑状态。
    • 6. 发明授权
    • Method of identifying logical information in a programming and erasing cell by on-side reading scheme
    • 通过旁路读取方案识别编程和擦除单元中的逻辑信息的方法
    • US07495967B2
    • 2009-02-24
    • US11601710
    • 2006-11-20
    • Chao-I WuMing-Hsiu LeeTzu-Hsuan Hsu
    • Chao-I WuMing-Hsiu LeeTzu-Hsuan Hsu
    • G11C11/34
    • G11C16/0475
    • A method of identifying logical information in a cell, particularly in a programming by hot hole injection nitride electron storage (PHINES) cell by one-side reading scheme is disclosed. The method comprise steps of: erasing the first region and the second region of PHINES cell by increasing a local threshold voltage (Vt) to a certain value; programming at least one of the first region and the second region of the PHINES cell by hot hole injection; and reading a logical state of the PHINES cell by measuring an output current of one of the first region and the second region; wherein different quantity of the output current is caused by interaction between different quantity of the hot hole stored in the first region and the second region, so as to determine the logical state of the PHINES cell by one-side reading scheme.
    • 公开了一种识别单元中的逻辑信息的方法,特别是在通过单孔读取方案通过热空穴注入氮化物电子存储(PHINES)单元编程中的方法。 该方法包括以下步骤:通过将局部阈值电压(Vt)增加到一定值来擦除PHINES单元的第一区域和第二区域; 通过热空穴注入来编程PHINES单元的第一区域和第二区域中的至少一个; 以及通过测量所述第一区域和所述第二区域之一的输出电流来读取所述PHINES单元的逻辑状态; 其中,通过存储在第一区域和第二区域中的不同量的热孔之间的相互作用引起不同量的输出电流,以便通过单面读取方案确定PHINES单元的逻辑状态。
    • 7. 发明申请
    • 3D polysilicon ROM and method of fabrication thereof
    • 3D多晶硅ROM及其制造方法
    • US20050124116A1
    • 2005-06-09
    • US10728767
    • 2003-12-08
    • Tzu-Hsuan HsuMing-Hsiu LeeHsiang-Lan LungChao-I Wu
    • Tzu-Hsuan HsuMing-Hsiu LeeHsiang-Lan LungChao-I Wu
    • H01L21/336H01L27/06H01L31/113
    • H01L27/0688
    • A 3D polysilicon read only memory at least including: a silicon substrate, an isolated silicon dioxide (SiO2) layer, a N-Type heavily doped (N+) polysilicon layer, a first oxide layer, a dielectric layer, a P-Type lightly doped (P−) polysilicon layer, at least a neck structure, and a second oxide layer. The isolated SiO2 layer is deposited on the silicon substrate, and the N+ polysilicon layer is deposited on the isolated SiO2 layer. The N+ polysilicon layer is further defined a plurality of parallel, separate word lines (WL), and the first oxide layer is filled in the space between the word lines. The dielectric layer is deposited on the word lines and the first oxide layer. The P-Type lightly doped (P−) polysilicon layer is deposited on the dielectric layer and is further defined a plurality of parallel, separate bit lines (BL). The bit lines overlap the word lines, from a top view, to form a shape approximately as a cross. There are at least a neck structure individually formed between the first polysilicon layer and the second polysilicon layer by isotropy wet etching the dielectric layer, with using dilute hydrofluoric acid (HF) as the example. The second oxide layer is filled in the space between the bit lines and is on the word lines and the first oxide layer.
    • 至少包括硅衬底,隔离二氧化硅(SiO 2)层,N型重掺杂(N +)多晶硅层,第一氧化物层,电介质 层,P型轻掺杂(P)多晶硅层,至少颈部结构和第二氧化物层。 隔离的SiO 2层沉积在硅衬底上,并且N +多晶硅层沉积在隔离的SiO 2层上。 N +多晶硅层进一步限定多个平行的单独的字线(WL),并且第一氧化物层被填充在字线之间的空间中。 介电层沉积在字线和第一氧化物层上。 P型轻掺杂(P)多晶硅层沉积在电介质层上,并进一步限定多个平行的分开的位线(BL)。 位线从顶视图与字线重叠,以形成大致为十字形的形状。 通过使用稀氢氟酸(HF)作为实例,通过各向同性湿蚀刻介电层,至少在第一多晶硅层和第二多晶硅层之间形成颈部结构。 第二氧化物层填充在位线之间的空间中,并且位于字线和第一氧化物层上。
    • 9. 发明申请
    • Method of identifying logical information in a programming and erasing cell by on-side reading scheme
    • 通过旁路读取方案识别编程和擦除单元中的逻辑信息的方法
    • US20080084762A1
    • 2008-04-10
    • US11601710
    • 2006-11-20
    • Chao-I WuMing-Hsiu LeeTzu-Hsuan Hsu
    • Chao-I WuMing-Hsiu LeeTzu-Hsuan Hsu
    • G11C11/34
    • G11C16/0475
    • A method of identifying logical information in a cell, particularly in a programming by hot hole injection nitride electron storage (PHINES) cell by one-side reading scheme is disclosed. The method comprise steps of: erasing the first region and the second region of PHINES cell by increasing a local threshold voltage (Vt) to a certain value; programming at least one of the first region and the second region of the PHINES cell by hot hole injection; and reading a logical state of the PHINES cell by measuring an output current of one of the first region and the second region; wherein different quantity of the output current is caused by interaction between different quantity of the hot hole stored in the first region and the second region, so as to determine the logical state of the PHINES cell by one-side reading scheme.
    • 公开了一种识别单元中的逻辑信息的方法,特别是在通过单孔读取方案通过热空穴注入氮化物电子存储(PHINES)单元编程中的方法。 该方法包括以下步骤:通过将局部阈值电压(Vt)增加到一定值来擦除PHINES单元的第一区域和第二区域; 通过热空穴注入来编程PHINES单元的第一区域和第二区域中的至少一个; 以及通过测量所述第一区域和所述第二区域之一的输出电流来读取所述PHINES单元的逻辑状态; 其中,通过存储在第一区域和第二区域中的不同量的热孔之间的相互作用引起不同量的输出电流,以便通过单面读取方案确定PHINES单元的逻辑状态。
    • 10. 发明授权
    • Method of identifying logical information in a programming and erasing cell by on-side reading scheme
    • 通过旁路读取方案识别编程和擦除单元中的逻辑信息的方法
    • US07773430B2
    • 2010-08-10
    • US12314881
    • 2008-12-18
    • Chao-I WuMing-Hsiu LeeTzu-Hsuan Hsu
    • Chao-I WuMing-Hsiu LeeTzu-Hsuan Hsu
    • G11C11/34
    • G11C16/0475
    • A method of identifying logical information in a cell, particularly in a programming by hot hole injection nitride electron storage (PHINES) cell by one-side reading scheme is disclosed. The method comprise steps of: erasing the first region and the second region of PHINES cell by increasing a local threshold voltage (Vt) to a certain value; programming at least one of the first region and the second region of the PHINES cell by hot hole injection; and reading a logical state of the PHINES cell by measuring an output current of one of the first region and the second region; wherein different quantity of the output current is caused by interaction between different quantity of the hot hole stored in the first region and the second region, so as to determine the logical state of the PHINES cell by one-side reading scheme.
    • 公开了一种识别单元中的逻辑信息的方法,特别是在通过单孔读取方案通过热空穴注入氮化物电子存储(PHINES)单元编程中的方法。 该方法包括以下步骤:通过将局部阈值电压(Vt)增加到一定值来擦除PHINES单元的第一区域和第二区域; 通过热空穴注入来编程PHINES单元的第一区域和第二区域中的至少一个; 以及通过测量所述第一区域和所述第二区域之一的输出电流来读取所述PHINES单元的逻辑状态; 其中,通过存储在第一区域和第二区域中的不同量的热孔之间的相互作用引起不同量的输出电流,以便通过单面读取方案确定PHINES单元的逻辑状态。