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    • 2. 发明授权
    • Software module for integration
    • 集成软件模块
    • US07197742B2
    • 2007-03-27
    • US10258304
    • 2002-02-07
    • Hiroshi AritaAkira IkezoeKiyoshi YagiMinoru TakahashiTakeshi Fukazawa
    • Hiroshi AritaAkira IkezoeKiyoshi YagiMinoru TakahashiTakeshi Fukazawa
    • G06F9/44G06F9/45
    • G06F9/44521
    • The present invention relates to a software module, and, especially, relates to a software module for integration having severe restriction on the available memory amount and the real-time operation, and provides a software module for integration having increased inheritance in software. This is a software module for integration, integrated as a software module within a device to control the device. The software module has a public module for updating a public data value, an intermediate module for converting the data value in a predetermined data format updated in the public module into a data value in a predetermined data format adaptable to a referencing side, and a referencing module for referencing the data value in a predetermined data format converted by the intermediate module. The publication and referencing process can be implemented among the modules.
    • 软件模块技术领域本发明涉及一种软件模块,特别涉及一种用于集成的软件模块,其对可用存储量和实时操作具有严格的限制,并且提供了一种用于集成的软件模块,其具有增加的软件继承性。 这是用于集成的软件模块,集成为设备内的软件模块以控制设备。 软件模块具有用于更新公共数据值的公共模块,用于将以公共模块中更新的预定数据格式的数据值转换为可适应于参考侧的预定数据格式的数据值的中间模块,以及参考 模块,用于以由中间模块转换的预定数据格式引用数据值。 可以在模块之间实现发布和参考过程。
    • 7. 发明授权
    • Semiconductor integrated circuit having a tree circuit
    • 具有树电路的半导体集成电路
    • US4725742A
    • 1988-02-16
    • US865977
    • 1986-05-22
    • Hiroshi TachimoriHiroshi FukutaTakeshi FukazawaTakao OhkuboOsamu Takahashi
    • Hiroshi TachimoriHiroshi FukutaTakeshi FukazawaTakao OhkuboOsamu Takahashi
    • G11C17/18G11C8/10G11C11/34G11C11/413H03K19/177H03K19/017H03K19/094
    • G11C8/10
    • A semiconductor integrated circuit device has an address decoder which is constructed of a plurality of MOSFETs implemented in a switch tree. The switch tree includes first and second switch tree portions which are controlled `on` and `off` by the same input signals. A first switch branch in the first switch tree portion, which is constructed of a comparatively small number of MOSFETs, and a second switch branch in the second switch tree portion, which is constructed of a comparatively large number of MOSFETs, are controlled `one` and `off` by the same input signal, while a second switch branch in the first switch tree portion, which is constructed of a comparatively large number of MOSFETs, and a first switch branch in the second switch tree portion, which is constructed of a comparatively small number of MOSFETs, are controlled `on` and `off` by the same input signal. This construction is effective to lessen an increase in the number of MOSFETs which are to be coupled to the input lines of the address decoder.
    • 半导体集成电路器件具有由在开关树中实现的多个MOSFET构成的地址译码器。 开关树包括通过相同输入信号被控制为“开”和“关”的第一和第二开关树部分。 由较少数量的MOSFET构成的第一开关树部分中的第一开关分支和由相对大量的MOSFET构成的第二开关树部分中的第二开关分支被控制为“一” 并且通过相同的输入信号“关”,而由第二开关树部分构成的第一开关树部分中的第二开关分支和由第二开关树部分构成的第一开关分支,其由 相对较少数量的MOSFET通过相同的输入信号被控制为“开”和“关”。 这种结构对于减少要耦合到地址解码器的输入线的MOSFET的数量的增加是有效的。