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    • 1. 发明授权
    • Lateral power MOSFET with high breakdown voltage and low on-resistance
    • 具有高击穿电压和低导通电阻的侧向功率MOSFET
    • US08129783B2
    • 2012-03-06
    • US12329285
    • 2008-12-05
    • Tsung-Yi HuangPuo-Yu ChiangRuey-Hsin LiuShun-Liang Hsu
    • Tsung-Yi HuangPuo-Yu ChiangRuey-Hsin LiuShun-Liang Hsu
    • H01L29/78
    • H01L29/0847H01L29/063H01L29/0634H01L29/0878H01L29/42368H01L29/66659H01L29/7835
    • A semiconductor device with high breakdown voltage and low on-resistance is provided. An embodiment comprises a substrate having a buried layer in a portion of the top region of the substrate in order to extend the drift region. A layer is formed over the buried layer and the substrate, and high-voltage N-well and P-well regions are formed adjacent to each other. Field dielectrics are located over portions of the high-voltage N-wells and P-wells, and a gate dielectric and a gate conductor are formed over the channel region between the high-voltage P-well and the high-voltage N-well. Source and drain regions for the transistor are located in the high-voltage P-well and high-voltage N-well. Optionally, a P field ring is formed in the N-well region under the field dielectric. In another embodiment, a lateral power superjunction MOSFET with partition regions located in the high-voltage N-well is manufactured with an extended drift region.
    • 提供具有高击穿电压和低导通电阻的半导体器件。 一个实施例包括在衬底的顶部区域的一部分中具有掩埋层的衬底,以便延伸漂移区域。 在掩埋层和衬底之上形成层,并且彼此相邻地形成高压N阱和P阱区。 场电介质位于高压N阱和P阱的部分上方,并且在高压P阱和高压N阱之间的沟道区上形成栅极电介质和栅极导体。 晶体管的源极和漏极区位于高压P阱和高压N阱中。 可选地,在场电介质下的N阱区域中形成P场环。 在另一个实施例中,具有位于高压N阱中的分配区域的横向功率超结MOSFET被制造为具有延伸漂移区域。
    • 3. 发明申请
    • Lateral power MOSFET with high breakdown voltage and low on-resistance
    • 具有高击穿电压和低导通电阻的侧向功率MOSFET
    • US20080090347A1
    • 2008-04-17
    • US11581178
    • 2006-10-13
    • Tsung-Yi HuangPuo-Yu ChiangRuey-Hsin LiuShun-Liang Hsu
    • Tsung-Yi HuangPuo-Yu ChiangRuey-Hsin LiuShun-Liang Hsu
    • H01L21/8234H01L21/336
    • H01L29/0847H01L29/063H01L29/0634H01L29/0878H01L29/42368H01L29/66659H01L29/7835
    • A semiconductor device with high breakdown voltage and low on-resistance is provided. An embodiment comprises a substrate having a buried layer in a portion of the top region of the substrate in order to extend the drift region. A layer is formed over the buried layer and the substrate, and high-voltage N-well and P-well regions are formed adjacent to each other. Field dielectrics are located over portions of the high-voltage N-wells and P-wells, and a gate dielectric and a gate conductor are formed over the channel region between the high-voltage P-well and the high-voltage N-well. Source and drain regions for the transistor are located in the high-voltage P-well and high-voltage N-well. Optionally, a P field ring is formed in the N-well region under the field dielectric. In another embodiment, a lateral power superjunction MOSFET with partition regions located in the high-voltage N-well is manufactured with an extended drift region.
    • 提供具有高击穿电压和低导通电阻的半导体器件。 一个实施例包括在衬底的顶部区域的一部分中具有掩埋层的衬底,以便延伸漂移区域。 在掩埋层和衬底之上形成层,并且彼此相邻地形成高压N阱和P阱区。 场电介质位于高压N阱和P阱的部分上方,并且在高压P阱和高压N阱之间的沟道区上形成栅极电介质和栅极导体。 晶体管的源极和漏极区位于高压P阱和高压N阱中。 可选地,在场电介质下的N阱区域中形成P场环。 在另一个实施例中,具有位于高压N阱中的分配区域的横向功率超结MOSFET被制造为具有延伸漂移区域。
    • 7. 发明申请
    • Lateral Power MOSFET with High Breakdown Voltage and Low On-Resistance
    • 具有高击穿电压和低导通电阻的侧向功率MOSFET
    • US20090085101A1
    • 2009-04-02
    • US12329285
    • 2008-12-05
    • Tsung-Yi HuangPuo-Yu ChiangRuey-Hsin LiuShun-Liang Hsu
    • Tsung-Yi HuangPuo-Yu ChiangRuey-Hsin LiuShun-Liang Hsu
    • H01L29/78
    • H01L29/0847H01L29/063H01L29/0634H01L29/0878H01L29/42368H01L29/66659H01L29/7835
    • A semiconductor device with high breakdown voltage and low on-resistance is provided. An embodiment comprises a substrate having a buried layer in a portion of the top region of the substrate in order to extend the drift region. A layer is formed over the buried layer and the substrate, and high-voltage N-well and P-well regions are formed adjacent to each other. Field dielectrics are located over portions of the high-voltage N-wells and P-wells, and a gate dielectric and a gate conductor are formed over the channel region between the high-voltage P-well and the high-voltage N-well. Source and drain regions for the transistor are located in the high-voltage P-well and high-voltage N-well. Optionally, a P field ring is formed in the N-well region under the field dielectric. In another embodiment, a lateral power superjunction MOSFET with partition regions located in the high-voltage N-well is manufactured with an extended drift region.
    • 提供具有高击穿电压和低导通电阻的半导体器件。 一个实施例包括在衬底的顶部区域的一部分中具有掩埋层的衬底,以便延伸漂移区域。 在掩埋层和衬底之上形成层,并且彼此相邻地形成高压N阱和P阱区。 场电介质位于高压N阱和P阱的部分上方,并且在高压P阱和高压N阱之间的沟道区上形成栅极电介质和栅极导体。 晶体管的源极和漏极区位于高压P阱和高压N阱中。 可选地,在场电介质下的N阱区域中形成P场环。 在另一个实施例中,具有位于高压N阱中的分配区域的横向功率超结MOSFET被制造为具有延伸漂移区域。
    • 8. 发明授权
    • Lateral power MOSFET with high breakdown voltage and low on-resistance
    • 具有高击穿电压和低导通电阻的侧向功率MOSFET
    • US07476591B2
    • 2009-01-13
    • US11581178
    • 2006-10-13
    • Tsung-Yi HuangPuo-Yu ChiangRuey-Hsin LiuShun-Liang Hsu
    • Tsung-Yi HuangPuo-Yu ChiangRuey-Hsin LiuShun-Liang Hsu
    • H01L21/336
    • H01L29/0847H01L29/063H01L29/0634H01L29/0878H01L29/42368H01L29/66659H01L29/7835
    • A semiconductor device with high breakdown voltage and low on-resistance is provided. An embodiment comprises a substrate having a buried layer in a portion of the top region of the substrate in order to extend the drift region. A layer is formed over the buried layer and the substrate, and high-voltage N-well and P-well regions are formed adjacent to each other. Field dielectrics are located over portions of the high-voltage N-wells and P-wells, and a gate dielectric and a gate conductor are formed over the channel region between the high-voltage P-well and the high-voltage N-well. Source and drain regions for the transistor are located in the high-voltage P-well and high-voltage N-well. Optionally, a P field ring is formed in the N-well region under the field dielectric. In another embodiment, a lateral power superjunction MOSFET with partition regions located in the high-voltage N-well is manufactured with an extended drift region.
    • 提供具有高击穿电压和低导通电阻的半导体器件。 一个实施例包括在衬底的顶部区域的一部分中具有掩埋层的衬底,以便延伸漂移区域。 在掩埋层和衬底之上形成层,并且彼此相邻地形成高压N阱和P阱区。 场电介质位于高压N阱和P阱的部分上方,并且在高压P阱和高压N阱之间的沟道区上形成栅极电介质和栅极导体。 晶体管的源极和漏极区位于高压P阱和高压N阱中。 可选地,在场电介质下的N阱区域中形成P场环。 在另一个实施例中,具有位于高压N阱中的分配区域的横向功率超结MOSFET被制造为具有延伸漂移区域。