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    • 5. 发明授权
    • Output image data generating device and method of generating output image data
    • 输出图像数据生成装置及其生成输出图像数据的方法
    • US08645818B2
    • 2014-02-04
    • US12806142
    • 2010-08-06
    • Naoki Kuwata
    • Naoki Kuwata
    • G06F17/00
    • G06F3/1242G06F3/1208G06T11/60H04N1/00132H04N1/00188H04N1/00196H04N1/3871H04N5/272
    • A CPU selects multiple objective image data to be pasted on ornamental image data, analyzes the selected multiple objective image data, and rates the image qualities of the respective image data. The CPU specifies the number of plural layout locations included in the ornamental image data and the priority order of the plural layout locations, and allocates the multiple objective image data to the plural layout locations in the ornamental image data, based on the specified priority order and the ratings of the multiple objective image data. The CPU executes image quality adjustment with regard to the multiple objective image data allocated to the plural layout locations and pastes the quality-adjusted image data on the ornamental image data according to layout control information, so as to generate resulting output image data.
    • CPU选择要粘贴在装饰图像数据上的多个目标图像数据,分析所选择的多个目标图像数据,并对各个图像数据的图像质量进行评价。 CPU指定装饰图像数据中包括的多个布局位置的数量和多个布局位置的优先级顺序,并且基于指定的优先级顺序将多目标图像数据分配到装饰图像数据中的多个布局位置,以及 多目标图像数据的等级。 CPU根据分配给多个布局位置的多目标图像数据执行图像质量调整,并且根据布局控制信息将质量调整图像数据粘贴在装饰图像数据上,以产生所得到的输出图像数据。
    • 7. 发明授权
    • Skew adjusting circuit and method for parallel signals
    • 用于并行信号的倾斜调节电路和方法
    • US07441139B2
    • 2008-10-21
    • US11284333
    • 2005-11-21
    • Naoki Kuwata
    • Naoki Kuwata
    • G06F11/00H04L7/00
    • H04L7/0008H04L25/14
    • The skew adjusting circuit for parallel signals includes: a deskew signal generating circuit which generates a deskew signal by performing a predetermined logical operation and transmits the deskew signal to a receiving circuit; a skew detecting circuit which detects the skew by obtaining correlation between the deskew signal and the data signal and then obtaining an average value of the correlation; and a delay amount adjusting circuit which adjusts the skew by controlling the amount of delay of the data signal in accordance with the average value obtained by the skew detecting circuit. As a result, it is possible to reduce power consumption and circuit size, while suppressing the number of logic processing circuits to be added for skew adjustment, when parallel signals are transmitted in circuits which needs high-speed characteristic.
    • 用于并行信号的偏斜调整电路包括:去歪斜信号发生电路,通过执行预定的逻辑操作产生一个去歪斜信号,并将该去歪斜信号发送到接收电路; 偏斜检测电路,通过获得所述去偏移信号与所述数据信号之间的相关性,然后获得所述相关的平均值来检测所述偏斜; 以及延迟量调整电路,其通过根据由偏斜检测电路获得的平均值控制数据信号的延迟量来调整偏斜。 结果,当在需要高速特性的电路中传输并行信号时,可以减少功耗和电路尺寸,同时抑制用于歪斜调整的逻辑处理电路的数量。