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    • 4. 发明申请
    • BOBBIN OF TRANSFORMER
    • 变压器BOBBIN
    • US20110221562A1
    • 2011-09-15
    • US13045266
    • 2011-03-10
    • Hsin-Wei TsaiYi-Lin ChenChing-Hsing TienTi-Chin Chen
    • Hsin-Wei TsaiYi-Lin ChenChing-Hsing TienTi-Chin Chen
    • H01F27/28
    • H01F27/2828H01F27/325H01F2027/065
    • A bobbin of a transformer includes a main body and plural connecting bases. The main body has two side plates. The two side plates are respectively disposed on two opposite sides of the main body. A winding section is defined within the two side plates for winding a winding coil. The plural connecting bases are disposed on the two opposite sides of the main body and connected with the side plates. Plural wire-arranging grooves are formed in a bottom surface of each connecting base. Each side plate has an inner recess in communication with a corresponding wire-arranging groove. An initial winding segment of the winding coil is accommodated within the wire-arranging groove and the inner recess, thereby preventing the winding coil from rubbing against the initial winding segment during the winding coil is wound on the winding section.
    • 变压器的线轴包括主体和多个连接基座。 主体有两个侧板。 两个侧板分别设置在主体的相对两侧。 绕组部分被限定在用于缠绕绕组线圈的两个侧板内。 多个连接基座设置在主体的两个相对侧并与侧板连接。 在每个连接基座的底面形成有多个线排列槽。 每个侧板具有与相应的线排列槽连通的内凹槽。 卷绕线圈的初始卷绕部分容纳在线排列槽和内凹槽内,从而防止卷绕线圈在卷绕线圈缠绕在绕组部分时与初始卷绕部分摩擦。
    • 5. 发明授权
    • Clock generating circuit and digital circuit system incorporating the same
    • 时钟发生电路和并入其的数字电路系统
    • US07937608B2
    • 2011-05-03
    • US11965736
    • 2007-12-28
    • Yi-Lin Chen
    • Yi-Lin Chen
    • G06F1/00G06F1/04
    • G06F1/06
    • A digital circuit system includes: a register, for receiving and registering digital data; an operation unit, for operating and generating resulting data according to the digital data registered in the first registering unit; a second register, for receiving and registering the resulting data; a multi-phase clock signal generating unit, for generating a plurality of reference clock signals having different phases with each other; a first selector, for selecting one of the reference clock signals to output a first clock signal to the first registering unit; and a second selector, for selecting another of the reference clock signals to output a second clock signal to the second registering unit.
    • 数字电路系统包括:用于接收和注册数字数据的寄存器; 操作单元,用于根据登记在第一登记单元中的数字数据来操作和生成结果数据; 第二个寄存器,用于接收和注册结果数据; 多相时钟信号产生单元,用于产生具有彼此不同相位的多个参考时钟信号; 第一选择器,用于选择参考时钟信号之一以将第一时钟信号输出到第一注册单元; 以及第二选择器,用于选择另一个参考时钟信号以将第二时钟信号输出到第二注册单元。
    • 7. 发明申请
    • STRUCTURE OF TRANSFORMER
    • 变压器结构
    • US20090278646A1
    • 2009-11-12
    • US12334810
    • 2008-12-15
    • Yi-Lin ChenHsin-Wei TsaiBou-Jun ZungChia-Hung PaiShih-Hsien Chang
    • Yi-Lin ChenHsin-Wei TsaiBou-Jun ZungChia-Hung PaiShih-Hsien Chang
    • H01F17/04
    • H01F27/325H01F38/08H01F38/42H01F2005/022H01F2005/043
    • A transformer includes multiple bobbins arranged side by side, a primary winding coil, a secondary winding coil and a magnetic core assembly. Each bobbin includes a main body, multiple partition plates, a primary winding coil, a secondary winding coil and a magnetic core assembly. The main body has at least two sidewalls respectively disposed at two opposite ends thereof. The partition plates are disposed on the main body for respectively cooperating with the sidewalls to define a first winding region and a second winding region. The first winding region and the second winding region are separated by the partitions plates. The spacer is disposed within the channel. The primary winding coil and the secondary winding coil are respectively wound on the first winding portion and the second winding portion of each bobbin. The magnetic core assembly partially embedded into the channels of the bobbins and sustained against the spacer.
    • 变压器包括并排布置的多个线轴,初级绕组线圈,次级绕组线圈和磁芯组件。 每个线轴包括主体,多个隔板,初级绕组线圈,次级绕组线圈和磁芯组件。 主体具有分别设置在其两个相对端的至少两个侧壁。 分隔板设置在主体上,用于分别与侧壁配合以限定第一绕组区域和第二绕组区域。 第一绕组区域和第二绕组区域被隔板隔开。 间隔件设置在通道内。 初级绕组线圈和次级绕组线圈分别卷绕在每个线轴的第一绕组部分和第二绕组部分上。 磁芯组件部分地嵌入线轴的通道并且抵靠间隔件。
    • 8. 发明申请
    • TIME TO DIGITAL CONVERTING CIRCUIT AND RELATED METHOD
    • 数字转换电路及相关方法
    • US20090195429A1
    • 2009-08-06
    • US12357403
    • 2009-01-22
    • Yi-Lin Chen
    • Yi-Lin Chen
    • H03M1/12
    • G04F10/005
    • A TDC circuit includes: a first delay circuit, including at least one first delay stage for delaying a first input signal to generate a first output signal; a second delay circuit, including at least one second delay stage for delaying a second input signal to generate a second output signal; a first counter, for computing the first output signal to generate a first counter value; a second counter, for computing the second output signal to generate a second counter value; and a comparator, for comparing the first counter value and the second counter value to generate a comparing result signal; wherein the first delay stage has a larger delay amount than the second delay stage, the first counter starts before the second counter, and the comparator outputs the comparing result signal when the second counter value falls within a predetermined range of the first counter value.
    • TDC电路包括:第一延迟电路,包括用于延迟第一输入信号以产生第一输出信号的至少一个第一延迟级; 第二延迟电路,包括用于延迟第二输入信号以产生第二输出信号的至少一个第二延迟级; 第一计数器,用于计算第一输出信号以产生第一计数器值; 第二计数器,用于计算第二输出信号以产生第二计数器值; 以及比较器,用于比较所述第一计数器值和所述第二计数器值以产生比较结果信号; 其中所述第一延迟级具有比所述第二延迟级更大的延迟量,所述第一计数器在所述第二计数器之前开始,并且当所述第二计数器值落在所述第一计数器值的预定范围内时,所述比较器输出所述比较结果信号。
    • 9. 发明申请
    • DEVICE FOR ADJUSTING CHIP OUTPUT CURRENT AND METHOD FOR THE SAME
    • 调整芯片输出电流的装置及其相关方法
    • US20090066373A1
    • 2009-03-12
    • US12204067
    • 2008-09-04
    • Yi-Lin Chen
    • Yi-Lin Chen
    • G05F1/10
    • G06F13/4072G11C7/1078G11C7/1084
    • A device for adjusting chip output current and a method for the same are provided. The device includes: a driving circuit for outputting a driving current according to a control signal, wherein the driving current flows to a reference resistor in another chip so as to generate an output voltage; and a detecting circuit coupled to the driving circuit and adapted for detecting the output voltage and a reference voltage, so as to generate the control signal; wherein the control signal controls the number of parallel connections of NMOS transistors or PMOS transistors in the driving circuit, so as to adjust the magnitude of the driving current.
    • 提供了一种用于调整芯片输出电流的装置及其方法。 该装置包括:驱动电路,用于根据控制信号输出驱动电流,其中驱动电流流向另一芯片中的参考电阻器,以产生输出电压; 以及耦合到所述驱动电路并适于检测所述输出电压和参考电压的检测电路,以便产生所述控制信号; 其中所述控制信号控制所述驱动电路中的NMOS晶体管或PMOS晶体管的并联数量,以便调节所述驱动电流的大小。