专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08024682B2 Global statistical optimization, characterization, and design 有权
标题翻译：全局统计优化，表征和设计
公开(公告)号：US08024682B2
公开(公告)日：2011-09-20
申请号：US12396972
申请日：2009-03-03
申请人： Trent Lorne McConaghy , Pat Drennan , Joel Cooper , Jeffrey Dyck , David Callele , Shawn Rusaw , Samer Sallam , Jiangdon Ge , Anthony Arkles , Kristopher Breen , Sean Cocks
发明人： Trent Lorne McConaghy , Pat Drennan , Joel Cooper , Jeffrey Dyck , David Callele , Shawn Rusaw , Samer Sallam , Jiangdon Ge , Anthony Arkles , Kristopher Breen , Sean Cocks
IPC分类号： G06F17/50
CPC分类号： G06F17/5063
摘要： For application to analog, mixed-signal, and custom digital circuits, a system and method to do: global statistical optimization (GSO), global statistical characterization (GSC), global statistical design (GSD), and block-specific design. GSO can perform global yield optimization on hundreds of variables, with no simplifying assumptions. GSC can capture and display mappings from design variables to performance, across the whole design space. GSC can handle hundreds of design variables in a reasonable time frame, e.g., in less than a day, for a reasonable number of simulations, e.g., less than 100,000. GSC can capture design variable interactions and other possible nonlinearities, explicitly capture uncertainties, and intuitively display them. GSD can support the user's exploration of design-to-performance mappings with fast feedback, thoroughly capturing design variable interactions in the whole space, and allow for more efficiently created, more optimal designs. Block-specific design should make it simple to design small circuit blocks, in less time and with lower overhead than optimization through optimization.
摘要翻译：对于应用于模拟，混合信号和定制数字电路的系统和方法：全局统计优化（GSO），全局统计特征（GSC），全局统计设计（GSD）和块特定设计。 GSO可以对数百个变量执行全局收益优化，而不需要简化假设。 GSC可以在整个设计空间中捕获并显示从设计变量到性能的映射。 GSC可以在合理的时间范围内处理数百个设计变量，例如在不到一天的时间内，对于合理数量的模拟，例如小于100,000。 GSC可以捕获设计变量交互和其他可能的非线性，明确地捕获不确定性，并直观显示它们。 GSD可以通过快速反馈支持用户对设计到性能映射的探索，彻底地捕获整个空间中的设计变量交互，并允许更有效地创建，更优化的设计。块特定设计应使设计小电路块的设计变得简单，在优化过程中，在更短的时间内和更低的开销。

2. 发明授权

US08589138B2 On-the-fly improvement of certainty of statistical estimates in statistical design, with corresponding visual feedback 有权
标题翻译：在统计设计中即时提高统计估计的确定性，并具有相应的视觉反馈
公开(公告)号：US08589138B2
公开(公告)日：2013-11-19
申请号：US12131294
申请日：2008-06-02
申请人： Trent Lorne McConaghy , Charles Cazabon , Kristopher Breen , Amit Gupta , Jeffrey Dyck , Jiandong Ge , David Callele , Shawn Rusaw , Joel Cooper , Anthony Arkles , Samer Sallam , Jason Coutu
发明人： Trent Lorne McConaghy , Charles Cazabon , Kristopher Breen , Amit Gupta , Jeffrey Dyck , Jiandong Ge , David Callele , Shawn Rusaw , Joel Cooper , Anthony Arkles , Samer Sallam , Jason Coutu
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： A system and method to analyze analog, mixed-signal, and custom digital circuits. The system and method displays to a user characteristic values of a circuit and statistical uncertainty values of the characteristic values early in a sampling or characterization run of the circuit. The characteristic values and their statistical uncertainties are updated as the sampling or characterization run progresses. The user can halt the sampling or characterization run once a desired level of uncertainty is attained. The system can automatically halt the sampling or characterization run, once the statistical uncertainty lie within a pre-determined range.
摘要翻译：一种分析模拟，混合信号和定制数字电路的系统和方法。该系统和方法向用户显示电路的特征值和电路的采样或表征运行中的特征值的统计不确定性值。特征值及其统计不确定度随着抽样或表征运行的进行而被更新。一旦达到所需的不确定度水平，用户就可以停止取样或表征运行。一旦统计不确定度处于预定范围内，系统就可以自动停止采样或特性运行。

3. 发明授权

US08074189B2 Pruning-based variation-aware design 有权
标题翻译：基于修剪的变异感知设计
公开(公告)号：US08074189B2
公开(公告)日：2011-12-06
申请号：US12366239
申请日：2009-02-05
申请人： Trent Lorne McConaghy , Jeffrey Dyck , Samer Sallam , Kristopher Breen , Joel Cooper , Jiandong Ge
发明人： Trent Lorne McConaghy , Jeffrey Dyck , Samer Sallam , Kristopher Breen , Joel Cooper , Jiandong Ge
IPC分类号： G06F17/50
CPC分类号： G06F17/5036 , G06F2217/10
摘要： For application to analog, mixed-signal, and custom digital circuits, a system and method to begin with a complex problem description that encompasses many variables from statistical manufacturing, the circuit's environment, and the circuit's design parameters, but then apply techniques to prune the scope of the problem to make it manageable for manual design and more efficient automated design, and finally use that pruned problem for more efficient and effective design.
摘要翻译：对于应用于模拟，混合信号和定制数字电路的系统和方法，从复杂的问题描述开始，包括统计制造，电路环境和电路设计参数中的许多变量，然后应用技术来修剪问题的范围使其易于手动设计和更有效的自动化设计，最后使用修剪的问题来更有效和有效的设计。

4. 发明申请

US20110055782A1 PROXIMITY-AWARE CIRCUIT DESIGN METHOD 有权
标题翻译：临近电路设计方法
公开(公告)号：US20110055782A1
公开(公告)日：2011-03-03
申请号：US12870559
申请日：2010-08-27
申请人： Patrick G. DRENNAN , Ryan Silk , Joel Cooper , Jeffrey Dyck , Samer Sallam , Trent Lorne McCONAGHY
发明人： Patrick G. DRENNAN , Ryan Silk , Joel Cooper , Jeffrey Dyck , Samer Sallam , Trent Lorne McCONAGHY
IPC分类号： G06F17/50
CPC分类号： G06F17/5068
摘要： A method for proximity-aware circuit design where a set of layout constraint values that satisfy predetermined performance or yield goals is determined in accordance with a layout effect model. One of the layout constraint values is then selected as a constraint input to layout design, and a design layout is performed with the selected layout constraint value to provide a semiconductor circuit design for the semiconductor circuit. The set of layout constraint values can be determined by varying an instance parameter of the layout effect model to determine a set of instance parameters that satisfy the at least one predetermined performance or yield goal in accordance with the layout effect model, and determining layout constraints associated with each instance parameter of the set of instance parameters, thus providing a number of candidates in a design space that can be evaluated according to performance and/or yield tradeoffs.
摘要翻译：一种用于接近感知电路设计的方法，其中根据布局效应模型确定满足预定性能或产量目标的一组布局约束值。然后选择布局约束值中的一个作为布局设计的约束输入，并且利用所选择的布局约束值执行设计布局，以为半导体电路提供半导体电路设计。可以通过改变布局效应模型的实例参数来确定一组布局约束值，以根据布局效应模型来确定满足至少一个预定表现或收益目标的一组实例参数，并且确定相关联的布局约束与实例参数集合的每个实例参数，从而在可以根据性能和/或产出权衡来评估的设计空间中提供多个候选。

5. 发明授权

US08281270B2 Method and system for proximity-aware circuit design 有权
标题翻译：接近感知电路设计方法与系统
公开(公告)号：US08281270B2
公开(公告)日：2012-10-02
申请号：US12870559
申请日：2010-08-27
申请人： Patrick G. Drennan , Ryan Silk , Joel Cooper , Jeffrey Dyck , Samer Sallam , Trent Lome McConaghy
发明人： Patrick G. Drennan , Ryan Silk , Joel Cooper , Jeffrey Dyck , Samer Sallam , Trent Lome McConaghy
IPC分类号： G06F17/50
CPC分类号： G06F17/5068
摘要： A method for proximity-aware circuit design where a set of layout constraint values that satisfy predetermined performance or yield goals is determined in accordance with a layout effect model. One of the layout constraint values is then selected as a constraint input to layout design, and a design layout is performed with the selected layout constraint value to provide a semiconductor circuit design for the semiconductor circuit. The set of layout constraint values can be determined by varying an instance parameter of the layout effect model to determine a set of instance parameters that satisfy the at least one predetermined performance or yield goal in accordance with the layout effect model, and determining layout constraints associated with each instance parameter of the set of instance parameters, thus providing a number of candidates in a design space that can be evaluated according to performance and/or yield tradeoffs.
摘要翻译：一种用于接近感知电路设计的方法，其中根据布局效应模型确定满足预定性能或产量目标的一组布局约束值。然后选择布局约束值中的一个作为布局设计的约束输入，并且利用所选择的布局约束值执行设计布局，以为半导体电路提供半导体电路设计。可以通过改变布局效应模型的实例参数来确定一组布局约束值，以根据布局效应模型来确定满足至少一个预定表现或收益目标的一组实例参数，并且确定相关联的布局约束与实例参数集合的每个实例参数，从而在可以根据性能和/或产出权衡来评估的设计空间中提供多个候选。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式