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1. 发明申请

US20110055782A1 PROXIMITY-AWARE CIRCUIT DESIGN METHOD 有权
标题翻译：临近电路设计方法
公开(公告)号：US20110055782A1
公开(公告)日：2011-03-03
申请号：US12870559
申请日：2010-08-27
申请人： Patrick G. DRENNAN , Ryan Silk , Joel Cooper , Jeffrey Dyck , Samer Sallam , Trent Lorne McCONAGHY
发明人： Patrick G. DRENNAN , Ryan Silk , Joel Cooper , Jeffrey Dyck , Samer Sallam , Trent Lorne McCONAGHY
IPC分类号： G06F17/50
CPC分类号： G06F17/5068
摘要： A method for proximity-aware circuit design where a set of layout constraint values that satisfy predetermined performance or yield goals is determined in accordance with a layout effect model. One of the layout constraint values is then selected as a constraint input to layout design, and a design layout is performed with the selected layout constraint value to provide a semiconductor circuit design for the semiconductor circuit. The set of layout constraint values can be determined by varying an instance parameter of the layout effect model to determine a set of instance parameters that satisfy the at least one predetermined performance or yield goal in accordance with the layout effect model, and determining layout constraints associated with each instance parameter of the set of instance parameters, thus providing a number of candidates in a design space that can be evaluated according to performance and/or yield tradeoffs.
摘要翻译：一种用于接近感知电路设计的方法，其中根据布局效应模型确定满足预定性能或产量目标的一组布局约束值。然后选择布局约束值中的一个作为布局设计的约束输入，并且利用所选择的布局约束值执行设计布局，以为半导体电路提供半导体电路设计。可以通过改变布局效应模型的实例参数来确定一组布局约束值，以根据布局效应模型来确定满足至少一个预定表现或收益目标的一组实例参数，并且确定相关联的布局约束与实例参数集合的每个实例参数，从而在可以根据性能和/或产出权衡来评估的设计空间中提供多个候选。

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