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1. 发明授权

US4233615A Semiconductor integrated circuit device 失效
标题翻译：半导体集成电路器件
公开(公告)号：US4233615A
公开(公告)日：1980-11-11
申请号：US933045
申请日：1978-08-10
申请人： Toyoki Takemoto , Tadao Komeda , Haruyasu Yamada , Michihiro Inoue
发明人： Toyoki Takemoto , Tadao Komeda , Haruyasu Yamada , Michihiro Inoue
IPC分类号： H01L29/80 , H01L21/337 , H01L21/8222 , H01L21/8248 , H01L27/06 , H01L29/78 , H01L29/808
CPC分类号： H01L29/78 , H01L29/808
摘要： An IC device comprising a junction type field effect transistor of a back gate type and a bipolar device such as a bipolar transistor and a resistor made of impurity diffused region, wherein an extremely thin (in the order of 0.05-0.2 .mu.m) impurity doped surface region of a conductivity type same as that of a back gate region is formed at the surface of a surface channel region, and is separated from at least a drain region to sustain high breakdown voltage between gate region and the drain region; the impurity surface region serving to reduce noise and also enabling to achieve satisfactory characteristics of J-FET and also good ohmic characteristics of the resistor.
摘要翻译：一种IC器件，包括背栅型的结型场效应晶体管和双极晶体管的双极器件和由杂质扩散区域制成的电阻器，其中极薄（约0.05-0.2μm）的杂质掺杂在表面沟道区域的表面形成与背栅极区域相同的导电类型的表面区域，并且至少从漏极区域分离以维持栅极区域与漏极区域之间的高的击穿电压; 杂质表面区域用于降低噪声，并且还能够实现令人满意的J-FET特性和电阻器的良好欧姆特性。

2. 发明授权

US4417233A Fully parallel threshold type analog-to-digital converter 失效
标题翻译：全并联门限类型模数转换器
公开(公告)号：US4417233A
公开(公告)日：1983-11-22
申请号：US123646
申请日：1980-02-22
申请人： Michihiro Inoue , Toyoki Takemoto , Haruyasu Yamada
发明人： Michihiro Inoue , Toyoki Takemoto , Haruyasu Yamada
IPC分类号： H03M1/00 , H03K13/03
CPC分类号： H03M1/361
摘要： A parallel type A/D converter capable of operating at an extremely high speed with a high degree of accuracy and with low power consumption. A plurality of comparators each having a reference voltage corresponding to an assigned quantizing level are disposed in parallel with each other and divided into a plurality of comparator blocks or groups. A plurality of sub-comparators are provided so that prior to the comparison of the input signal by the comparators, the input signal is first compared with the reference voltages of the sub-comparators and in response to the output from the sub-comparator having the reference voltage comparable or corresponding to the incoming input signal, only the comparators in the comparator block or group associated with said sub-comparator are energized or enabled while the remaining comparators are kept de-energized or disabled, whereby a minimum power consumption may be attained.
摘要翻译：一种并联型A / D转换器，能够以极高的精度和低功耗运行。每个具有与分配的量化电平相对应的参考电压的多个比较器彼此并联设置并分成多个比较器块或组。提供多个子比较器，使得在比较器比较输入信号之前，首先将输入信号与子比较器的参考电压进行比较，并且响应于具有该比较器的子比较器的输出与输入输入信号相当或对应的参考电压，只有与所述子比较器相关联的比较器块或组中的比较器通电或使能，而剩余的比较器保持断电或禁用，从而可以获得最小的功率消耗。

3. 发明授权

US4496935A Analog-digital converter with linear characteristic restoration circuit 失效
标题翻译：具有线性特征恢复电路的模拟数字转换器
公开(公告)号：US4496935A
公开(公告)日：1985-01-29
申请号：US368814
申请日：1982-04-15
申请人： Michihiro Inoue , Akira Matsuzawa , Toyoki Takemoto
发明人： Michihiro Inoue , Akira Matsuzawa , Toyoki Takemoto
IPC分类号： H03M1/36 , H03M1/00 , H03K13/175
CPC分类号： H03M1/06 , H03M1/361
摘要： A parallel type analog-digital converter having a plural number (1023) of comparators, a first voltage divider comprising a plural number (1023) of resistors (R.sub.1 to R.sub.1023) connected in series across positive and negative terminals of a power source thereby feeding reference voltages from the junction points to the comparators, the apparatus further comprisesa second voltage divider comprising a second plural number (8) of resistors (r.sub.1, r.sub.2 . . . r.sub.8) connected in series across the voltage feeding terminals thereby feeding input voltages to input terminals of the current amplifiers D.sub.1, D.sub.2 . . . D.sub.8, the output of which is given to the corresponding junction points of the first voltage divider, thereby to equalize voltages of said first voltage divider with voltages of corresponding junction points of said second voltage divider.
摘要翻译：一种具有多个（1023）比较器的并联型模拟数字转换器，包括多个（1023）电阻器（R1至R1023）的第一分压器，其串联连接在电源的正极和负极端子上，从而馈送基准电压从结点到比较器，该装置还包括一个第二分压器，包括在电压馈电端子上串联连接的第二多个（8）电阻器（r1，r2 ... r8），从而将输入电压馈送到输入端电流放大器D1，D2的端子。。。 D8，其输出被提供给第一分压器的对应连接点，从而使所述第一分压器的电压与所述第二分压器的对应连接点的电压相等。

4. 发明授权

US4201106A Electronic musical instrument 失效
标题翻译：电子乐器
公开(公告)号：US4201106A
公开(公告)日：1980-05-06
申请号：US799316
申请日：1977-05-23
申请人： Takeji Kimura , Toyoki Takemoto , Michihiro Inoue , Masaharu Sato
发明人： Takeji Kimura , Toyoki Takemoto , Michihiro Inoue , Masaharu Sato
IPC分类号： G10H1/057 , G10H1/18 , G10H7/00 , G10H3/00 , G10H1/02
CPC分类号： G10H1/182 , G10H1/057 , G10H7/00 , Y10S84/07
摘要： The present invention is an electronic musical instrument the type in which information of the actuation of keys is detected by scanning the keys of a keyboard. The electronic musical instrument includes keys selectively actuable for producing sounds which correspond to respective musical scale notes, circuitry for sequentially scanning these keys for detection of the information of the actuation of these keys, and a memory circuit corresponding to each of the keys so that the information of the actuation of the keys is stored in the memory circuits.
摘要翻译：本发明是一种电子乐器，其中通过扫描键盘的键来检测键的致动信息。电子乐器包括可选择地致动的用于产生对应于各个音阶音符的声音的键，用于顺序地扫描这些键的电路，用于检测这些键的致动信息，以及对应于每个键的存储电路，钥匙的致动信息被存储在存储器电路中。

5. 发明申请

US20080130021A1 Image forming apparatus, control device, computer readable medium and computer data signal 有权
标题翻译：图像形成装置，控制装置，计算机可读介质和计算机数据信号
公开(公告)号：US20080130021A1
公开(公告)日：2008-06-05
申请号：US11826489
申请日：2007-07-16
申请人： Michihiro Inoue , Yasukazu Horii , Takayoshi Sato
发明人： Michihiro Inoue , Yasukazu Horii , Takayoshi Sato
IPC分类号： G06F15/00
CPC分类号： H04N1/295 , H04N1/12 , H04N1/193 , H04N1/2346 , H04N1/4015 , H04N2201/0082
摘要： An image forming apparatus includes a light emission element, a lighting signal generation section, a storage section, a communication line, a control section and an electromagnetic noise generation source. The storage section stores data used when the lighting signal generation section generates a lighting signal. The lighting signal generation section and the storage section transmit and receive the data therebetween through the communication line. The control section that controls the transmitting and receiving of the data between the lighting signal generation section and the storage section. The control section controls so as to start the transmitting and receiving of the data between the storage section and the lighting signal generation section in a state where a magnitude of the electromagnetic noise, at a position where the lighting signal generation section is disposed, generated by the electromagnetic noise generation source is smaller than a predetermined value.
摘要翻译：图像形成装置包括发光元件，发光信号生成部，存储部，通信线，控制部和电磁噪声生成源。存储部存储在点亮信号生成部生成发光信号时使用的数据。照明信号生成部和存储部通过通信线路发送并接收数据。所述控制部分控制所述发光信号发生部分和所述存储部分之间的数据的发送和接收。控制部分控制在开始在存储部分和点亮信号发生部分之间发送和接收数据的状态，其中在发光信号产生部分所在的位置处的电磁噪声的幅度由电磁噪声产生源小于预定值。

6. 发明授权

US5151878A Semiconductor memory device 失效
公开(公告)号：US5151878A
公开(公告)日：1992-09-29
申请号：US787859
申请日：1991-11-05
申请人： Toshio Yamada , Michihiro Inoue
发明人： Toshio Yamada , Michihiro Inoue
IPC分类号： G11C11/409 , G11C5/06 , G11C7/06 , G11C11/407 , G11C11/408 , G11C11/4091
CPC分类号： G11C11/4085 , G11C11/4091 , G11C5/063 , G11C7/065
摘要： In a semiconductor memory device comprising memory cells in which first and second potentials correspond to the logic values "0" and "1", the first potential is closer to the second potential than the potential of unselected word lines, by 0.3 V or more. The pull-up transistor is of the N-type, and the pull-down transistor is of the P-type.

7. 发明申请

US20100182391A1 EXPOSURE DEVICE, IMAGE FORMING APPARATUS AND COMPUTER-READABLE MEDIUM 审中-公开
标题翻译：曝光装置，图像形成装置和计算机可读介质
公开(公告)号：US20100182391A1
公开(公告)日：2010-07-22
申请号：US12563467
申请日：2009-09-21
申请人： Osamu Yasui , Michihiro Inoue , Ken Tsuchiya , Michio Taniwaki , Toshio Hisamura , Fumihiko Ogasawara
发明人： Osamu Yasui , Michihiro Inoue , Ken Tsuchiya , Michio Taniwaki , Toshio Hisamura , Fumihiko Ogasawara
IPC分类号： B41J2/435
CPC分类号： G06K15/1247
摘要： An exposure device includes an exposure section and first and second signal output units. The exposure section has plural light emitting elements. The first signal output unit outputs to the exposure section a first signal for determining timings for starting and ending light emission of the respective light emitting elements. The second signal output unit outputs to the exposure section a second signal for determining as to whether the respective light emitting elements are caused to emit light for respective pixels. If light mission of the respective light emitting elements is stopped with respect to all pixels of one line in a main scanning direction, the first signal does not output to the exposure section for each group of one or plural light emitting elements that operate based on the common first signal.
摘要翻译：曝光装置包括曝光部分和第一和第二信号输出单元。曝光部具有多个发光元件。第一信号输出单元向曝光部分输出用于确定各个发光元件的发光的起始和结束的定时的第一信号。第二信号输出单元向曝光部分输出用于确定各个发光元件是否对各个像素发光的第二信号。如果相对于主扫描方向上的一行的全部像素停止各个发光元件的光任务，则对于基于该扫描方式操作的一组或多个发光元件的组，不向曝光部分输出第一信号共同的第一个信号。

8. 再颁专利

USRE35430E Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：USRE35430E
公开(公告)日：1997-01-21
申请号：US312589
申请日：1994-09-27
申请人： Toshio Yamada , Michihiro Inoue
发明人： Toshio Yamada , Michihiro Inoue
IPC分类号： G11C11/409 , G11C5/06 , G11C7/06 , G11C11/407 , G11C11/408 , G11C11/4091 , G11C7/00 , G11C13/00
CPC分类号： G11C11/4085 , G11C11/4091 , G11C5/063 , G11C7/065
摘要： In a semiconductor memory device comprising memory cells in which first and second potentials correspond to the logic values "0" and "1", the first potential is closer to the second potential than the potential of unselected word lines, by 0.3 V or more. The pull-up transistor is of the N-type, and the pull-down transistor is of the P-type.
摘要翻译：在包括其中第一和第二电位对应于逻辑值“0”和“1”的存储器单元的半导体存储器件中，第一电位比非选定字线的电位更接近第二电位0.3V或更大。上拉晶体管为N型，下拉晶体管为P型。

9. 发明授权

US5089869A Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：US5089869A
公开(公告)日：1992-02-18
申请号：US564087
申请日：1990-08-07
申请人： Naoto Matsuo , Shozo Okada , Michihiro Inoue
发明人： Naoto Matsuo , Shozo Okada , Michihiro Inoue
IPC分类号： H01L27/108
CPC分类号： H01L27/10817
摘要： Disclosed is a semiconductor memory device comprising a semiconductor substrate on which memory cells are formed, each including a switching transistor formed on the semiconductor substrate and a capacitor disposed above the switching transistor. The capacitor has a storage electrode, a cell plate and a capacitor insulating film sandwiched therebetween. The storage electrodes of at least two adjacent memory cells are partly disposed one above the other, with part of the cell plate interposed therebetween. Also disclosed is a semiconductor memory device in which the capacitors of the memory cells are disposed in a trench formed in the semiconductor substrate. The two switching transistors of two adjacent memory cells are located on each island-shaped active region surrounded by the trench. The storage electrodes of the capacitors of the two adjacent memory cells extend side by side around the corresponding active region, with part of the cell plate interposed between the storage electrodes.
摘要翻译：公开了一种半导体存储器件，包括其上形成有存储单元的半导体衬底，每个半导体衬底包括形成在半导体衬底上的开关晶体管和设置在开关晶体管上方的电容器。电容器具有夹在其间的存储电极，电池板和电容绝缘膜。至少两个相邻的存储单元的存储电极被部分地设置在另一个之上，其中单元板的一部分插入其间。还公开了一种半导体存储器件，其中存储单元的电容器设置在形成于半导体衬底中的沟槽中。两个相邻存储器单元的两个开关晶体管位于由沟槽围绕的每个岛状有源区上。两个相邻存储单元的电容器的存储电极围绕相应的有源区域并排延伸，其中一部分单元板插在存储电极之间。

10. 发明授权

US4056033A Tone generator system for an electronic organ 失效
标题翻译：电子琴发声系统
公开(公告)号：US4056033A
公开(公告)日：1977-11-01
申请号：US622383
申请日：1975-10-14
申请人： Michihiro Inoue , Takeji Kimura , Masaharu Sato , Masahiko Tsunoo
发明人： Michihiro Inoue , Takeji Kimura , Masaharu Sato , Masahiko Tsunoo
IPC分类号： G10H1/08 , G10H5/10 , G10H1/02
CPC分类号： G10H5/10 , G10H1/08
摘要： A tone generator system for an electronic organ which is capable of being fabricated into an LSI structure and receives a saw-tooth wave or staircase wave as an input thereto comprises a frequency divider for the saw-tooth wave or staircase wave including a ladder resistor network and a complementary MOS FET devices, an analog switch having a wide dynamic range and a high linearity in input-output transfer characteristic constructed by MOS FET devices to serve as an indirect keying means, a sustain means including a novel structure of a variable impedance element which is constructed to control a channel current in a MOS FET device by varying the potential distribution in the source region, and an impedance coverter constructed by complementary MOS FET devices and free from a D.C. level shift. With the above arrangement a tone generator system of high quality for an electronic organ is provided.
摘要翻译：一种能够制造成LSI结构并接收锯齿波或阶梯波作为输入的电子琴的音调发生器系统包括用于锯齿波的分频器或包括梯形电阻网络的阶梯波以及互补MOS FET器件，具有由MOS FET器件构成的用作间接键控装置的输入输出传输特性中的宽动态范围和高线性度的模拟开关，包括可变阻抗元件的新颖结构的维持装置其被构造为通过改变源区域中的电位分布来控制MOS FET器件中的沟道电流，以及由互补MOS FET器件构成并且没有DC电平偏移的阻抗覆盖器。通过上述配置，提供了一种用于电子机器的高品质音调发生器系统。

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