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1. 发明授权

US6013953A Semiconductor device with improved connection reliability 失效
标题翻译：具有提高连接可靠性的半导体器件
公开(公告)号：US6013953A
公开(公告)日：2000-01-11
申请号：US8006
申请日：1998-01-16
申请人： Toshiyuki Nishihara , Yasunori Tanaka , Michinobu Tanioka , Masahiro Fujii
发明人： Toshiyuki Nishihara , Yasunori Tanaka , Michinobu Tanioka , Masahiro Fujii
IPC分类号： H01L23/12 , H01L23/498 , H01L23/48
CPC分类号： H01L23/49838 , H01L23/49816 , H01L24/19 , H01L24/20 , H01L2224/451 , H01L2224/48227 , H01L2224/73265 , H01L24/45 , H01L24/48 , H01L2924/01004 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/09701 , H01L2924/14 , H01L2924/15183 , H01L2924/15311 , H01L2924/15787 , H01L2924/181
摘要： A semiconductor device comprises a substrate on which a plurality of external connection terminals are formed, and a semiconductor chip provided with a plurality of connection terminals. The connection terminals are connected to corresponding external connection terminals by electrical wiring. Each of predetermined connection terminals in the connection terminals of the semiconductor chip is connected to two or more corresponding external connection terminals on the substrate. Preferably, 90% or more of the connection terminals of the semiconductor chip are connected to two or more corresponding external connection terminals. When the semiconductor device is installed on a circuit board, the semiconductor device is mounted on the circuit board with its external connection terminals facing the circuit board, and electric connections between the semiconductor device and the circuit board is established by the external connection terminals. According to the semiconductor device, connection reliability between the semiconductor device and the circuit board can be remarkably improved and installation process can be executed with a higher success rate and a remarkably higher degree of efficiency.
摘要翻译：半导体器件包括其上形成有多个外部连接端子的基板和设置有多个连接端子的半导体芯片。连接端子通过电线连接到相应的外部连接端子。半导体芯片的连接端子中的每个预定连接端子连接到基板上的两个或更多对应的外部连接端子。优选地，半导体芯片的90％以上的连接端子连接到两个以上的对应的外部连接端子。当半导体器件安装在电路板上时，半导体器件安装在电路板上，其外部连接端子面向电路板，并且通过外部连接端子建立半导体器件和电路板之间的电连接。根据半导体装置，能够显着提高半导体装置与电路基板的连接可靠性，能够以更高的成功率和更高的效率进行安装处理。

2. 发明授权

US06522902B2 Apparatus for saving power consumption of a portable electronic device 失效
标题翻译：用于节省便携式电子设备的功耗的设备
公开(公告)号：US06522902B2
公开(公告)日：2003-02-18
申请号：US09019589
申请日：1998-02-06
申请人： Toshiyuki Nishihara , Susumu Uriya , Masahiro Fujii
发明人： Toshiyuki Nishihara , Susumu Uriya , Masahiro Fujii
IPC分类号： H04B138
CPC分类号： H01M10/4207 , H01M6/5016 , H02J7/0024
摘要： A battery pack for containing a plurality of cells and being attached to an electronic device comprises a plurality of switches for switching connection status of the cells between parallel connection and series connection. In the case of a battery pack containing a first cell and a second cell, the battery pack comprises a first wire for connecting the positive pole of the first cell and the positive pole of the second cell, a second wire for connecting the negative pole of the first cell and the negative pole of the second cell, a third wire for connecting the negative pole of the first cell and the positive pole of the second cell, a first switch for connecting/disconnecting the first wire, a second switch for connecting/disconnecting the second wire, and a third switch for connecting/disconnecting the third wire. The cells are connected in series when high voltage is needed, and in parallel otherwise. According to the battery pack, wastage of power consumption is reduced and continuous use time length of electronic devices such as portable telephones, portable data communication devices, etc. can be extended.
摘要翻译：用于容纳多个单元并附接到电子设备的电池组包括用于在并联和串联连接之间切换单元的连接状态的多个开关。在包含第一单元和第二单元的电池组的情况下，电池组包括用于连接第一单元的正极和第二单元的正极的第一导线，用于连接第二单元的负极的第二导线第二单元的第一单元和负极，用于连接第一单元的负极和第二单元的正极的第三导线，用于连接/断开第一导线的第一开关，用于连接/ 断开第二线，以及用于连接/断开第三线的第三开关。当需要高电压时，电池串联连接，否则并联。根据电池组，能够减少功耗的浪费，能够延长便携式电话，便携式数据通信装置等电子设备的连续使用时间。

3. 发明授权

US09202830B2 Imaging element and camera system employing a high-concentration layer between a photodiode and an insulation layer, with the insulation layer being between the high-concentration layer and a well of an amplifying transistor 有权
标题翻译：在光电二极管和绝缘层之间采用高浓度层的成像元件和相机系统，其中绝缘层位于高浓度层和放大晶体管的阱之间
公开(公告)号：US09202830B2
公开(公告)日：2015-12-01
申请号：US12926345
申请日：2010-11-12
申请人： Toshiyuki Nishihara , Hirofumi Sumi
发明人： Toshiyuki Nishihara , Hirofumi Sumi
IPC分类号： H04N3/14 , H04N5/335 , H01L27/146
CPC分类号： H01L27/14609 , H01L27/1463 , H01L27/14689
摘要： An imaging element includes an amplifying transistor. A signal charge from the photodiode is transferable to the gate of amplifying transistor, the photodiode being within a semiconductor substrate. The source and drain of the amplifying transistor are electrically isolated from a semiconductor substrate, wherein the source is within a well or the source and drain are within a silicon-on-insulator layer.
摘要翻译：成像元件包括放大晶体管。来自光电二极管的信号电荷可转移到放大晶体管的栅极，光电二极管位于半导体衬底内。放大晶体管的源极和漏极与半导体衬底电隔离，其中源极在阱内，或源极和漏极位于绝缘体上硅层内。

4. 发明授权

US09183132B2 Storage device, computer system, and storage system 有权
标题翻译：存储设备，计算机系统和存储系统
公开(公告)号：US09183132B2
公开(公告)日：2015-11-10
申请号：US11493904
申请日：2006-07-27
申请人： Toshiyuki Nishihara
发明人： Toshiyuki Nishihara
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7205
摘要： A storage device enabling realization of a new storage configuration enabling apparent elimination of the overhead and enabling high speed access all the time particularly when constructing a high parallel configured high speed flash memory system, that is, a storage device having a flash memory as a main storage and having the function of rewriting at least a partial region of the flash memory by additional writing update data in an empty region and invalidating original data and, at the time of standby of the device where there is no access from the outside, performing processing for automatically restoring the invalidated region to an empty region, and a computer system and a storage system using the same.
摘要翻译：一种存储装置，其能够实现新的存储配置，从而明显地消除开销并且始终实现高速访问，特别是在构建高并行配置的高速闪速存储器系统时，即具有闪速存储器作为主要的存储装置存储并且具有通过在空白区域中附加写入更新数据来重新写入闪速存储器的至少部分区域的功能，并且使原始数据无效，并且在不存在来自外部的设备的待机时，执行处理用于将无效区域自动恢复到空白区域，以及使用该区域的计算机系统和存储系统。

5. 发明申请

US20120081589A1 IMAGING DEVICE AND CAMERA SYSTEM 有权
标题翻译：成像设备和摄像机系统
公开(公告)号：US20120081589A1
公开(公告)日：2012-04-05
申请号：US13241758
申请日：2011-09-23
申请人： Toshiyuki Nishihara
发明人： Toshiyuki Nishihara
IPC分类号： H04N5/335 , H01L27/146
CPC分类号： H04N5/37455 , G01J1/44 , G01J2001/444 , H04N5/32 , H04N5/3355 , H04N5/3535 , H04N5/355 , H04N5/357 , H04N5/363 , H04N5/3742 , H04N5/378
摘要： An imaging device includes: a pixel array section functioning as a light receiving section which includes photoelectric conversion devices and in which a plurality of pixels, which output electric signals when photons are incident, are disposed in an array; a sensing circuit section in which a plurality of sensing circuits, which receive the electric signals from the pixels and perform binary determination regarding whether or not there is an incidence of photons on the pixels in a predetermined period, are arrayed; and a determination result integration circuit section having a function of integrating a plurality of determination results of the sensing circuits for the respective pixels or for each pixel group, wherein the determination result integration circuit section derives the amount of photon incidence on the light receiving section by performing photon counting for integrating the plurality of determination results in the plurality of pixels.
摘要翻译：成像装置包括：作为包含光电转换装置的光接收部的像素阵列部，其中在光子入射时输出电信号的多个像素排列成阵列; 感测电路部分，其中接收来自像素的电信号并且执行关于在预定周期中是否存在像素的光子入射的二进制确定的多个感测电路被排列; 以及确定结果积分电路部分，其具有对各像素或每个像素组的感测电路的多个确定结果进行积分的功能，其中确定结果积分电路部分通过以下方式导出光接收部分上的光子入射量执行用于将所述多个确定结果集成在所述多个像素中的光子计数。

6. 发明申请

US20110205416A1 PIXEL CIRCUIT, SOLID-STATE IMAGE PICKUP DEVICE, AND CAMERA 有权
标题翻译：像素电路，固态图像拾取器件和摄像机
公开(公告)号：US20110205416A1
公开(公告)日：2011-08-25
申请号：US13126790
申请日：2009-11-25
申请人： Toshiyuki Nishihara
发明人： Toshiyuki Nishihara
IPC分类号： H04N5/335
CPC分类号： H04N5/3745 , H01L27/14609 , H04N5/3559
摘要： A pixel circuit has first, second, and third field effect transistors integrated and connected in series from a photoelectric conversion element to a side of an amplifier circuit. The first and second field effect transistors have gate electrodes to be simultaneously collectively driven. A threshold voltage of the first field effect transistor is set to be higher than that of the second field effect transistor. As the gate electrodes are driven step by step, electrons generated by the photoelectric conversion element and transferred via the first field effect transistor are accumulated in a channel region of the second field effect transistor. The electrons accumulated in the channel region are transferred to an input of the amplifier circuit via the third field effect transistor.
摘要翻译：像素电路具有从光电转换元件串联连接到放大器电路侧的第一，第二和第三场效应晶体管。第一和第二场效应晶体管具有同时共同驱动的栅电极。第一场效应晶体管的阈值电压被设定为高于第二场效应晶体管的阈值电压。随着门电极逐步驱动，由光电转换元件产生并通过第一场效应晶体管传送的电子被累积在第二场效应晶体管的沟道区中。积累在沟道区中的电子经由第三场效应晶体管传送到放大器电路的输入端。

7. 发明申请

US20110134264A1 Imaging element and camera system 有权
标题翻译：成像元件和相机系统
公开(公告)号：US20110134264A1
公开(公告)日：2011-06-09
申请号：US12926345
申请日：2010-11-12
申请人： Toshiyuki Nishihara , Hirofumi Sumi
发明人： Toshiyuki Nishihara , Hirofumi Sumi
IPC分类号： H04N5/228 , H04N5/335
CPC分类号： H01L27/14609 , H01L27/1463 , H01L27/14689
摘要： An imaging element includes an amplifying transistor. A signal charge from the photodiode is transferable to the gate of amplifying transistor, the photodiode being within a semiconductor substrate. The source and drain of the amplifying transistor are electrically isolated from a semiconductor substrate, wherein the source is within a well or the source and drain are within a silicon-on-insulator layer.
摘要翻译：成像元件包括放大晶体管。来自光电二极管的信号电荷可转移到放大晶体管的栅极，光电二极管位于半导体衬底内。放大晶体管的源极和漏极与半导体衬底电隔离，其中源极在阱内，或源极和漏极位于绝缘体上硅层内。

8. 外观设计

USD582320S1 Motorcycle 有权
公开(公告)号：USD582320S1
公开(公告)日：2008-12-09
申请号：US29304671
申请日：2008-03-05
申请人： Shunji Tanaka , Toshiyuki Nishihara
设计人： Shunji Tanaka , Toshiyuki Nishihara

9. 发明授权

US07310262B2 Ferroelectric memory capable of continuously fast transferring data words in a pipeline 失效
标题翻译：铁电存储器能够连续快速地传输流水线中的数据字
公开(公告)号：US07310262B2
公开(公告)日：2007-12-18
申请号：US11507509
申请日：2006-08-22
申请人： Toshiyuki Nishihara , Katsuya Nakashima , Yukihisa Tsuneda
发明人： Toshiyuki Nishihara , Katsuya Nakashima , Yukihisa Tsuneda
IPC分类号： G11C11/22
CPC分类号： G11C11/22
摘要： A storage device including a ferroelectric memory cell array including a plurality of memory cells; sense amplifiers connected to the bit lines and selected by a column address; an internal counter able to generate the column address; and a control part controlling data access, wherein the control part accesses data by a first processing of reading out a plurality of words of data from memory cells of a word line and a plate line selected according to a row address and storing it in the sense amplifiers, a second processing of selecting sense amplifiers from the column address and inputting/outputting data with the outside, and a third processing of writing back the data of the sense amplifiers into the memory cells, with data being continuously input or output and transferred by repeatedly executing the second processing using the column address generated in the internal counter for a group of words read out to the sense amplifiers at the first processing, and a file storage device and a computer system utilizing such a ferroelectric memory.
摘要翻译：一种存储装置，包括：包括多个存储单元的铁电存储单元阵列; 连接到位线并由列地址选择的读出放大器; 一个能产生列地址的内部计数器; 以及控制数据访问的控制部分，其中控制部分通过从根据行地址选择的字线和板线的存储器单元中读出多个数据字的第一处理访问数据并将其存储在该意义上放大器，从列地址中选择读出放大器并与外部输入/输出数据的第二处理，以及将读出放大器的数据写入存储单元的第三处理，数据被连续地输入或输出并由使用在内部计数器中产生的列地址重复执行第二处理，用于在第一处理期间读出到读出放大器的一组字，以及文件存储装置和利用这种铁电存储器的计算机系统。

10. 发明授权

US07203086B2 Data reading method, data writing method, and semiconductor memory device 失效
标题翻译：数据读取方法，数据写入方法和半导体存储器件
公开(公告)号：US07203086B2
公开(公告)日：2007-04-10
申请号：US11386843
申请日：2006-03-23
申请人： Toshiyuki Nishihara , Yukihisa Tsuneda
发明人： Toshiyuki Nishihara , Yukihisa Tsuneda
IPC分类号： G11C11/22 , G11C7/12 , G11C7/22
CPC分类号： G11C11/22
摘要： In a data reading method, a first reading pulse is applied to a memory cell to generate a first signal corresponding to data stored in the memory cell, reference signal generating data corresponding to a high level side is written to the memory cell, a second reading pulse is applied to the memory cell to generate a second signal corresponding to the reference signal generating data, and a reference signal is generated on the basis of the second signal. Then the first signal and the reference signal are compared with each other to determine the stored data stored in the memory cell. In data writing, high-level data is written to the memory cell without using a bit line.
摘要翻译：在数据读取方法中，第一读取脉冲被施加到存储单元以产生对应于存储在存储单元中的数据的第一信号，对应于高电平侧的参考信号产生数据被写入存储单元，第二读数脉冲被施加到存储器单元以产生对应于参考信号产生数据的第二信号，并且基于第二信号产生参考信号。然后将第一信号和参考信号彼此进行比较，以确定存储在存储单元中的存储数据。在数据写入中，高电平数据被写入存储单元，而不使用位线。

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