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1. 发明申请

US20090321743A1 THIN FILM TRANSISTOR, SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE 有权
标题翻译：薄膜晶体管，半导体器件和电子器件
公开(公告)号：US20090321743A1
公开(公告)日：2009-12-31
申请号：US12490458
申请日：2009-06-24
申请人： Toshiyuki ISA , Yasuhiro JINBO , Sachiaki TEZUKA , Koji DAIRIKI , Hidekazu MIYAIRI , Shunpei YAMAZAKI
发明人： Toshiyuki ISA , Yasuhiro JINBO , Sachiaki TEZUKA , Koji DAIRIKI , Hidekazu MIYAIRI , Shunpei YAMAZAKI
IPC分类号： H01L29/786
CPC分类号： H01L27/1288 , H01L27/1214 , H01L29/04 , H01L29/66765 , H01L29/78696
摘要： A thin film transistor includes, as a buffer layer, an amorphous semiconductor layer having nitrogen or an NH group between a gate insulating layer and source and drain regions and at least on the source and drain regions side. As compared to a thin film transistor in which an amorphous semiconductor is included in a channel formation region, on-current of a thin film transistor can be increased. In addition, as compared to a thin film transistor in which a microcrystalline semiconductor is included in a channel formation region, off-current of a thin film transistor can be reduced.
摘要翻译：薄膜晶体管包括作为缓冲层的至少在源极和漏极区域上具有氮或NH基的非晶半导体层，栅极绝缘层与源极和漏极区之间。与在沟道形成区域中包含非晶半导体的薄膜晶体管相比，可以提高薄膜晶体管的导通电流。此外，与在沟道形成区域中包含微晶半导体的薄膜晶体管相比，可以减小薄膜晶体管的截止电流。

2. 发明申请

US20090321737A1 THIN FILM TRANSISTOR 有权
标题翻译：薄膜晶体管
公开(公告)号：US20090321737A1
公开(公告)日：2009-12-31
申请号：US12490447
申请日：2009-06-24
申请人： Toshiyuki ISA , Yasuhiro JINBO , Sachiaki TEZUKA , Koji DAIRIKI , Hidekazu MIYAIRI , Shunpei YAMAZAKI , Takuya HIROHASHI
发明人： Toshiyuki ISA , Yasuhiro JINBO , Sachiaki TEZUKA , Koji DAIRIKI , Hidekazu MIYAIRI , Shunpei YAMAZAKI , Takuya HIROHASHI
IPC分类号： H01L29/04
CPC分类号： H01L27/1288 , H01L27/1214 , H01L29/04 , H01L29/66765 , H01L29/78696
摘要： A thin film transistor includes, as a buffer layer, a semiconductor layer which contains nitrogen and includes crystal regions in an amorphous structure between a gate insulating layer and source and drain regions, at least on the source and drain regions side. As compared to a thin film transistor in which an amorphous semiconductor is included in a channel formation region, on-current of a thin film transistor can be increased. In addition, as compared to a thin film transistor in which a microcrystalline semiconductor is included in a channel formation region, off-current of a thin film transistor can be reduced.
摘要翻译：至少在源区和漏区侧，薄膜晶体管包括作为缓冲层的半导体层，该半导体层含有氮并且包括在栅极绝缘层和源极和漏极区之间的非晶结构中的晶体区域。与在沟道形成区域中包含非晶半导体的薄膜晶体管相比，可以提高薄膜晶体管的导通电流。此外，与在沟道形成区域中包含微晶半导体的薄膜晶体管相比，可以减小薄膜晶体管的截止电流。

3. 发明申请

US20090267068A1 THIN FILM TRANSISTOR 有权
标题翻译：薄膜晶体管
公开(公告)号：US20090267068A1
公开(公告)日：2009-10-29
申请号：US12429486
申请日：2009-04-24
申请人： Koji DAIRIKI , Hidekazu MIYAIRI , Toshiyuki ISA , Akiharu MIYANAGA , Takuya HIROHASHI , Shunpei YAMAZAKI , Takeyoshi WATABE
发明人： Koji DAIRIKI , Hidekazu MIYAIRI , Toshiyuki ISA , Akiharu MIYANAGA , Takuya HIROHASHI , Shunpei YAMAZAKI , Takeyoshi WATABE
IPC分类号： H01L29/786
CPC分类号： H01L27/127 , H01J37/32091 , H01L27/1214 , H01L27/1218 , H01L27/1288 , H01L29/04 , H01L29/66765 , H01L29/78669 , H01L29/78678 , H01L29/78696
摘要： The thin film transistor includes a gate insulating layer covering a gate electrode, over a substrate having an insulating surface; a semiconductor layer forming a channel formation region, in which a plurality of crystal regions is included in an amorphous structure; an impurity semiconductor layer imparting one conductivity type which forms a source region and a drain region; and a buffer layer formed from an amorphous semiconductor, which is located between the semiconductor layer and the impurity semiconductor layer. The thin film transistor includes the crystal region which includes minute crystal grains and inverted conical or inverted pyramidal grain each of which grows approximately radially from a position away from an interface between the gate insulating layer and the semiconductor layer toward a direction in which the semiconductor layer is deposited in a region which does not reach the impurity semiconductor layer.
摘要翻译：薄膜晶体管包括覆盖栅电极的栅极绝缘层，在具有绝缘表面的基板上; 形成在非晶结构中包含多个晶体区域的沟道形成区域的半导体层; 赋予形成源极区域和漏极区域的一种导电型的杂质半导体层; 以及由位于半导体层和杂质半导体层之间的非晶半导体形成的缓冲层。薄膜晶体管包括晶体区域，其包括微小晶粒和倒圆锥形或倒棱锥晶粒，其每个从远离栅极绝缘层和半导体层之间的界面的位置朝向半导体层的方向大致径向地生长沉积在不到达杂质半导体层的区域中。

4. 发明申请

US20100029068A1 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE PRODUCTION SYSTEM 有权
标题翻译：半导体器件和半导体器件生产系统
公开(公告)号：US20100029068A1
公开(公告)日：2010-02-04
申请号：US12533401
申请日：2009-07-31
申请人： Atsuo ISOBE , Shunpei YAMAZAKI , Koji DAIRIKI , Hiroshi SHIBATA , Chiho KOKUBO , Tatsuya ARAO , Masahiko HAYAKAWA , Hidekazu MIYAIRI , Akihisa SHIMOMURA , Koichiro TANAKA , Mai AKIBA
发明人： Atsuo ISOBE , Shunpei YAMAZAKI , Koji DAIRIKI , Hiroshi SHIBATA , Chiho KOKUBO , Tatsuya ARAO , Masahiko HAYAKAWA , Hidekazu MIYAIRI , Akihisa SHIMOMURA , Koichiro TANAKA , Mai AKIBA
IPC分类号： H01L21/311 , H01L21/20
CPC分类号： H01L27/1222 , B23K26/0738 , H01L21/02354 , H01L21/02356 , H01L21/02675 , H01L21/02683 , H01L21/02686 , H01L21/02691 , H01L21/2026 , H01L21/32139 , H01L21/84 , H01L27/1214 , H01L27/1218 , H01L27/124 , H01L27/1255 , H01L27/1274 , H01L27/1281 , H01L27/1296 , H01L29/66757 , H01L29/78603 , H01L29/78675 , H01L29/78696 , Y10S118/90 , Y10T117/10 , Y10T117/1004 , Y10T117/1008
摘要： A semiconductor device production system using a laser crystallization method is provided which can avoid forming grain boundaries in a channel formation region of a TFT, thereby preventing grain boundaries from lowering the mobility of the TFT greatly, from lowering ON current, and from increasing OFF current. Rectangular or stripe pattern depression and projection portions are formed on an insulating film. A semiconductor film is formed on the insulating film. The semiconductor film is irradiated with continuous wave laser light by running the laser light along the stripe pattern depression and projection portions of the insulating film or along the major or minor axis direction of the rectangle. Although continuous wave laser light is most preferred among laser light, it is also possible to use pulse oscillation laser light in irradiating the semiconductor film.
摘要翻译：提供了一种使用激光晶化方法的半导体器件制造系统，其可以避免在TFT的沟道形成区域中形成晶界，从而防止晶界大大降低TFT的迁移率，降低导通电流，并且提高截止电流。在绝缘膜上形成矩形或条纹图案凹陷和突出部分。在绝缘膜上形成半导体膜。通过沿着条形图案凹陷和绝缘膜的突出部分沿着矩形的长轴或短轴方向运行激光来对连续波激光照射半导体膜。尽管在激光中最优选连续波激光，但也可以在照射半导体膜时使用脉冲振荡激光。

5. 发明申请

US20090218572A1 THIN-FILM TRANSISTOR AND DISPLAY DEVICE 有权
标题翻译：薄膜晶体管和显示器件
公开(公告)号：US20090218572A1
公开(公告)日：2009-09-03
申请号：US12390954
申请日：2009-02-23
申请人： Koji DAIRIKI , Hidekazu MIYAIRI , Yoshiyuki KUROKAWA , Shunpei YAMAZAKI , Hiromichi GODO , Daisuke KAWAE , Satoshi KOBAYASHI
发明人： Koji DAIRIKI , Hidekazu MIYAIRI , Yoshiyuki KUROKAWA , Shunpei YAMAZAKI , Hiromichi GODO , Daisuke KAWAE , Satoshi KOBAYASHI
IPC分类号： H01L33/00 , H01L29/786
CPC分类号： H01L29/78609 , H01L29/04 , H01L29/41733 , H01L29/4908 , H01L29/66765 , H01L29/78618 , H01L29/78669
摘要： A thin-film transistor in which problems with ON-state current and OFF-state current are solved, and a thin-film transistor capable of high-speed operation. The thin-film transistor includes a pair of impurity semiconductor layers in which an impurity element imparting one conductivity type is added to form a source and drain regions, provided with a space therebetween so as to be overlapped with a gate electrode with a gate insulating layer interposed between the gate electrode and the impurity semiconductor layers; a pair of semiconductor layers in which an impurity element which serves as an acceptor is added, overlapped over the gate insulating layers with the gate electrode and the impurity semiconductor layers, and disposed with a space therebetween in a channel length direction; and an amorphous semiconductor layer being in contact with the gate insulating layer and the pair of semiconductor layers and extended between the pair of semiconductor layers.
摘要翻译：解决了导通状态电流和截止电流的问题的薄膜晶体管，以及能够进行高速运转的薄膜晶体管。薄膜晶体管包括一对杂质半导体层，其中添加赋予一种导电类型的杂质元素以形成源极和漏极区域，其间具有间隔，以便与具有栅极绝缘层的栅电极重叠插入在栅电极和杂质半导体层之间; 添加作为受体的杂质元素的一对半导体层，与栅极电极和杂质半导体层重叠在栅极绝缘层上，并且在沟道长度方向上间隔设置; 以及与所述栅绝缘层和所述一对半导体层接触并在所述一对半导体层之间延伸的非晶半导体层。

6. 发明申请

US20120064677A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20120064677A1
公开(公告)日：2012-03-15
申请号：US13225703
申请日：2011-09-06
申请人： Hidekazu MIYAIRI , Koji DAIRIKI , Shunpei YAMAZAKI , Ryo ARASAWA
发明人： Hidekazu MIYAIRI , Koji DAIRIKI , Shunpei YAMAZAKI , Ryo ARASAWA
IPC分类号： H01L21/336
CPC分类号： H01L29/78678 , H01L29/66765 , H01L29/78606 , H01L29/78648 , H01L29/78669 , H01L29/78696
摘要： Provided is a method for manufacturing a semiconductor device with fewer masks and in a simple process. A gate electrode is formed. A gate insulating film, a semiconductor film, an impurity semiconductor film, and a conductive film are stacked in this order, covering the gate electrode. A source electrode and a drain electrode are formed by processing the conductive film. A source region, a drain region, and a semiconductor layer, an upper part of a portion of which does not overlap with the source region and the drain region is removed, are formed by processing the upper part of the semiconductor film, while the impurity semiconductor film is divided. A passivation film over the gate insulating film, the semiconductor layer, the source region, the drain region, the source electrode, and the drain electrode are formed. An etching mask is formed over the passivation film. At least the passivation film and the semiconductor layer are processed to have an island shape while an opening reaching the source electrode or the drain electrode is formed, with the use of the etching mask. The etching mask is removed. A pixel electrode is formed over the gate insulating film and the passivation film.
摘要翻译：提供一种用于制造具有较少掩模的半导体器件的方法，并且在简单的过程中。形成栅电极。依次层叠栅绝缘膜，半导体膜，杂质半导体膜和导电膜，覆盖栅电极。通过处理导电膜形成源电极和漏电极。通过处理半导体膜的上部，形成源区域，漏极区域和半导体层，其部分的上部不与源极区域和漏极区域重叠，而杂质半导体薄膜被划分。形成栅极绝缘膜，半导体层，源极区域，漏极区域，源极电极和漏极电极之后的钝化膜。在钝化膜上形成蚀刻掩模。通过使用蚀刻掩模，至少钝化膜和半导体层被加工成具有岛状，同时形成到达源电极或漏电极的开口。去除蚀刻掩模。在栅极绝缘膜和钝化膜上形成像素电极。

7. 发明申请

US20090218576A1 THIN-FILM TRANSISTOR AND DISPLAY DEVICE 有权
标题翻译：薄膜晶体管和显示器件
公开(公告)号：US20090218576A1
公开(公告)日：2009-09-03
申请号：US12390144
申请日：2009-02-20
申请人： Koji DAIRIKI , Hidekazu MIYAIRI , Yoshiyuki KUROKAWA , Shunpei YAMAZAKI , Hiromichi GODO , Daisuke KAWAE , Satoshi KOBAYASHI
发明人： Koji DAIRIKI , Hidekazu MIYAIRI , Yoshiyuki KUROKAWA , Shunpei YAMAZAKI , Hiromichi GODO , Daisuke KAWAE , Satoshi KOBAYASHI
IPC分类号： H01L33/00 , H01L29/786
CPC分类号： H01L27/1214 , H01L27/1288 , H01L29/04 , H01L29/458 , H01L29/4908 , H01L29/66765
摘要： A thin-film transistor includes a pair of impurity semiconductor layers in which an impurity element imparting one conductivity type is added to form a source and drain regions so as to be overlapped at least partly with a gate electrode with a gate insulating layer interposed between the gate electrode and the impurity semiconductor layers; a pair of conductive layers which is overlapped over the gate insulating layers at least partly with the gate electrode and the impurity semiconductor layers, and is disposed with a space therebetween in a channel length direction; and an amorphous semiconductor layer which is in contact with the gate insulating layer and the pair of conductive layers and is extended between the pair of conductive layers.
摘要翻译：薄膜晶体管包括一对杂质半导体层，其中添加赋予一种导电类型的杂质元素以形成源极区和漏极区，以至少部分地与栅电极重叠，栅极绝缘层介于栅电极和杂质半导体层; 一对导电层，其至少部分地与所述栅极电极和所述杂质半导体层重叠在所述栅极绝缘层上方，并且在沟道长度方向上间隔开; 以及与所述栅极绝缘层和所述一对导电层接触并在所述一对导电层之间延伸的非晶半导体层。

8. 发明申请

US20100127261A1 THIN FILM TRANSISTOR 有权
标题翻译：薄膜晶体管
公开(公告)号：US20100127261A1
公开(公告)日：2010-05-27
申请号：US12467005
申请日：2009-05-15
申请人： Shunpei YAMAZAKI , Koji DAIRIKI , Hidekazu MIYAIRI , Akiharu MIYANAGA , Takuya HIROHASHI
发明人： Shunpei YAMAZAKI , Koji DAIRIKI , Hidekazu MIYAIRI , Akiharu MIYANAGA , Takuya HIROHASHI
IPC分类号： H01L29/786
CPC分类号： H01L29/78696 , H01L27/1288 , H01L29/66765 , H01L29/78669
摘要： The thin film transistor includes, over a substrate having an insulating surface, a gate insulating layer covering a gate electrode, an amorphous semiconductor layer over the gate insulating layer, a semiconductor layer including an impurity element imparting one conductivity type over the amorphous semiconductor layer. The amorphous semiconductor layer comprises an NH radical. Defects of the amorphous semiconductor layer are reduced by cross-linking dangling bonds with the NH radical in the amorphous semiconductor layer.
摘要翻译：薄膜晶体管包括在具有绝缘表面的衬底上，覆盖栅电极的栅极绝缘层，栅极绝缘层上的非晶半导体层，包括在非晶半导体层上赋予一种导电类型的杂质元素的半导体层。非晶半导体层包含NH自由基。通过与非晶半导体层中的NH自由基交联悬挂键来减少非晶半导体层的缺陷。

9. 发明申请

US20100148175A1 THIN FILM TRANSISTOR AND DISPLAY DEVICE 有权
标题翻译：薄膜晶体管和显示器件
公开(公告)号：US20100148175A1
公开(公告)日：2010-06-17
申请号：US12633067
申请日：2009-12-08
申请人： Hiromichi GODO , Satoshi KOBAYASHI , Hidekazu MIYAIRI , Toshiyuki ISA , Shunpei YAMAZAKI
发明人： Hiromichi GODO , Satoshi KOBAYASHI , Hidekazu MIYAIRI , Toshiyuki ISA , Shunpei YAMAZAKI
IPC分类号： H01L29/786
CPC分类号： H01L29/78696 , H01L27/12 , H01L29/04
摘要： Off current of a bottom gate thin film transistor in which a semiconductor layer is shielded from light by a gate electrode is reduced. A thin film transistor includes a gate electrode layer; a first semiconductor layer; a second semiconductor layer, provided on and in contact with the first semiconductor layer; a gate insulating layer between and in contact with the gate electrode layer and the first semiconductor layer; impurity semiconductor layers in contact with the second semiconductor layer; and source and drain electrode layers partially in contact with the impurity semiconductor layers and the first and second semiconductor layers. The entire surface of the first semiconductor layer on the gate electrode layer side is covered by the gate electrode layer; and a potential barrier at a portion where the first semiconductor layer is in contact with the source or drain electrode layer is 0.5 eV or more.
摘要翻译：其中半导体层被栅极电极遮挡光的底栅薄膜晶体管的截止电流减小。薄膜晶体管包括栅电极层; 第一半导体层; 第二半导体层，设置在第一半导体层上并与第一半导体层接触; 在栅极电极层和第一半导体层之间并与之接触的栅极绝缘层; 与第二半导体层接触的杂质半导体层; 以及与杂质半导体层和第一和第二半导体层部分接触的源极和漏极电极层。栅极电极层侧的第一半导体层的整个表面被栅电极层覆盖; 并且在第一半导体层与源极或漏极电极层接触的部分处的势垒为0.5eV以上。

10. 发明申请

US20130002624A1 DISPLAY DEVICE 有权
公开(公告)号：US20130002624A1
公开(公告)日：2013-01-03
申请号：US13613811
申请日：2012-09-13
申请人： Shunpei YAMAZAKI , Takeshi OSADA , Hidekazu MIYAIRI , Yasuhiro JINBO
发明人： Shunpei YAMAZAKI , Takeshi OSADA , Hidekazu MIYAIRI , Yasuhiro JINBO
IPC分类号： G09G5/00 , B32B3/10 , B32B15/04 , H05K1/14
CPC分类号： G02F1/1368 , G02F1/133345 , G02F1/134363 , G02F1/13439 , G02F1/1365 , H01L27/1214 , H01L27/1229 , H01L27/1251 , H01L27/1255 , H01L29/04 , H01L29/78648 , Y10T428/24331
摘要： A display device of which frame can be narrowed and of which display characteristics are excellent is provided. In a display device including a switch portion or a buffer portion, a logic circuit portion, and a pixel portion, the pixel portion includes a first inverted staggered TFT and a pixel electrode which is connected to a wiring of the first inverted staggered TFT, the switch portion or the buffer portion includes a second inverted staggered TFT in which a first insulating layer, a semiconductor layer, and a second insulating layer are interposed between a first gate electrode and a second gate electrode, the logic circuit portion includes an inverter circuit including a third inverted staggered thin film transistor and a fourth inverted staggered thin film transistor, and the first to the fourth inverted staggered thin film transistors have the same polarity. The inverter circuit may be an EDMOS circuit.

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