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1. 发明授权

US5327522A Neuron unit 失效
标题翻译：神经元单位
公开(公告)号：US5327522A
公开(公告)日：1994-07-05
申请号：US989781
申请日：1992-12-11
申请人： Toshiyuki Furuta , Hiroyuki Horiguchi , Hirotoshi Eguchi , Yutaka Ebi , Tatsuya Furukawa , Yoshio Watanabe , Toshihiro Tsukagoshi , Takahiro Watanabe , Shuji Motomura , Atsuo Hashimoto , Sugitaka Oteki , Satoshi Otsuki , Eiki Aono , Takashi Kitaguchi
发明人： Toshiyuki Furuta , Hiroyuki Horiguchi , Hirotoshi Eguchi , Yutaka Ebi , Tatsuya Furukawa , Yoshio Watanabe , Toshihiro Tsukagoshi , Takahiro Watanabe , Shuji Motomura , Atsuo Hashimoto , Sugitaka Oteki , Satoshi Otsuki , Eiki Aono , Takashi Kitaguchi
IPC分类号： G06N3/063 , G06F15/18
CPC分类号： G06N3/063
摘要： A neuron unit processes a plurality of input signals and for outputs an output signal which is indicative of a result of the processing, and includes input lines for receiving the input signals, a forward process part including a supplying part for supplying weight functions and an operation part for carrying out an operation on each of the input signals using one of the weight functions and for outputting the output signal, and a self-learning part including a function generating part for generating new weight functions based on errors between the output signal of the forward process part and teaching signals and a varying part for varying the weight functions supplied by the supplying part of the forward process part to the new weight functions generated by the generating part. The supplying part includes a memory for storing each weight function in the form of a binary value, and a generating circuit for generating a random pulse train based on each binary value stored in the memory. The random pulse train describes each weight function in the form of a pulse signal having a pulse density.
摘要翻译：神经元单元处理多个输入信号并输出表示处理结果的输出信号，并且包括用于接收输入信号的输入线，前向处理部分，包括用于提供加权函数的提供部分和操作使用所述加权函数之一对所述输入信号执行操作并输出所述输出信号的部分，以及包括功能生成部分的自学习部分，用于基于所述输入信号的输出信号之间的误差生成新的加权函数前向处理部分和教学信号，以及变化部分，用于将由前向处理部分的供给部分提供的权重函数改变为由生成部分生成的新的权重函数。供给部分包括用于以二进制值的形式存储每个加权函数的存储器，以及用于基于存储在存储器中的每个二进制值产生随机脉冲串的产生电路。随机脉冲串以具有脉冲密度的脉冲信号的形式描述每个权重函数。

2. 发明授权

US5504838A Neuron unit with error signal having components representing pulse densities 失效
标题翻译：神经元单位，具有表示脉冲密度的分量的误差信号
公开(公告)号：US5504838A
公开(公告)日：1996-04-02
申请号：US206855
申请日：1994-03-07
申请人： Toshiyuki Furuta , Hiroyuki Horiguchi , Hirotoshi Eguchi , Yutaka Ebi , Tatsuya Furukawa , Yoshio Watanabe , Toshihiro Tsukagoshi
发明人： Toshiyuki Furuta , Hiroyuki Horiguchi , Hirotoshi Eguchi , Yutaka Ebi , Tatsuya Furukawa , Yoshio Watanabe , Toshihiro Tsukagoshi
IPC分类号： G06N3/063 , G06F15/18
CPC分类号： G06N3/063
摘要： A neuron unit processes a plurality of input signals and outputs an output signal which is indicative of a result of the processing. The neuron unit includes input lines for receiving the input signals, a forward process part including a supplying part for supplying weight functions and an operation part for carrying out an operation on each of the input signals using one of the weight functions and for outputting the output signal, and a self-learning part including a generating part for generating new weight functions based on an error signal representing an error between the output signal of the forward process part and a teaching signal and a varying part for varying the weight functions supplied by the supplying part of the forward process part to the new weight functions generated by the generating part. The error signal includes first and second error signal components representing pulse densities.
摘要翻译：神经元单元处理多个输入信号并输出指示处理结果的输出信号。神经元单元包括用于接收输入信号的输入线，包括用于提供加权函数的供给部分的前向处理部分和使用加权函数之一对每个输入信号执行操作的操作部分，并且用于输出输出信号和自学习部分，包括用于基于表示正向处理部分的输出信号与示教信号之间的误差的误差信号产生新的加权函数的生成部分和用于改变由所述前向处理部分提供的加权函数的变化部分将前向处理部分的一部分提供给由生成部分生成的新的加权函数。误差信号包括表示脉冲密度的第一和第二误差信号分量。

3. 发明授权

US5619617A Neuron unit, neural network and signal processing method 失效
标题翻译：神经元单位，神经网络和信号处理方法
公开(公告)号：US5619617A
公开(公告)日：1997-04-08
申请号：US128707
申请日：1993-09-30
申请人： Toshiyuki Furuta , Hiroyuki Horiguchi , Hirotoshi Eguchi , Yutaka Ebi , Tatsuya Furukawa , Yoshio Watanabe , Toshihiro Tsukagoshi
发明人： Toshiyuki Furuta , Hiroyuki Horiguchi , Hirotoshi Eguchi , Yutaka Ebi , Tatsuya Furukawa , Yoshio Watanabe , Toshihiro Tsukagoshi
IPC分类号： G06N3/063 , G06E1/00 , G06E3/00 , G06F15/18
CPC分类号： G06N3/063
摘要： A neuron unit processes a plurality of input signals and outputs an output signal which is indicative of a result of the processing. The neuron unit includes input lines for receiving the input signals, a forward process part including a supplying part for supplying weight functions and an operation part for carrying out an operation on each of the input signals using one of the weight functions and for outputting the output signal, and a self-learning part including a generating part for generating new weight functions based on errors between the output signal of the forward process part and teaching signals and a varying part for varying the weight functions supplied by the supplying part of the forward process part to the new weight functions generated by the generating part.
摘要翻译：神经元单元处理多个输入信号并输出指示处理结果的输出信号。神经元单元包括用于接收输入信号的输入线，包括用于提供加权函数的供给部分的前向处理部分和使用加权函数之一对每个输入信号执行操作的操作部分，并且用于输出输出信号和自学习部分，其包括基于正向处理部分的输出信号和示教信号之间的误差产生新的加权函数的生成部分和用于改变由前向处理的供给部分提供的加权函数的变化部分部分由生成部分生成的新的权重函数。

4. 发明授权

US5581662A Signal processing apparatus including plural aggregates 失效
标题翻译：信号处理装置包括多个聚集体
公开(公告)号：US5581662A
公开(公告)日：1996-12-03
申请号：US441418
申请日：1995-05-15
申请人： Toshiyuki Furuta , Hiroyuki Horiguchi , Hirotoshi Eguchi , Yutaka Ebi , Tatsuya Furukawa , Yoshio Watanabe , Toshihiro Tsukagoshi
发明人： Toshiyuki Furuta , Hiroyuki Horiguchi , Hirotoshi Eguchi , Yutaka Ebi , Tatsuya Furukawa , Yoshio Watanabe , Toshihiro Tsukagoshi
IPC分类号： G06N3/063 , G06F15/18
CPC分类号： G06N3/063
摘要： A hierarchical signal processing apparatus includes aggregates having logic operation portions. The apparatus compares a final output signal from a logic operation portion in a final aggregate with a teaching signal, and generates an error signal by taking a signal which exists only in the teaching signal as a positive error signal, and taking a signal which exists only in said final output signal as a negative error signal. An error signal generating portion in the apparatus generates a positive error signal of a logic operating portion within a certain aggregate which supplies one or more output signals thereof to said logic operation means of another aggregate based on one or more logic operations on the excitatory weight function signal of said weight function signal, the positive error signal, the inhibitory weight function signal of said weight function signal and the negative error signal, and also generates a negative error signal of said logic operation means within said certain aggregate which supplies one or more output signals thereof to said logic operation means of said other aggregate based on one or more logic operations on the inhibitory weight function signal of said weight function signal, the positive error signal of said other aggregate, the excitatory weight function signal of said weight function signal and the negative error signal.
摘要翻译：分级信号处理装置包括具有逻辑运算部分的聚合。该装置将来自最终聚合中的逻辑运算部分的最终输出信号与示教信号进行比较，并且通过仅将在教学信号中存在的信号作为正误差信号，并且仅采用仅存在的信号来产生误差信号在所述最终输出信号中作为负误差信号。该装置中的误差信号产生部分产生一定聚集内的逻辑运算部分的正误差信号，该积分误差信号基于对兴奋性加权函数的一个或多个逻辑运算向另一聚合体的一个或多个输出信号提供一逻辑运算装置所述加权函数信号的信号，正误差信号，所述加权函数信号的抑制加权函数信号和负误差信号，并且还产生所述逻辑运算装置的负误差信号，所述负误差信号提供一个或多个输出基于对所述加权函数信号的抑制加权函数信号，所述另一聚合体的正误差信号，所述加权函数信号的兴奋度权重函数信号和所述加权函数信号的抑制加权函数信号的一个或多个逻辑运算，负误差信号。

5. 发明授权

US5333241A Neuron unit, neural network and signal processing method 失效
标题翻译：神经元单位，神经网络和信号处理方法
公开(公告)号：US5333241A
公开(公告)日：1994-07-26
申请号：US889380
申请日：1992-05-28
申请人： Toshiyuki Furuta , Hiroyuki Horiguchi , Hirotoshi Eguchi , Yutaka Ebi , Tatsuya Furukawa , Yoshio Watanabe , Toshihiro Tsukagoshi
发明人： Toshiyuki Furuta , Hiroyuki Horiguchi , Hirotoshi Eguchi , Yutaka Ebi , Tatsuya Furukawa , Yoshio Watanabe , Toshihiro Tsukagoshi
IPC分类号： G06N3/063 , G06F15/18
CPC分类号： G06N3/063
摘要： A neuron unit processes a plurality of input signals and outputs an output signal which is indicative of a result of the processing. The neuron unit includes input lines for receiving the input signals, a forward process part including a supplying part for supplying weight functions and an operation part for carrying out an operation on each of the input signals using one of the weight functions and for outputting the output signal, and a self-learning part including a generating part for generating new weight functions based on errors between the output signal of the forward process part and teaching signals and a varying part for varying the weight functions supplied by the supplying part of the forward process part to the new weight functions generated by the generating part.
摘要翻译：神经元单元处理多个输入信号并输出指示处理结果的输出信号。神经元单元包括用于接收输入信号的输入线，包括用于提供加权函数的供给部分的前向处理部分和使用加权函数之一对每个输入信号执行操作的操作部分，并且用于输出输出信号和自学习部分，其包括基于正向处理部分的输出信号和示教信号之间的误差产生新的加权函数的生成部分和用于改变由前向处理的供给部分提供的加权函数的变化部分部分由生成部分生成的新的权重函数。

6. 发明授权

US5167006A Neuron unit, neural network and signal processing method 失效
标题翻译：神经元，神经网络和信号处理方法
公开(公告)号：US5167006A
公开(公告)日：1992-11-24
申请号：US629632
申请日：1990-12-18
申请人： Toshiyuki Furuta , Hiroyuki Horiguchi , Hirotoshi Eguchi , Yutaka Ebi , Tatsuya Furukawa , Yoshio Watanabe , Toshihiro Tsukagoshi
发明人： Toshiyuki Furuta , Hiroyuki Horiguchi , Hirotoshi Eguchi , Yutaka Ebi , Tatsuya Furukawa , Yoshio Watanabe , Toshihiro Tsukagoshi
IPC分类号： G06N3/063
CPC分类号： G06N3/063
摘要： A neuron unit processes a plurality of input signals and outputs an output signal which is indicative of a result of the processing. The neuron unit includes input lines for receiving the input signals, a forward process part including a supplying part for supplying weight functions and an operation part for carrying out an operation on each of the input signals using one of the weight functions and for outputting the output signal, and a self-learning part including a generating part for generating new weight functions based on errors between the output signal of the forward process part and teaching signals and a varying part for varying the weight functions supplied by the supplying part of the forward process part to the new weight functions generated by the generating part.
摘要翻译：神经元单元处理多个输入信号并输出指示处理结果的输出信号。神经元单元包括用于接收输入信号的输入线，包括用于提供加权函数的供给部分的前向处理部分和使用加权函数之一对每个输入信号执行操作的操作部分，并且用于输出输出信号和自学习部分，其包括基于正向处理部分的输出信号和示教信号之间的误差产生新的加权函数的生成部分和用于改变由前向处理的供给部分提供的加权函数的变化部分部分由生成部分生成的新的权重函数。

7. 发明授权

US5324991A Neuron unit and neuron unit network 失效
标题翻译：神经元单位和神经元单位网络
公开(公告)号：US5324991A
公开(公告)日：1994-06-28
申请号：US989605
申请日：1992-12-11
申请人： Toshiyuki Furuta , Hiroyuki Horiguchi , Hirotoshi Eguchi , Atsuo Hashimoto , Sugitaka Oteki , Toshihiro Tsukagoshi , Satoshi Otsuki , Eiki Aono , Shuji Motomura , Takahiro Watanabe
发明人： Toshiyuki Furuta , Hiroyuki Horiguchi , Hirotoshi Eguchi , Atsuo Hashimoto , Sugitaka Oteki , Toshihiro Tsukagoshi , Satoshi Otsuki , Eiki Aono , Shuji Motomura , Takahiro Watanabe
IPC分类号： G06N3/063 , G06F15/18
CPC分类号： G06N3/063
摘要： A neuron unit processes a plurality of binary input signals and outputs a neuron output signal which is indicative of a result of the processing. The neuron unit is provided with a plurality of first gates respectively for carrying out a logical operation on a binary input signal and a weighting coefficient, a second gate for carrying out a logical operation on an excitatory output signal of each of the first gates, a third gate for carrying out a logic operation on an inhibitory output signal of each of the first gates, a fourth gate for synthesizing output signals of the second and third gates and outputting the neuron output signal, and a generating circuit for generating the weighting coefficients which are supplied to each of the first gates. The generating circuit for generating one weighting coefficient includes a random number generator for generating random numbers, and a comparator for comparing each random number r with a predetermined value q and for outputting a pulse signal having first and second values depending on whether each random number r is such that r.ltoreq.q or r>q, and each weighting coefficient is described by a pulse density.
摘要翻译：神经元单元处理多个二进制输入信号并输出指示处理结果的神经元输出信号。神经元单元分别设置有多个第一门，用于对二进制输入信号和加权系数进行逻辑运算，第二门用于对每个第一门的兴奋性输出信号进行逻辑运算，第三门，用于对每个第一门的抑制输出信号进行逻辑运算，第四门，用于合成第二和第三门的输出信号并输出神经元输出信号;以及产生电路，用于产生加权系数，被提供给每个第一门。用于产生一个加权系数的产生电路包括用于产生随机数的随机数发生器和用于将每个随机数r与预定值q进行比较的比较器，并且用于根据每个随机数r是否输出具有第一和第二值的脉冲信号是这样的，r = q或r> q，并且每个加权系数由脉冲密度来描述。

8. 发明授权

US5131073A Neuron unit and neuron unit network 失效
标题翻译：神经元单位和神经元单位网络
公开(公告)号：US5131073A
公开(公告)日：1992-07-14
申请号：US550404
申请日：1990-07-10
申请人： Toshiyuki Furuta , Hiroyuki Horiguchi , Hirotoshi Eguchi
发明人： Toshiyuki Furuta , Hiroyuki Horiguchi , Hirotoshi Eguchi
IPC分类号： G06N3/063
CPC分类号： G06N3/063
摘要： A neuron unit simultaneously processes a plurality of binary input signals. The neuron unit includes input lines for receiving first and second input signals which undergo transitions with time, first and second memories for storing weighting coefficients, a first gate for successively obtaining a logical product of one of the first input signals and a corresponding one of the weighting coefficients read out from the first memory for each of the first input signals, a second gate for successively obtaining a logical product of one of the second input signals and a corresponding one of the weighting coefficients read out from the second memory for each of the second input signals, a third gate for obtaining a logical sum of logical products output from the first gate, a fourth gate for obtaining a logical sum of logical products output from the second gate, and an output part including an inverter for inverting the logical sum output from the fourth gate and a gate for obtaining one of a logical product and a logical sum of the logical sum output from the third gate and an inverted logical sum output from the inverter. This gate outputs an output signal of the neuron unit.
摘要翻译：神经元单元同时处理多个二进制输入信号。神经元单元包括输入线，用于接收经历时间转变的第一和第二输入信号，用于存储加权系数的第一和第二存储器，用于连续获得第一输入信号之一和对于每个第一输入信号从第一存储器读出的加权系数，第二门，用于连续地获得第二输入信号中的一个的逻辑积和从第二存储器读出的对应的一个加权系数第二输入信号，用于获得从第一门输出的逻辑积的逻辑和的第三门，用于获得从第二门输出的逻辑积的逻辑和的第四门和包括用于反转逻辑和的反相器的输出部从第四门输出的门和用于获得从第三门的逻辑和输出的逻辑积和逻辑和之一的门门和反相逻辑和输出。该门输出神经元单元的输出信号。

9. 发明授权

US5481646A Neuron unit and neuron unit network 失效
公开(公告)号：US5481646A
公开(公告)日：1996-01-02
申请号：US232355
申请日：1994-04-22
申请人： Toshiyuki Furuta , Hiroyuki Horiguchi , Hirotoshi Eguchi
发明人： Toshiyuki Furuta , Hiroyuki Horiguchi , Hirotoshi Eguchi
IPC分类号： G06N3/063 , G06F15/18
CPC分类号： G06N3/063
摘要： A neuron unit simultaneously processes a plurality of binary input signals. The neuron unit includes input lines for receiving first and second input signals which undergo transitions with time, first and second memories for storing weighting coefficients, a first gate for successively obtaining a logical product of one of the first input signals and a corresponding one of the weighting coefficients read out from the first memory for each of the first input signals, a second gate for successively obtaining a logical product of one of the second input signals and a corresponding one of the weighting coefficients read out from the second memory for each of the second input signals, a third gate for obtaining a logical sum of logical products output from the first gate, a fourth gate for obtaining a logical sum of logical products output from the second gate, and an output part including an inverter for inverting the logical sum output from the fourth gate and a gate for obtaining one of a logical product and a logical sum of the logical sum output from the third gate and an inverted logical sum output from the inverter. This gate outputs an output signal of the neuron unit.

10. 发明授权

US5191637A Neuron unit and neuron unit network 失效
标题翻译：神经元单位和神经元单位网络
公开(公告)号：US5191637A
公开(公告)日：1993-03-02
申请号：US856644
申请日：1992-03-24
申请人： Toshiyuki Furuta , Hiroyuki Horiguchi , Hirotoshi Eguchi
发明人： Toshiyuki Furuta , Hiroyuki Horiguchi , Hirotoshi Eguchi
IPC分类号： G06N3/063
CPC分类号： G06N3/063
摘要： A neuron unit simultaneously processes a plurality of binary input signals. The neuron unit includes input lines for receiving input signals which undergo transitions with time, first and second memories for storing weighting coefficients, a first gate for successively obtaining a logical product of one of the input signals and a corresponding one of the weighting coefficients read out from the first memory for each of the first input signals, a second gate for successively obtaining a logical product of one of the input signals and a corresponding one of the weighting coefficients read out from the second memory for each of the second input signals, a third gate for obtaining a logical sum of logical products output from the first gate, a fourth gate for obtaining a logical sum of logical products output from the second gate, and an output part including an inverter for inverting the logical sum output from the fourth gate and a gate for obtaining one of a logical product and a logical sum of the logical sum output from the third gate and an inverted logical sum output from the inverter. This gate outputs an output signal of the neuron unit.
摘要翻译：神经元单元同时处理多个二进制输入信号。神经元单元包括用于接收经历时间转变的输入信号的输入线，用于存储加权系数的第一和第二存储器，用于连续获得输入信号之一的逻辑积的第一门和读出的对应的一个加权系数从所述第一存储器中的每一个所述第一输入信号中选择第二门，用于连续获得所述输入信号之一的逻辑积和对于所述第二输入信号中的每一个从所述第二存储器读出的对应的一个加权系数，第三门，用于获得从第一门输出的逻辑积的逻辑和;第四门，用于获得从第二门输出的逻辑积的逻辑和;以及输出部，包括用于将从第四门输出的逻辑和输出反相的反相器以及用于获得来自第三门的逻辑和输出的逻辑积和逻辑和之一的反相逻辑的门逆变器的和输出。该门输出神经元单元的输出信号。

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