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    • 2. 发明授权
    • Neuron unit and neuron unit network
    • 神经元单位和神经元单位网络
    • US5324991A
    • 1994-06-28
    • US989605
    • 1992-12-11
    • Toshiyuki FurutaHiroyuki HoriguchiHirotoshi EguchiAtsuo HashimotoSugitaka OtekiToshihiro TsukagoshiSatoshi OtsukiEiki AonoShuji MotomuraTakahiro Watanabe
    • Toshiyuki FurutaHiroyuki HoriguchiHirotoshi EguchiAtsuo HashimotoSugitaka OtekiToshihiro TsukagoshiSatoshi OtsukiEiki AonoShuji MotomuraTakahiro Watanabe
    • G06N3/063G06F15/18
    • G06N3/063
    • A neuron unit processes a plurality of binary input signals and outputs a neuron output signal which is indicative of a result of the processing. The neuron unit is provided with a plurality of first gates respectively for carrying out a logical operation on a binary input signal and a weighting coefficient, a second gate for carrying out a logical operation on an excitatory output signal of each of the first gates, a third gate for carrying out a logic operation on an inhibitory output signal of each of the first gates, a fourth gate for synthesizing output signals of the second and third gates and outputting the neuron output signal, and a generating circuit for generating the weighting coefficients which are supplied to each of the first gates. The generating circuit for generating one weighting coefficient includes a random number generator for generating random numbers, and a comparator for comparing each random number r with a predetermined value q and for outputting a pulse signal having first and second values depending on whether each random number r is such that r.ltoreq.q or r>q, and each weighting coefficient is described by a pulse density.
    • 神经元单元处理多个二进制输入信号并输出​​指示处理结果的神经元输出信号。 神经元单元分别设置有多个第一门,用于对二进制输入信号和加权系数进行逻辑运算,第二门用于对每个第一门的兴奋性输出信号进行逻辑运算, 第三门,用于对每个第一门的抑制输出信号进行逻辑运算,第四门,用于合成第二和第三门的输出信号并输出​​神经元输出信号;以及产生电路,用于产生加权系数, 被提供给每个第一门。 用于产生一个加权系数的产生电路包括用于产生随机数的随机数发生器和用于将每个随机数r与预定值q进行比较的比较器,并且用于根据每个随机数r是否输出具有第一和第二值的脉冲信号 是这样的,r = q或r> q,并且每​​个加权系数由脉冲密度来描述。