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1. 发明申请

US20130237036A1 METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR LAYER 有权
标题翻译：制备氮化物半导体层的方法
公开(公告)号：US20130237036A1
公开(公告)日：2013-09-12
申请号：US13604183
申请日：2012-09-05
申请人： Toshiki HIKOSAKA , Yoshiyuki HARADA , Hisashi YOSHIDA , Naoharu SUGIYAMA , Shinya NUNOUE
发明人： Toshiki HIKOSAKA , Yoshiyuki HARADA , Hisashi YOSHIDA , Naoharu SUGIYAMA , Shinya NUNOUE
IPC分类号： H01L21/02
CPC分类号： H01L21/02389 , H01L21/02381 , H01L21/02458 , H01L21/0254 , H01L33/007 , H01L33/12
摘要： According to one embodiment, a method for manufacturing a nitride semiconductor layer is disclosed. The method can include forming a first lower layer on a major surface of a substrate and forming a first upper layer on the first lower layer. The first lower layer has a first lattice spacing along a first axis parallel to the major surface. The first upper layer has a second lattice spacing along the first axis larger than the first lattice spacing. At least a part of the first upper layer has compressive strain. A ratio of a difference between the first and second lattice spacing to the first lattice spacing is not less than 0.005 and not more than 0.019. A growth rate of the first upper layer in a direction parallel to the major surface is larger than that in a direction perpendicular to the major surface.
摘要翻译：根据一个实施例，公开了一种用于制造氮化物半导体层的方法。该方法可以包括在基底的主表面上形成第一下层，并在第一下层上形成第一上层。第一下层沿着平行于主表面的第一轴线具有第一格子间距。第一上层具有沿着第一轴线的第二格子间距大于第一格子间距。第一上层的至少一部分具有压缩应变。第一和第二格子间隔之间的差与第一格子间隔的比率不小于0.005且不大于0.019。第一上层在与主表面平行的方向上的生长速率大于垂直于主表面的方向的生长速率。

2. 发明申请

US20120295377A1 METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR DEVICE 有权
标题翻译：制造氮化物半导体器件的方法
公开(公告)号：US20120295377A1
公开(公告)日：2012-11-22
申请号：US13222238
申请日：2011-08-31
申请人： Taisuke SATO , Naoharu SUGIYAMA , Tomonari SHIODA , Toshiki HIKOSAKA , Shinya NUNOUE
发明人： Taisuke SATO , Naoharu SUGIYAMA , Tomonari SHIODA , Toshiki HIKOSAKA , Shinya NUNOUE
IPC分类号： H01L33/60
CPC分类号： H01L33/0079 , H01L33/22
摘要： According to one embodiment, a method is disclosed for manufacturing a nitride semiconductor device. The method can include removing a growth substrate from a structure body by using a first treatment material. The structure body has the growth substrate, a buffer layer formed on the growth substrate, and the nitride semiconductor layer formed on the buffer layer. A support substrate is bonded to the nitride semiconductor layer. The method can include reducing thicknesses of the buffer layer and the nitride semiconductor layer by using a second treatment material different from the first treatment material after removing the growth substrate.
摘要翻译：根据一个实施例，公开了一种用于制造氮化物半导体器件的方法。该方法可以包括通过使用第一处理材料从结构体移除生长衬底。结构体具有生长衬底，形成在生长衬底上的缓冲层和形成在缓冲层上的氮化物半导体层。支撑基板结合到氮化物半导体层。该方法可以包括在除去生长衬底之后使用与第一处理材料不同的第二处理材料来减小缓冲层和氮化物半导体层的厚度。

3. 发明申请

US20120146045A1 SEMICONDUCTOR LIGHT EMITTING DEVICE 有权
标题翻译：半导体发光器件
公开(公告)号：US20120146045A1
公开(公告)日：2012-06-14
申请号：US13212539
申请日：2011-08-18
申请人： Naoharu SUGIYAMA , Tomonari SHIODA , Hisashi YOSHIDA , Shinya NUNOUE
发明人： Naoharu SUGIYAMA , Tomonari SHIODA , Hisashi YOSHIDA , Shinya NUNOUE
IPC分类号： H01L33/32
CPC分类号： H01L33/06 , H01L33/12 , H01L33/32 , H01L33/46
摘要： According to one embodiment, a semiconductor light emitting device includes a light emitting layer, a light transmitting layer and a first semiconductor layer. The light transmitting layer is transmittable with respect to light emitted from the light emitting layer. The first semiconductor layer contacts the light transmitting layer between the light emitting layer and the light transmitting layer. The light transmitting layer has a thermal expansion coefficient larger than a thermal expansion coefficient of the light transmitting layer, has a lattice constant smaller than a lattice constant of the active layer, and has a tensile stress in an in-plane direction.
摘要翻译：根据一个实施例，半导体发光器件包括发光层，透光层和第一半导体层。透光层相对于从发光层发射的光是可透射的。第一半导体层与发光层和透光层之间的透光层接触。透光层的热膨胀系数大于透光层的热膨胀系数，其晶格常数小于有源层的晶格常数，并且在面内方向具有拉伸应力。

4. 发明申请

US20120217471A1 SEMICONDUCTOR LIGHT EMITTING DEVICE 有权
标题翻译：半导体发光器件
公开(公告)号：US20120217471A1
公开(公告)日：2012-08-30
申请号：US13213373
申请日：2011-08-19
申请人： Tomonari SHIODA , Hisashi YOSHIDA , Naoharu SUGIYAMA , Shinya NUNOUE
发明人： Tomonari SHIODA , Hisashi YOSHIDA , Naoharu SUGIYAMA , Shinya NUNOUE
IPC分类号： H01L33/04
CPC分类号： H01L33/06 , H01L33/04 , H01L33/32
摘要： According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting part. The n-type semiconductor layer includes a nitride semiconductor. The p-type semiconductor layer includes a nitride semiconductor. The light emitting part is provided between the n-type and the p-type semiconductor layers and includes an n-side barrier layer and a first light emitting layer. The first light emitting layer includes a first barrier layer, a first well layer, and a first AlGaN layer. The first barrier layer is provided between the n-side barrier layer and the p-type semiconductor layer. The first well layer contacts the n-side barrier layer between the n-side and the first barrier layer. The first AlGaN layer is provided between the first well layer and the first barrier layer. A peak wavelength λp of light emitted from the light emitting part is longer than 515 nanometers.
摘要翻译：根据一个实施例，一种半导体发光器件包括n型半导体层，p型半导体层和发光部分。 n型半导体层包括氮化物半导体。 p型半导体层包括氮化物半导体。发光部分设置在n型和p型半导体层之间，并且包括n侧阻挡层和第一发光层。第一发光层包括第一阻挡层，第一阱层和第一AlGaN层。第一阻挡层设置在n侧势垒层和p型半导体层之间。第一阱层与n侧和第一阻挡层之间的n侧势垒层接触。第一AlGaN层设置在第一阱层和第一势垒层之间。从发光部发出的光的峰值波长λp长于515nm。

5. 发明申请

US20120292650A1 SEMICONDUCTOR LIGHT EMITTING DEVICE 有权
标题翻译：半导体发光器件
公开(公告)号：US20120292650A1
公开(公告)日：2012-11-22
申请号：US13220072
申请日：2011-08-29
申请人： Naoharu SUGIYAMA , Tomonari Shioda , Shigeya Kimura , Koichi Tachibana , Shinya Nunoue
发明人： Naoharu SUGIYAMA , Tomonari Shioda , Shigeya Kimura , Koichi Tachibana , Shinya Nunoue
IPC分类号： H01L33/24 , H01L33/26 , H01L33/00
CPC分类号： H01L33/007 , H01L33/08 , H01L33/22 , H01L33/42 , H01L2933/0016 , H01L2933/0058
摘要： According to one embodiment, a semiconductor light emitting device includes an n-type layer, a light emitting layer, a p-type layer, and a transparent electrode. The n-type layer includes a nitride semiconductor and has a thickness not more than 500 nm. The light emitting layer is provided on the n-type layer. The p-type layer is provided on the light emitting layer and includes a nitride semiconductor. The transparent electrode contacts the n-type layer. The n-type layer is disposed between the transparent electrode and the light emitting layer.
摘要翻译：根据一个实施例，半导体发光器件包括n型层，发光层，p型层和透明电极。 n型层包括氮化物半导体，其厚度不大于500nm。发光层设置在n型层上。 p型层设置在发光层上，并且包括氮化物半导体。透明电极与n型层接触。 n型层设置在透明电极和发光层之间。

6. 发明申请

US20120058626A1 METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR CRYSTAL LAYER 有权
标题翻译：制备氮化物半导体晶体层的方法
公开(公告)号：US20120058626A1
公开(公告)日：2012-03-08
申请号：US13037582
申请日：2011-03-01
申请人： Naoharu SUGIYAMA , Tomonari Shioda , Shinya Nunoue
发明人： Naoharu SUGIYAMA , Tomonari Shioda , Shinya Nunoue
IPC分类号： H01L21/20
CPC分类号： H01L21/36 , H01L21/02381 , H01L21/0245 , H01L21/02458 , H01L21/02488 , H01L21/02491 , H01L21/02505 , H01L21/0254 , H01L21/0262 , H01L21/02639 , H01L21/7624 , H01L21/76243 , H01L29/2003 , H01L29/7787 , H01L33/0062
摘要： According to one embodiment, a method is disclosed for manufacturing a nitride semiconductor crystal layer. The method can include forming the nitride semiconductor crystal layer having a first thickness on a silicon crystal layer. The silicon crystal layer is provided on a base body. The silicon crystal layer has a second thickness before the forming the nitride semiconductor crystal layer. The second thickness is thinner than the first thickness. The forming the nitride semiconductor crystal layer includes making at least a portion of the silicon crystal layer incorporated into the nitride semiconductor crystal layer to reduce a thickness of the silicon crystal layer from the second thickness.
摘要翻译：根据一个实施例，公开了一种用于制造氮化物半导体晶体层的方法。该方法可以包括在硅晶体层上形成具有第一厚度的氮化物半导体晶体层。硅晶层设置在基体上。硅晶层在形成氮化物半导体晶体层之前具有第二厚度。第二厚度比第一厚度薄。形成氮化物半导体晶体层包括使至少部分掺入氮化物半导体晶体层中的硅晶体层从第二厚度减小硅晶体层的厚度。

7. 发明申请

US20090189199A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090189199A1
公开(公告)日：2009-07-30
申请号：US12361002
申请日：2009-01-28
申请人： Yoshihiko MORIYAMA , Naoharu SUGIYAMA
发明人： Yoshihiko MORIYAMA , Naoharu SUGIYAMA
IPC分类号： H01L29/04 , H01L21/336
CPC分类号： H01L29/045 , H01L29/1054 , H01L29/66795 , H01L29/785
摘要： A semiconductor device includes a semiconductor substrate having, on a surface thereof, a (110) surface of Si1-xGex (0.25≦x≦0.90), and n-channel and p-channel MISFETs formed on the (110) surface, each MISFET having a source region, a channel region and a drain region. Each MISFET has a linear active region which is longer in a [−110] direction than in a [001] direction and which has a facet of a (311) or (111) surface, the source region, the channel region and the drain region are formed in this order or in reverse order in the [−110] direction of the linear active region, the channel region of the n-channel MISFET is formed of Si and having uniaxial tensile strain in the [−110] direction, and the channel region of the p-channel MISFET being formed of Si1-yGey (x
摘要翻译：半导体器件包括其表面上具有Si1-xGex（0.25 <= x <= 0.90）的（110）表面和形成在（110）表面上的n沟道和p沟道MISFET的半导体衬底，每个MISFET具有源极区，沟道区和漏极区。每个MISFET具有在[-110]方向上比[001]方向更长的线性有源区，并且其具有（311）或（111）面的面，源极区，沟道区和漏极区域在线性有源区的[-110]方向上以该顺序或相反的顺序形成，n沟道MISFET的沟道区由Si形成，并且在[-110]方向上具有单轴拉伸应变，以及 p沟道MISFET的沟道区域由Si1-yGey（x

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