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    • 2. 发明授权
    • Power supply apparatus
    • 电源设备
    • US06903538B2
    • 2005-06-07
    • US10784015
    • 2004-02-20
    • Hiroyuki UmedaToshikazu Kuwano
    • Hiroyuki UmedaToshikazu Kuwano
    • H02M3/07G05F1/59
    • H02M3/07H02M3/073H02M2001/0032H02M2001/0045Y02B70/16
    • A DC/DC converter and a series regulator are connected in parallel between an input terminal and an output terminal. At the time of a heavy load, the DC/DC converter is operated. Although the DC/DC converter has a large current consumption of its own, it has a high power conversion efficiency. Accordingly, since a load current increases at the time of a heavy load, it is effective to use the DC/DC converter whose power conversion efficiency is high, and its current consumption can be neglected since the load current is large. On the other hand, at the time of a light load, the series regulator is operated. Although the series regulator has a small current consumption of its own, it has a low power conversion efficiency. Accordingly, at the time of a light load, even when the series regulator is used, its low power conversion efficiency can be neglected because its current consumption is small. Accordingly, the current consumption of its own can be lowered at the time of a light load, and the power conversion efficiency as a whole can be improved when it is used both at a heavy load and a light load.
    • DC / DC转换器和串联调节器并联连接在输入端子和输出端子之间。 在重负载时,DC / DC转换器工作。 虽然DC / DC转换器本身具有大的电流消耗,但是它具有很高的功率转换效率。 因此,由于负载电流在重负载时增加,所以使用功率转换效率高的DC / DC转换器是有效的,并且由于负载电流大,所以能够忽略电流消耗。 另一方面,在轻负载时,串联调节器被操作。 虽然串联稳压器本身具有较小的电流消耗,但它具有低功率转换效率。 因此,在轻负载时,即使使用串联调节器,由于其电流消耗小,所以其低功率转换效率可以忽略。 因此,在轻负载时可以降低其自身的电流消耗,并且当在重负载和轻负载下使用时,可以提高整体的电力转换效率。
    • 3. 发明授权
    • Circuit device, electronic apparatus, and power supply method
    • 电路装置,电子设备和电源方式
    • US08258771B2
    • 2012-09-04
    • US12914094
    • 2010-10-28
    • Hisao SatoAtsushi YamadaNorikazu TsukaharaToshikazu KuwanoYasuhiro Takahashi
    • Hisao SatoAtsushi YamadaNorikazu TsukaharaToshikazu KuwanoYasuhiro Takahashi
    • H02J1/00
    • H02M3/155H02M2001/0058H03K4/94H03K19/0019H03K19/0963Y02B70/1491
    • A circuit device includes: a power supply circuit; and a logic circuit, the power supply circuit supplying a first power supply voltage and a second power supply voltage to the logic circuit, the first power supply voltage supplied by the power supply circuit periodically changing with a first reference voltage as a reference voltage, the second power supply voltage supplied by the power supply circuit periodically changing with a second reference voltage as a reference voltage, the power supply circuit supplying, due to resonance, the first power supply voltage and the second power supply voltage that repeat a first period during which a voltage difference between the first power supply voltage and the second power supply voltage is decreasing and a second period during which the voltage difference is increasing, and the logic circuit performing adiabatic circuit operation with the supply of the first and the second power supply voltage.
    • 电路装置包括:电源电路; 以及逻辑电路,所述电源电路向所述逻辑电路提供第一电源电压和第二电源电压,由所述电源电路提供的所述第一电源电压以作为参考电压的第一参考电压周期性地改变, 电源电路以第二参考电压周期性地变化的第二电源电压作为参考电压,所述电源电路由于谐振而提供第一电源电压和第二电源电压,所述第一电源电压和第二电源电压重复第一周期 所述第一电源电压和所述第二电源电压之间的电压差减小,并且所述电压差增加的第二时段,并且所述逻辑电路通过提供所述第一和第二电源电压来执行绝热电路操作。
    • 5. 发明授权
    • Programmable nonvolatile memory apparatus and microcomputer using the same
    • 可编程非易失性存储装置和使用其的微型计算机
    • US06571311B2
    • 2003-05-27
    • US09242961
    • 1999-05-17
    • Toshikazu Kuwano
    • Toshikazu Kuwano
    • G06F1200
    • G11C16/10
    • A programmable nonvolatile memory apparatus having a simplified circuit structure that eliminates a built-in sequencer circuit using a register (102) as a source of generating control signals required for writing data in and erasing data from an EEPROM (101). The register (102) is provided from outside a microcomputer (10) with a register address value inputted through an address bus (103), and a data value inputted through a register bus (104), and also register control signals, such as, a register write signal (105), a register read signal (106) and a register reset signal (107). The register (102) includes flip-flops. From the flip-flops, address data and rewriting data are outputted through buses (115, 116), and in addition, PRPM control signals (108 to 111, 117 and 118) are also outputted. The address space of the register (102) and the address space of the EEPROM (101) are separated from each other.
    • 一种具有简化的电路结构的可编程非易失性存储装置,其消除了使用寄存器(102)作为产生从EEPROM(101)写入数据和从EEPROM中擦除数据所需的控制信号的源的内置定序器电路。 寄存器(102)通过地址总线(103)输入的寄存器地址值和通过寄存器总线(104)输入的数据值从微型计算机(10)的外部提供,并且还控制寄存器(102) 寄存器写入信号(105),寄存器读取信号(106)和寄存器复位信号(107)。 寄存器(102)包括触发器。 从触发器中,通过总线(115,116)输出地址数据和重写数据,并且还输出PRPM控制信号(108〜111,117和118)。 寄存器(102)的地址空间和EEPROM(101)的地址空间彼此分离。