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1. 发明授权

US5460654A Apparatus for generating raw material gas used in apparatus for growing thin film 失效
标题翻译：用于生长用于生长薄膜的装置中的原料气体的装置
公开(公告)号：US5460654A
公开(公告)日：1995-10-24
申请号：US84020
申请日：1993-06-30
申请人： Toshihide Kikkawa , Hitoshi Tanaka , Hirosato Ochimizu
发明人： Toshihide Kikkawa , Hitoshi Tanaka , Hirosato Ochimizu
IPC分类号： H01L21/205 , C23C16/44 , C23C16/448 , C30B25/14 , H01L21/31 , C23C16/00
CPC分类号： C23C16/4485
摘要： In an apparatus for forming a film of MOCVD, gas source MBE or the like, there is provided a gas supply pipe for supplying gas obtained by gasifying a liquid or solid organic metal raw material to a reaction chamber. A mechanism in which a pressure gauge is fitted in the vicinity of a gas generating source in the gas supply pipe and the gas supply quantity from the gas generating source is regulated based on an indicated value of the pressure gauge so as to suppress variation of the gas pressure is installed in the apparatus for forming a film.There is a heating system for heating the organic metal raw material or an ultrasonic vibrator for applying ultrasonic vibration to the organic metal raw material as the mechanism for regulating the gas supply quantity, and the gasified quantity of the organic metal raw material is varied by regulating the heating temperature of the heating system or by varying the output of the ultrasonic vibrator.
摘要翻译：在用于形成MOCVD，气体源MBE等的膜的装置中，设置有用于将通过将液体或固体有机金属原料气化而获得的气体供给到反应室的气体供给管。基于压力计的指示值，调节在气体供给管内的气体发生源附近配置压力计和来自气体发生源的气体供给量的机构，以抑制压力计的变化气体压力安装在用于形成薄膜的装置中。有机加热有机金属原料的加热系统或用于对有机金属原料施加超声振动的超声波振动器作为调节气体供给量的机构，有机金属原料的气化量通过调节加热系统的加热温度或改变超声波振动器的输出。

2. 发明授权

US5945690A Compound semiconductor device 失效
标题翻译：复合半导体器件
公开(公告)号：US5945690A
公开(公告)日：1999-08-31
申请号：US25645
申请日：1998-02-18
申请人： Junji Saito , Toshihide Kikkawa , Hirosato Ochimizu
发明人： Junji Saito , Toshihide Kikkawa , Hirosato Ochimizu
IPC分类号： C30B25/02 , H01L21/20 , H01L21/203 , H01L21/285 , H01L21/335 , H01L33/00
CPC分类号： C30B25/02 , C30B29/40 , H01L21/02392 , H01L21/02395 , H01L21/02433 , H01L21/02461 , H01L21/02463 , H01L21/02543 , H01L21/02546 , H01L21/02549 , H01L21/02576 , H01L21/02579 , H01L21/0262 , H01L21/02631 , H01L21/28575 , H01L21/28587 , H01L29/66462 , Y10S438/973
摘要： The present invention includes a process of growing a compound semiconductor layer locally, after applying radical particles that do not become an etchant of a compound semiconductor layer to an insulating mask so as to terminate the surface of the insulating mask in a state that the compound semiconductor layer is covered with the insulating mask, on the surface of the compound semiconductor layer exposed from the insulating mask.
摘要翻译：本发明包括在将化合物半导体层不成为蚀刻剂的自由基粒子施加到绝缘掩模之后局部生长化合物半导体层的方法，以便在化合物半导体的状态下终止绝缘掩模的表面在由绝缘掩模露出的化合物半导体层的表面上用绝缘掩模覆盖层。

3. 发明授权

US5762706A Method of forming compound semiconductor device 失效
标题翻译：形成化合物半导体器件的方法
公开(公告)号：US5762706A
公开(公告)日：1998-06-09
申请号：US337829
申请日：1994-11-08
申请人： Junji Saito , Toshihide Kikkawa , Hirosato Ochimizu
发明人： Junji Saito , Toshihide Kikkawa , Hirosato Ochimizu
IPC分类号： C30B25/02 , H01L21/20 , H01L21/203 , H01L21/285 , H01L21/335 , C30B23/02
CPC分类号： C30B25/02 , C30B29/40 , H01L21/02392 , H01L21/02395 , H01L21/02433 , H01L21/02461 , H01L21/02463 , H01L21/02543 , H01L21/02546 , H01L21/02549 , H01L21/02576 , H01L21/02579 , H01L21/0262 , H01L21/02631 , H01L21/28575 , H01L21/28587 , H01L29/66462 , Y10S438/973
摘要： The present invention includes a process of growing a compound semiconductor layer locally, after applying radical particles that do not become an etchant of a compound semiconductor layer to an insulating mask so as to terminate the surface of the insulating mask in a state that the compound semiconductor layer is covered with the insulating mask, on the surface of the compound semiconductor layer exposed from the insulating mask.
摘要翻译：本发明包括在将化合物半导体层不成为蚀刻剂的自由基粒子施加到绝缘掩模之后局部生长化合物半导体层的方法，以便在化合物半导体的状态下终止绝缘掩模的表面在由绝缘掩模露出的化合物半导体层的表面上用绝缘掩模覆盖层。

4. 发明授权

US5521404A Group III-V interdiffusion prevented hetero-junction semiconductor device 失效
标题翻译： III-V相互扩散阻止异质结半导体器件
公开(公告)号：US5521404A
公开(公告)日：1996-05-28
申请号：US353156
申请日：1994-12-09
申请人： Toshihide Kikkawa , Hirosato Ochimizu
发明人： Toshihide Kikkawa , Hirosato Ochimizu
IPC分类号： H01L29/812 , H01L21/338 , H01L29/12 , H01L29/778 , H01L29/06 , H01L31/0328 , H01L31/072
CPC分类号： B82Y10/00 , H01L29/122 , H01L29/7783
摘要： A high electron mobility transistor type group III-V compound semiconductor device includes a substrate of a group III-V compound semiconductor, an electron transfer layer of a group III-V compound semiconductor formed on the substrate, an impurity doped electron supply layer of a group III-V compound semiconductor having a wider band gap and smaller electron affinity than the electron transfer layer, and a spacer layer of a group III-V compound semiconductor having a lattice mismatch with the electron supply layer, the spacer layer being formed between the electron transfer layer and the electron supply layer. A HEMT type group III-V compound semiconductor device is provided which uses an Si-doped electron supply layer of material such as InGaP other than AlGaAs and has good device properties.
摘要翻译：高电子迁移率晶体管型III-V族化合物半导体器件包括III-V族化合物半导体的衬底，形成在衬底上的III-V族化合物半导体的电子转移层，具有比电子转移层更宽的带隙和更小的电子亲和力的III-V族化合物半导体和具有与电子供应层的晶格失配的III-V族化合物半导体的间隔层，间隔层形成在电子转移层和电子供应层。提供HEMT型III-V族化合物半导体器件，其使用除了AlGaAs以外的诸如InGaP的材料的Si掺杂电子供给层，并且具有良好的器件特性。

5. 发明授权

US5844303A Semiconductor device having improved electronic isolation 失效
标题翻译：具有改进的电子隔离的半导体器件
公开(公告)号：US5844303A
公开(公告)日：1998-12-01
申请号：US214600
申请日：1994-03-17
申请人： Toshihide Kikkawa , Tatsuya Ohori , Hirosato Ochimizu
发明人： Toshihide Kikkawa , Tatsuya Ohori , Hirosato Ochimizu
IPC分类号： H01L21/20 , H01L21/205 , H01L21/76 , H01L21/8252 , H01L27/06 , H01L29/167
CPC分类号： H01L27/0605 , H01L21/02381 , H01L21/02395 , H01L21/02463 , H01L21/02505 , H01L21/02507 , H01L21/02546 , H01L21/0262 , H01L21/7605 , H01L21/8252
摘要： A semiconductor device includes a buffer layer of AlGaAs that contains oxygen with a concentration level in the approximate range of 8.times.10.sup.17 cm.sup.-3 to 6.times.10.sup.19 cm.sup.-3, and carbon with a concentration level in the approximate range of 2.times.10.sup.16 cm.sup.-3 to 2.times.10.sup.17 cm.sup.-3. A lattice constant of the AlGaAs buffer layer is larger than a lattice constant of the GaAs substrate so a lattice misfit of the AlGaAs layer with respect to the GaAs substrate is equal to or varies by no more than 2.times.10.sup.5 from a corresponding lattice misfit between an undoped AlGaAs crystal with respect to the GaAs substrate. Oxygen atoms occupy an interstitial site, creating a deep impurity level that suppresses side gate effect.
摘要翻译：半导体器件包括含有浓度在8×10 17 cm -3至6×10 19 cm -3的浓度范围内的氧的AlGaAs缓冲层，浓度水平在2×10 16 cm -3至2×10 17 cm -3的范围内的碳， 3。 AlGaAs缓冲层的晶格常数大于GaAs衬底的晶格常数，因此AlGaAs层相对于GaAs衬底的晶格失配从未掺杂的相应晶格失配等于或不超过2×10 5 AlGaAs晶体相对于GaAs衬底。氧原子占据间隙位置，产生抑制侧栅效应的深杂质水平。

6. 发明授权

US08836126B2 Semiconductor device having insulating layers containing oxygen and a barrier layer containing manganese 有权
标题翻译：具有包含氧的绝缘层和含有锰的阻挡层的半导体器件
公开(公告)号：US08836126B2
公开(公告)日：2014-09-16
申请号：US12535489
申请日：2009-08-04
申请人： Hirosato Ochimizu , Atsuhiro Tsukune , Hiroshi Kudo
发明人： Hirosato Ochimizu , Atsuhiro Tsukune , Hiroshi Kudo
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40 , H01L23/532 , H01L21/768 , H01L23/528
CPC分类号： H01L21/76807 , H01L21/76831 , H01L21/76843 , H01L21/76846 , H01L21/76864 , H01L21/76867 , H01L21/76873 , H01L21/76879 , H01L23/5226 , H01L23/528 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2224/05149 , H01L2224/05649 , H01L2224/29149 , H01L2224/29649 , H01L2224/80449 , H01L2224/81449 , H01L2224/83449 , H01L2224/84449 , H01L2224/85449 , H01L2924/0002 , H01L2924/01025 , H01L2924/00
摘要： A semiconductor device includes an insulating layer formed over a semiconductor substrate, the insulating layer including oxygen, a first wire formed in the insulating layer, and a second wire formed in the insulating layer over the first wire and containing manganese, oxygen, and copper, the second wire having a projection portion formed in the insulating layer and extending downwardly but spaced apart from the first wire.
摘要翻译：半导体器件包括形成在半导体衬底上的绝缘层，所述绝缘层包括氧，形成在所述绝缘层中的第一线，以及形成在所述第一线上的绝缘层中并且含有锰，氧和铜的第二线，所述第二线具有形成在所述绝缘层中并且向下延伸但与所述第一线间隔开的突出部分。

7. 发明申请

US20060068557A1 Semiconductor device and method for fabricating the same 有权
公开(公告)号：US20060068557A1
公开(公告)日：2006-03-30
申请号：US11272342
申请日：2005-11-14
申请人： Hirosato Ochimizu , Yasuyoshi Mishima
发明人： Hirosato Ochimizu , Yasuyoshi Mishima
IPC分类号： H01L21/331
CPC分类号： H01L29/78696 , H01L21/76281 , H01L21/76283 , H01L21/823807 , H01L21/84 , H01L27/1203 , H01L29/1054 , H01L29/78687
摘要： On an insulation layer 12 formed on a silicon substrate 10, there are formed in an NMOS transistor region 16 an NMOS transistor 14 comprising a silicon layer 34, a lattice-relaxed silicon germanium layer 22 formed on the silicon layer 34, a tensile-strained silicon layer 24 formed on the silicon germanium layer 22 and a gate electrode 28 formed on the silicon layer 24 with a gate insulation film 26 formed therebetween and in a PMOS transistor region 20 a PMOS transistor 18 comprising a silicon layer 34, a compression-strained silicon germanium layer formed on the silicon layer 34 and a gate electrode 28 formed on the silicon germanium layer 36 with a gate insulation film 26 formed therebetween.

8. 发明授权

US07449379B2 Semiconductor device and method for fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07449379B2
公开(公告)日：2008-11-11
申请号：US11272342
申请日：2005-11-14
申请人： Hirosato Ochimizu , Yasuyoshi Mishima
发明人： Hirosato Ochimizu , Yasuyoshi Mishima
IPC分类号： H01L21/8238
CPC分类号： H01L29/78696 , H01L21/76281 , H01L21/76283 , H01L21/823807 , H01L21/84 , H01L27/1203 , H01L29/1054 , H01L29/78687
摘要： On an insulation layer 12 formed on a silicon substrate 10, there are formed in an NMOS transistor region 16 an NMOS transistor 14 comprising a silicon layer 34, a lattice-relaxed silicon germanium layer 22 formed on the silicon layer 34, a tensile-strained silicon layer 24 formed on the silicon germanium layer 22 and a gate electrode 28 formed on the silicon layer 24 with a gate insulation film 26 formed therebetween and in a PMOS transistor region 20 a PMOS transistor 18 comprising a silicon layer 34, a compression-strained silicon germanium layer formed on the silicon layer 34 and a gate electrode 28 formed on the silicon germanium layer 36 with a gate insulation film 26 formed therebetween.
摘要翻译：在形成在硅衬底10上的绝缘层12上，在NMOS晶体管区16中形成NMOS晶体管14，NMOS晶体管14包括硅层34，形成在硅层34上的晶格弛豫硅锗层22，拉伸应变形成在硅锗层22上的硅层24和形成在硅层24上的栅电极28，其间形成有栅极绝缘膜26，在PMOS晶体管区域20中形成PMOS晶体管18，PMOS晶体管18包括硅层34，压缩应变形成在硅层34上的硅锗层和形成在硅锗层36上的栅极28，其间形成有栅极绝缘膜26。

9. 发明申请

US20090039391A1 Semiconductor device and method for fabricating the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20090039391A1
公开(公告)日：2009-02-12
申请号：US12285274
申请日：2008-10-01
申请人： Hirosato Ochimizu , Yasuyoshi Mishima
发明人： Hirosato Ochimizu , Yasuyoshi Mishima
IPC分类号： H01L29/772 , H01L21/20
CPC分类号： H01L29/78696 , H01L21/76281 , H01L21/76283 , H01L21/823807 , H01L21/84 , H01L27/1203 , H01L29/1054 , H01L29/78687
摘要： On an insulation layer 12 formed on a silicon substrate 10, there are formed in an NMOS transistor region 16 an NMOS transistor 14 comprising a silicon layer 34, a lattice-relaxed silicon germanium layer 22 formed on the silicon layer 34, a tensile-strained silicon layer 24 formed on the silicon germanium layer 22 and a gate electrode 28 formed on the silicon layer 24 with a gate insulation film 26 formed therebetween and in a PMOS transistor region 20 a PMOS transistor 18 comprising a silicon layer 34, a compression-strained silicon germanium layer formed on the silicon layer 34 and a gate electrode 28 formed on the silicon germanium layer 36 with a gate insulation film 26 formed therebetween.
摘要翻译：在形成在硅衬底10上的绝缘层12上，在NMOS晶体管区16中形成NMOS晶体管14，NMOS晶体管14包括硅层34，形成在硅层34上的晶格弛豫硅锗层22，拉伸应变形成在硅锗层22上的硅层24和形成在硅层24上的栅电极28，其间形成有栅极绝缘膜26，在PMOS晶体管区域20中形成PMOS晶体管18，PMOS晶体管18包括硅层34，压缩应变形成在硅层34上的硅锗层和形成在硅锗层36上的栅极28，其间形成有栅极绝缘膜26。

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