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1. 发明授权

US5945690A Compound semiconductor device 失效
标题翻译：复合半导体器件
公开(公告)号：US5945690A
公开(公告)日：1999-08-31
申请号：US25645
申请日：1998-02-18
申请人： Junji Saito , Toshihide Kikkawa , Hirosato Ochimizu
发明人： Junji Saito , Toshihide Kikkawa , Hirosato Ochimizu
IPC分类号： C30B25/02 , H01L21/20 , H01L21/203 , H01L21/285 , H01L21/335 , H01L33/00
CPC分类号： C30B25/02 , C30B29/40 , H01L21/02392 , H01L21/02395 , H01L21/02433 , H01L21/02461 , H01L21/02463 , H01L21/02543 , H01L21/02546 , H01L21/02549 , H01L21/02576 , H01L21/02579 , H01L21/0262 , H01L21/02631 , H01L21/28575 , H01L21/28587 , H01L29/66462 , Y10S438/973
摘要： The present invention includes a process of growing a compound semiconductor layer locally, after applying radical particles that do not become an etchant of a compound semiconductor layer to an insulating mask so as to terminate the surface of the insulating mask in a state that the compound semiconductor layer is covered with the insulating mask, on the surface of the compound semiconductor layer exposed from the insulating mask.
摘要翻译：本发明包括在将化合物半导体层不成为蚀刻剂的自由基粒子施加到绝缘掩模之后局部生长化合物半导体层的方法，以便在化合物半导体的状态下终止绝缘掩模的表面在由绝缘掩模露出的化合物半导体层的表面上用绝缘掩模覆盖层。

2. 发明授权

US5762706A Method of forming compound semiconductor device 失效
标题翻译：形成化合物半导体器件的方法
公开(公告)号：US5762706A
公开(公告)日：1998-06-09
申请号：US337829
申请日：1994-11-08
申请人： Junji Saito , Toshihide Kikkawa , Hirosato Ochimizu
发明人： Junji Saito , Toshihide Kikkawa , Hirosato Ochimizu
IPC分类号： C30B25/02 , H01L21/20 , H01L21/203 , H01L21/285 , H01L21/335 , C30B23/02
CPC分类号： C30B25/02 , C30B29/40 , H01L21/02392 , H01L21/02395 , H01L21/02433 , H01L21/02461 , H01L21/02463 , H01L21/02543 , H01L21/02546 , H01L21/02549 , H01L21/02576 , H01L21/02579 , H01L21/0262 , H01L21/02631 , H01L21/28575 , H01L21/28587 , H01L29/66462 , Y10S438/973
摘要： The present invention includes a process of growing a compound semiconductor layer locally, after applying radical particles that do not become an etchant of a compound semiconductor layer to an insulating mask so as to terminate the surface of the insulating mask in a state that the compound semiconductor layer is covered with the insulating mask, on the surface of the compound semiconductor layer exposed from the insulating mask.
摘要翻译：本发明包括在将化合物半导体层不成为蚀刻剂的自由基粒子施加到绝缘掩模之后局部生长化合物半导体层的方法，以便在化合物半导体的状态下终止绝缘掩模的表面在由绝缘掩模露出的化合物半导体层的表面上用绝缘掩模覆盖层。

3. 发明授权

US5521404A Group III-V interdiffusion prevented hetero-junction semiconductor device 失效
标题翻译： III-V相互扩散阻止异质结半导体器件
公开(公告)号：US5521404A
公开(公告)日：1996-05-28
申请号：US353156
申请日：1994-12-09
申请人： Toshihide Kikkawa , Hirosato Ochimizu
发明人： Toshihide Kikkawa , Hirosato Ochimizu
IPC分类号： H01L29/812 , H01L21/338 , H01L29/12 , H01L29/778 , H01L29/06 , H01L31/0328 , H01L31/072
CPC分类号： B82Y10/00 , H01L29/122 , H01L29/7783
摘要： A high electron mobility transistor type group III-V compound semiconductor device includes a substrate of a group III-V compound semiconductor, an electron transfer layer of a group III-V compound semiconductor formed on the substrate, an impurity doped electron supply layer of a group III-V compound semiconductor having a wider band gap and smaller electron affinity than the electron transfer layer, and a spacer layer of a group III-V compound semiconductor having a lattice mismatch with the electron supply layer, the spacer layer being formed between the electron transfer layer and the electron supply layer. A HEMT type group III-V compound semiconductor device is provided which uses an Si-doped electron supply layer of material such as InGaP other than AlGaAs and has good device properties.
摘要翻译：高电子迁移率晶体管型III-V族化合物半导体器件包括III-V族化合物半导体的衬底，形成在衬底上的III-V族化合物半导体的电子转移层，具有比电子转移层更宽的带隙和更小的电子亲和力的III-V族化合物半导体和具有与电子供应层的晶格失配的III-V族化合物半导体的间隔层，间隔层形成在电子转移层和电子供应层。提供HEMT型III-V族化合物半导体器件，其使用除了AlGaAs以外的诸如InGaP的材料的Si掺杂电子供给层，并且具有良好的器件特性。

4. 发明授权

US5844303A Semiconductor device having improved electronic isolation 失效
标题翻译：具有改进的电子隔离的半导体器件
公开(公告)号：US5844303A
公开(公告)日：1998-12-01
申请号：US214600
申请日：1994-03-17
申请人： Toshihide Kikkawa , Tatsuya Ohori , Hirosato Ochimizu
发明人： Toshihide Kikkawa , Tatsuya Ohori , Hirosato Ochimizu
IPC分类号： H01L21/20 , H01L21/205 , H01L21/76 , H01L21/8252 , H01L27/06 , H01L29/167
CPC分类号： H01L27/0605 , H01L21/02381 , H01L21/02395 , H01L21/02463 , H01L21/02505 , H01L21/02507 , H01L21/02546 , H01L21/0262 , H01L21/7605 , H01L21/8252
摘要： A semiconductor device includes a buffer layer of AlGaAs that contains oxygen with a concentration level in the approximate range of 8.times.10.sup.17 cm.sup.-3 to 6.times.10.sup.19 cm.sup.-3, and carbon with a concentration level in the approximate range of 2.times.10.sup.16 cm.sup.-3 to 2.times.10.sup.17 cm.sup.-3. A lattice constant of the AlGaAs buffer layer is larger than a lattice constant of the GaAs substrate so a lattice misfit of the AlGaAs layer with respect to the GaAs substrate is equal to or varies by no more than 2.times.10.sup.5 from a corresponding lattice misfit between an undoped AlGaAs crystal with respect to the GaAs substrate. Oxygen atoms occupy an interstitial site, creating a deep impurity level that suppresses side gate effect.
摘要翻译：半导体器件包括含有浓度在8×10 17 cm -3至6×10 19 cm -3的浓度范围内的氧的AlGaAs缓冲层，浓度水平在2×10 16 cm -3至2×10 17 cm -3的范围内的碳， 3。 AlGaAs缓冲层的晶格常数大于GaAs衬底的晶格常数，因此AlGaAs层相对于GaAs衬底的晶格失配从未掺杂的相应晶格失配等于或不超过2×10 5 AlGaAs晶体相对于GaAs衬底。氧原子占据间隙位置，产生抑制侧栅效应的深杂质水平。

5. 发明授权

US5460654A Apparatus for generating raw material gas used in apparatus for growing thin film 失效
标题翻译：用于生长用于生长薄膜的装置中的原料气体的装置
公开(公告)号：US5460654A
公开(公告)日：1995-10-24
申请号：US84020
申请日：1993-06-30
申请人： Toshihide Kikkawa , Hitoshi Tanaka , Hirosato Ochimizu
发明人： Toshihide Kikkawa , Hitoshi Tanaka , Hirosato Ochimizu
IPC分类号： H01L21/205 , C23C16/44 , C23C16/448 , C30B25/14 , H01L21/31 , C23C16/00
CPC分类号： C23C16/4485
摘要： In an apparatus for forming a film of MOCVD, gas source MBE or the like, there is provided a gas supply pipe for supplying gas obtained by gasifying a liquid or solid organic metal raw material to a reaction chamber. A mechanism in which a pressure gauge is fitted in the vicinity of a gas generating source in the gas supply pipe and the gas supply quantity from the gas generating source is regulated based on an indicated value of the pressure gauge so as to suppress variation of the gas pressure is installed in the apparatus for forming a film.There is a heating system for heating the organic metal raw material or an ultrasonic vibrator for applying ultrasonic vibration to the organic metal raw material as the mechanism for regulating the gas supply quantity, and the gasified quantity of the organic metal raw material is varied by regulating the heating temperature of the heating system or by varying the output of the ultrasonic vibrator.
摘要翻译：在用于形成MOCVD，气体源MBE等的膜的装置中，设置有用于将通过将液体或固体有机金属原料气化而获得的气体供给到反应室的气体供给管。基于压力计的指示值，调节在气体供给管内的气体发生源附近配置压力计和来自气体发生源的气体供给量的机构，以抑制压力计的变化气体压力安装在用于形成薄膜的装置中。有机加热有机金属原料的加热系统或用于对有机金属原料施加超声振动的超声波振动器作为调节气体供给量的机构，有机金属原料的气化量通过调节加热系统的加热温度或改变超声波振动器的输出。

6. 发明授权

US09276100B2 Semiconductor device having a gate recess structure 有权
标题翻译：具有栅极凹部结构的半导体器件
公开(公告)号：US09276100B2
公开(公告)日：2016-03-01
申请号：US13294740
申请日：2011-11-11
申请人： Hiroshi Endo , Toshihiro Ohki , Toshihide Kikkawa
发明人： Hiroshi Endo , Toshihiro Ohki , Toshihide Kikkawa
IPC分类号： H01L29/78 , H01L29/778 , H01L29/423 , H01L29/66 , H01L29/20
CPC分类号： H01L29/7787 , H01L29/2003 , H01L29/42356 , H01L29/4236 , H01L29/42364 , H01L29/66462 , H01L29/7839 , H01L2224/0603 , H01L2224/48247 , H01L2224/48257
摘要： A semiconductor device includes a first semiconductor layer disposed over a substrate, a second semiconductor layer disposed over the first semiconductor layer, a gate recess disposed, through removal of a part of or all the second semiconductor layer, in a predetermined region over the first semiconductor layer, an insulating film disposed over the gate recess and the second semiconductor layer, a gate electrode disposed over the gate recess with the insulating film therebetween, and a source electrode and a drain electrode disposed over the first semiconductor layer or the second semiconductor layer, whereby a central portion of the gate recess is higher than a peripheral portion of the gate recess.
摘要翻译：半导体器件包括设置在衬底上的第一半导体层，设置在第一半导体层上的第二半导体层，通过在第一半导体上的预定区域中去除一部分或全部第二半导体层而设置的栅极凹槽设置在所述栅极凹部和所述第二半导体层上的绝缘膜，设置在所述栅极凹部上方的绝缘膜的栅电极，以及设置在所述第一半导体层或所述第二半导体层上的源电极和漏电极，从而栅极凹部的中心部分比栅极凹部的周边部分高。

7. 发明授权

US08816408B2 Compound semiconductor device and manufacturing method thereof 有权
标题翻译：化合物半导体器件及其制造方法
公开(公告)号：US08816408B2
公开(公告)日：2014-08-26
申请号：US12721052
申请日：2010-03-10
申请人： Kozo Makiyama , Toshihide Kikkawa
发明人： Kozo Makiyama , Toshihide Kikkawa
IPC分类号： H01L29/66 , H01L29/778 , H01L29/78 , H01L29/20 , H01L29/06 , H01L29/423
CPC分类号： H01L29/7787 , H01L29/0692 , H01L29/2003 , H01L29/42316 , H01L29/42376 , H01L29/66462 , H01L29/7843
摘要： A compound semiconductor device includes a compound semiconductor laminated structure; a source electrode, a drain electrode, and a gate electrode formed over the compound semiconductor laminated structure; a first protective film formed over the compound semiconductor laminated structure between the source electrode and the gate electrode and including silicon; and a second protective film formed over the compound semiconductor laminated structure between the drain electrode and the gate electrode and including more silicon than the first protective film.
摘要翻译：化合物半导体器件包括化合物半导体层叠结构; 源电极，漏电极和形成在化合物半导体层叠结构上的栅电极; 在所述源电极和所述栅电极之间并且包括硅的所述化合物半导体层叠结构上形成的第一保护膜; 以及形成在所述漏电极和所述栅电极之间的所述化合物半导体层叠结构上并且包含比所述第一保护膜更多的硅的第二保护膜。

8. 发明授权

US08765554B2 Compound semiconductor device and method for manufacturing the same 有权
标题翻译：复合半导体器件及其制造方法
公开(公告)号：US08765554B2
公开(公告)日：2014-07-01
申请号：US13325972
申请日：2011-12-14
申请人： Tadahiro Imada , Toshihide Kikkawa
发明人： Tadahiro Imada , Toshihide Kikkawa
IPC分类号： H01L21/336
CPC分类号： H01L29/7787 , H01L29/0619 , H01L29/2003 , H01L29/205 , H01L29/4236 , H01L29/66462 , H01L2224/0603 , H01L2224/48247 , H01L2224/48472 , H01L2924/181 , H03F1/3247 , H03F1/523 , H03F3/189 , H03F3/24 , H03F2200/204 , H03F2200/426 , H03F2200/444 , H03F2200/451 , H01L2924/00 , H01L2924/00012
摘要： A gate electrode is formed so as to embed an electrode material in a recess for an electrode, which has been formed in a structure of stacked compound semiconductors, through a gate insulation film, and also a field plate electrode that comes in Schottky contact with the structure of the stacked compound semiconductors is formed by embedding an electrode material in a recess for an electrode, which has been formed in the structure of the stacked compound semiconductors so that the field plate electrode directly comes in contact with the structure of the stacked compound semiconductors at least on the bottom face of the recess for the electrode.
摘要翻译：形成栅电极，以便通过栅极绝缘膜将电极材料嵌入已形成为叠层化合物半导体的结构的电极用凹部中，并且还形成与电极的肖特基接触的场板电极堆叠的化合物半导体的结构通过将电极材料嵌入到在层叠的化合物半导体的结构中形成的电极的凹部中而形成，使得场板电极直接与堆叠的化合物半导体的结构接触至少在用于电极的凹槽的底面上。

9. 发明授权

US08658482B2 Compound semiconductor device and method for fabricating the same 有权
标题翻译：化合物半导体器件及其制造方法
公开(公告)号：US08658482B2
公开(公告)日：2014-02-25
申请号：US12926990
申请日：2010-12-22
申请人： Toshihide Kikkawa
发明人： Toshihide Kikkawa
IPC分类号： H01L21/338
CPC分类号： H01L29/7787 , H01L23/291 , H01L23/3171 , H01L29/2003 , H01L29/205 , H01L29/66462 , H01L29/778 , H01L2924/0002 , H01L2924/00
摘要： The compound semiconductor device comprises an i-GaN buffer layer 12 formed on an SiC substrate 10; an n-AlGaN electron supplying layer 16 formed on the i-GaN buffer layer 12; an n-GaN cap layer 18 formed on the n-AlGaN electron supplying layer 16; a source electrode 20 and a drain electrode 22 formed on the n-GaN cap layer 18; a gate electrode 26 formed on the n-GaN cap layer 18 between the source electrode 20 and the drain electrode 22; a first protection layer 24 formed on the n-GaN cap layer 18 between the source electrode 20 and the drain electrode 22; and a second protection layer 30 buried in an opening 28 formed in the first protection layer 24 between the gate electrode 26 and the drain electrode 22 down to the n-GaN cap layer 18 and formed of an insulation film different from the first protection layer.
摘要翻译：化合物半导体器件包括形成在SiC衬底10上的i-GaN缓冲层12; 形成在i-GaN缓冲层12上的n-AlGaN电子供给层16; 形成在n-AlGaN电子供给层16上的n-GaN帽层18; 形成在n-GaN覆盖层18上的源电极20和漏电极22; 形成在源电极20和漏电极22之间的n-GaN覆盖层18上的栅电极26; 形成在源电极20和漏电极22之间的n-GaN覆盖层18上的第一保护层24; 以及第二保护层30，该第二保护层30形成在栅电极26和漏电极22之间的第一保护层24中的开口28中，直到n-GaN覆盖层18，并且由与第一保护层不同的绝缘膜形成。

10. 发明申请

US20130083569A1 MANUFACTURING METHOD OF COMPOUND SEMICONDUCTOR DEVICE 审中-公开
标题翻译：复合半导体器件的制造方法
公开(公告)号：US20130083569A1
公开(公告)日：2013-04-04
申请号：US13557332
申请日：2012-07-25
申请人： Yuichi Minoura , Naoya Okamoto , Toshihide Kikkawa , Kozo Makiyama , Toshihiro Ohki
发明人： Yuichi Minoura , Naoya Okamoto , Toshihide Kikkawa , Kozo Makiyama , Toshihiro Ohki
IPC分类号： H01L21/283 , H02M5/458 , H01L23/48 , H01L21/28 , H01L29/78
CPC分类号： H01L29/66462 , H01L29/2003 , H01L29/205 , H01L29/207 , H01L29/66212 , H01L29/7787 , H01L29/872 , H02M1/4225 , H02M3/33569 , H02M2001/007 , Y02B70/126
摘要： A passivation film is formed on a compound semiconductor layered structure, an electrode formation scheduled position for the passivation film is thinned by dry etching, a thinned portion of the passivation film is penetrated by wet etching to form an opening, and a gate electrode is formed on the passivation film so as to embed this opening by an electrode material.
摘要翻译：在化合物半导体层状结构上形成钝化膜，通过干蚀刻使钝化膜的电极形成预定位置变薄，通过湿蚀刻渗透钝化膜的薄化部分以形成开口，形成栅电极在钝化膜上，以便通过电极材料嵌入该开口。

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