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1. 发明授权

US07725082B2 Radio communication apparatus, radio communication method, antenna apparatus and first duplexer 失效
标题翻译：无线电通信装置，无线电通信方法，天线装置和第一双工器
公开(公告)号：US07725082B2
公开(公告)日：2010-05-25
申请号：US11766389
申请日：2007-06-21
申请人： Toshifumi Nakatani , Atsushi Yamamoto , Hisashi Adachi
发明人： Toshifumi Nakatani , Atsushi Yamamoto , Hisashi Adachi
IPC分类号： H04B1/44 , H04B1/46
CPC分类号： H04B1/525
摘要： Radio communication apparatus comprising an antenna, a transmitting circuit of outputting a transmitting signal in a first frequency band. A duplexer connected to the antenna and having a single-phase input terminal and a balanced output terminal, conveying the transmitting signal inputted to the single-phase input terminal to the antenna. The duplexer outputs a receiving signal in a second frequency band different from the first frequency band received from the antenna substantially as a differential signal from the balanced output terminal. A receiving circuit connected to the balanced output terminal and having a circuit in which a gain of a signal of a differential component is higher than that of a signal of an in-phase component, or a loss of the signal of the differential component is lower than that of the signal of the in-phase component.
摘要翻译：无线通信装置，包括：天线，输出第一频带的发送信号的发送电路。连接到天线并具有单相输入端子和平衡输出端子的双工器，将输入到单相输入端子的发送信号传送到天线。双工器基本上作为来自平衡输出端子的差分信号，输出与从天线接收的第一频带不同的第二频带中的接收信号。连接到平衡输出端子并具有差分分量的信号的增益高于同相分量的信号的增益或差分分量的信号的损失的电路的接收电路较低比同相成分的信号。

2. 发明授权

US07245890B2 High frequency variable gain amplification device, control device, high frequency variable gain frequency-conversion device, and communication device 失效
标题翻译：高频可变增益放大装置，控制装置，高频可变增益变频装置及通讯装置
公开(公告)号：US07245890B2
公开(公告)日：2007-07-17
申请号：US10895380
申请日：2004-07-21
申请人： Masahiro Kumagawa , Toshifumi Nakatani , Hisashi Adachi
发明人： Masahiro Kumagawa , Toshifumi Nakatani , Hisashi Adachi
IPC分类号： H04B1/06 , H04B7/00
CPC分类号： H03G3/3052 , H03G3/3063
摘要： A high frequency variable gain amplification device 100 includes: a feedback circuit 103 capable of changing a feedback impedance to adjust the gain of an amplifier 101 in accordance with a control signal from a control device 200; and a current consumption adjustment circuit 102 capable of adjusting current consumption of the amplifier 101. The control device 200 controls the feedback impedance and the current consumption based on a desired signal power level and an undesired signal power level. If the desired signal power level exceeds a predetermined value, the control device 200 reduces the feedback impedance to increase the amount of a feedback signal, thereby allowing the amplifier 101 to operate with low gain so as to prevent the distortion characteristic from being reduced and to reduce the current consumption.
摘要翻译：高频可变增益放大装置100包括：能够根据来自控制装置200的控制信号改变反馈阻抗以调整放大器101的增益的反馈电路103; 以及能够调整放大器101的电流消耗的电流消耗调整电路102。控制装置200基于期望的信号功率电平和不期望的信号功率电平来控制反馈阻抗和电流消耗。如果期望的信号功率电平超过预定值，则控制装置200减小反馈阻抗以增加反馈信号的量，从而允许放大器101以低增益工作，以防止失真特性被降低，并且降低电流消耗。

3. 发明授权

US07245883B2 Radio communication apparatus, radio communication method, antenna apparatus and first duplexer 失效
标题翻译：无线电通信装置，无线电通信方法，天线装置和第一双工器
公开(公告)号：US07245883B2
公开(公告)日：2007-07-17
申请号：US10738421
申请日：2003-12-17
申请人： Toshifumi Nakatani , Atsushi Yamamoto , Hisashi Adachi
发明人： Toshifumi Nakatani , Atsushi Yamamoto , Hisashi Adachi
IPC分类号： H04B1/44
CPC分类号： H04B1/525
摘要： Radio communication apparatus comprising an antenna, a transmitting circuit outputting a transmitting signal in a first frequency band. A duplexer connected to the antenna and having a single-phase input terminal and a balanced output terminal, conveying the transmitting signal inputted to the single-phase input terminal to the antenna. The duplexer outputs a receiving signal in a second frequency band different from the first frequency band received from the antenna substantially as a differential signal from the balanced output terminal. A receiving circuit connected to the balanced output terminal and having a circuit in which a gain of a signal of a differential component is higher than that of a signal of an in-phase component, or a loss of the signal of the differential component is lower than that of the signal of the in-phase component.
摘要翻译：无线通信装置，包括天线，发送电路，输出第一频带的发送信号。连接到天线并具有单相输入端子和平衡输出端子的双工器，将输入到单相输入端子的发送信号传送到天线。双工器基本上作为来自平衡输出端子的差分信号，输出与从天线接收的第一频带不同的第二频带中的接收信号。连接到平衡输出端子并具有差分分量的信号的增益高于同相分量的信号的增益或差分分量的信号的损失的电路的接收电路较低比同相成分的信号。

4. 发明授权

US07050525B2 Frequency synthesizer apparatus equipped with fraction part control circuit, communication apparatus, frequency modulator apparatus, and frequency modulating method 有权
$Frequency synthesizer apparatus equipped with fraction part control circuit, communication apparatus, frequency modulator apparatus, and frequency modulating method$
公开(公告)号：US07050525B2
公开(公告)日：2006-05-23
申请号：US10728863
申请日：2003-12-08
申请人： Hisashi Adachi , Toshifumi Nakatani , Hiroaki Kosugi , Masakatsu Maeda , Shunsuke Hirano
发明人： Hisashi Adachi , Toshifumi Nakatani , Hiroaki Kosugi , Masakatsu Maeda , Shunsuke Hirano
IPC分类号： H03D3/24 , H03L7/00 , H03C3/06
CPC分类号： H03L7/1976
摘要： A fraction part control circuit of a frequency synthesizer apparatus including a PLL circuit is of a plural-n-th-order delta-sigma modulator circuit for controlling a fraction part of a number of frequency division to a variable frequency divider of the PLL circuit. An adder adds data of the fraction part to an output data from a multiplier and outputs the resultant data to a quantizer through a second-order integrator. The quantizer quantizes input data with a quantization step and outputs the quantized data to the multiplier through a feedback circuit. The quantized data is used as data of the controlled fraction part. The multiplier multiplies data from the feedback circuit by the quantization step and outputs the resultant data to the adder. The fraction part control circuit periodically changes the data of the fraction part, thereby setting a frequency of an output signal from a VCO according to an average value of the period.

5. 发明授权

US06927664B2 Mutual induction circuit 有权
标题翻译：互感电路
公开(公告)号：US06927664B2
公开(公告)日：2005-08-09
申请号：US10843575
申请日：2004-05-12
申请人： Toshifumi Nakatani , Hisashi Adachi
发明人： Toshifumi Nakatani , Hisashi Adachi
IPC分类号： H01P5/10 , H01F5/00
CPC分类号： H01P5/10
摘要： A transformer element 1 is formed on a semiconductor substrate using first and second wiring layers arranged parallel to each other in a vertical direction, and includes a first inductor 2 and a second inductor 3. The first and second inductors 2 and 3 are each provided using the first and second wiring layers such that if projected into one of the first and second wiring layers either along a vertical upward direction or a vertical downward direction, outlines of a projection form a symmetrical shape with respect to a predetermined reference plane, and portions corresponding to intersections between the outlines of the projection on the wiring layer are formed so as to be out of contact with each other.
摘要翻译：变压器元件1使用在垂直方向上彼此平行布置的第一和第二布线层形成在半导体衬底上，并且包括第一电感器2和第二电感器3。第一和第二电感器2和3各自使用第一和第二布线层设置，使得如果沿着垂直向上方向或垂直向下的方向突出到第一和第二布线层中的一个中，则突起形成对称的轮廓相对于预定参考平面的形状，并且对应于布线层上的突起的轮廓的部分形成为彼此不接触。

6. 发明申请

US20070243833A1 RADIO COMMUNICATION APPARATUS, RADIO COMMUNICATION METHOD, ANTENNA APPARATUS AND FIRST DUPLEXER 失效
标题翻译：无线电通信装置，无线电通信方法，天线装置和第一双工器
公开(公告)号：US20070243833A1
公开(公告)日：2007-10-18
申请号：US11766389
申请日：2007-06-21
申请人： Toshifumi Nakatani , Atsushi Yamamoto , Hisashi Adachi
发明人： Toshifumi Nakatani , Atsushi Yamamoto , Hisashi Adachi
IPC分类号： H04B1/44
CPC分类号： H04B1/525
摘要： Radio communication apparatus comprising an antenna, a transmitting circuit of outputting a transmitting signal in a first frequency band. A duplexer connected to the antenna and having a single-phase input terminal and a balanced output terminal, conveying the transmitting signal inputted to the single-phase input terminal to the antenna. The duplexer outputs a receiving signal in a second frequency band different from the first frequency band received from the antenna substantially as a differential signal from the balanced output terminal. A receiving circuit connected to the balanced output terminal and having a circuit in which a gain of a signal of a differential component is higher than that of a signal of an in-phase component, or a loss of the signal of the differential component is lower than that of the signal of the in-phase component.
摘要翻译：无线通信装置，包括：天线，输出第一频带的发送信号的发送电路。连接到天线并具有单相输入端子和平衡输出端子的双工器，将输入到单相输入端子的发送信号传送到天线。双工器基本上作为来自平衡输出端子的差分信号，输出与从天线接收的第一频带不同的第二频带中的接收信号。连接到平衡输出端子并具有差分分量的信号的增益高于同相分量的信号的增益或差分分量的信号的损失的电路的接收电路较低比同相成分的信号。

7. 发明申请

US20050002149A1 Differential capacitor, differential antenna element, and differential resonator 失效
标题翻译：差分电容，差分天线元件和差分谐振器
公开(公告)号：US20050002149A1
公开(公告)日：2005-01-06
申请号：US10880531
申请日：2004-07-01
申请人： Toshifumi Nakatani , Hisashi Adachi , Kayo Nakanishi
发明人： Toshifumi Nakatani , Hisashi Adachi , Kayo Nakanishi
IPC分类号： H01G2/22 , H01G4/005 , H01G4/38 , H01L27/00 , H01L27/04 , H01P1/203 , H01P7/08 , H01Q1/52 , H01Q9/04 , H01Q9/06 , H01Q15/00 , H01Q23/00
CPC分类号： H01L23/5223 , H01L2924/0002 , H01L2924/3011 , H01P1/203 , H01Q1/526 , H01Q15/0013 , H01Q23/00 , H01L2924/00
摘要： In a differential capacitor1, first and second capacitors 1003 and 1004 are formed in substantially symmetrical positions from each other with respect to a vertical plane B-B′, on a semiconductor substrate 1020. The differential capacitor 1 further includes a shield plate 1022 interposed between the semiconductor substrate 1020 and the lower electrodes 1016 and 1018. When each of the lower electrodes 1016 and 1018 is projected onto the shield plate 1022 along the vertical direction, each projected lower electrode 1016 or 1018 has a partial overlap with the shield plate 1022.
摘要翻译：在差分电容器1中，第一和第二电容器1003和1004在半导体衬底1020上形成为相对于垂直平面B-B'彼此大致对称的位置。差分电容器1还包括插入在半导体衬底1020和下电极1016和1018.当下电极1016和1018中的每一个沿着垂直方向投影到屏蔽板1022上时，每个突出的下电极1016或1018与屏蔽板1022具有部分重叠。

8. 发明授权

US06717998B2 Frequency synthesizer apparatus equipped with fraction part control circuit, communication apparatus, frequency modulator apparatus, and frequency modulating method 有权
$Frequency synthesizer apparatus equipped with fraction part control circuit, communication apparatus, frequency modulator apparatus, and frequency modulating method$
公开(公告)号：US06717998B2
公开(公告)日：2004-04-06
申请号：US09733949
申请日：2000-12-12
申请人： Hisashi Adachi , Toshifumi Nakatani , Hiroaki Kosugi , Masakatsu Maeda , Shunsuke Hirano
发明人： Hisashi Adachi , Toshifumi Nakatani , Hiroaki Kosugi , Masakatsu Maeda , Shunsuke Hirano
IPC分类号： H03D324
CPC分类号： H03L7/1976
摘要： A fraction part control circuit of a frequency synthesizer apparatus including a PLL circuit is of a plural-n-th-order delta-sigma modulator circuit for controlling a fraction part of a number of frequency division to a variable frequency divider of the PLL circuit. An adder adds data of the fraction part to an output data from a multiplier and outputs the resultant data to a quantizer through a second-order integrator. The quantizer quantizes input data with a quantization step and outputs the quantized data to the multiplier through a feedback circuit. The quantized data is used as data of the controlled fraction part. The multiplier multiplies data from the feedback circuit by the quantization step and outputs the resultant data to the adder. The fraction part control circuit periodically changes the data of the fraction part, thereby setting a frequency of an output signal from a VCO according to an average value of the period.

9. 发明授权

US06441692B1 PLL frequency synthesizer 失效
标题翻译： PLL频率合成器
公开(公告)号：US06441692B1
公开(公告)日：2002-08-27
申请号：US09154740
申请日：1998-09-17
申请人： Toshifumi Nakatani , Hisashi Adachi , Hiroaki Kosugi , Yuji Saito , Shunsuke Hirano , Hiroshi Haruki
发明人： Toshifumi Nakatani , Hisashi Adachi , Hiroaki Kosugi , Yuji Saito , Shunsuke Hirano , Hiroshi Haruki
IPC分类号： H03B2100
CPC分类号： H03L7/18 , H03L2207/10
摘要： The invention provides a high-speed PLL frequency synthesizer in which the frequency of a reference signal can be made larger than a frequency interval of an external output with a simple configuration. An n-th harmonic of an output of a voltage-controlled oscillator is caused to pass through a band pass filter. The frequency of an output of the band pass filter is divided by M in a variable frequency divider. The phase of an output of the variable frequency divider is compared with that of the reference signal in a phase comparator. An output of the phase comparator is smoothed by a loop filter. The output of the voltage-controlled oscillator is controlled by an output of the loop filter. The fundamental wave of the output of the voltage-controlled oscillator is caused to pass through another band pass filter, and then output to the outside. At this time, the frequency of the reference signal is n times a frequency interval of the fundamental wave of the output of the voltage-controlled oscillator.
摘要翻译：本发明提供了一种高速PLL频率合成器，其中参考信号的频率可以被制成大于具有简单配置的外部输出的频率间隔。使压控振荡器的输出的n次谐波通过带通滤波器。带通滤波器的输出频率由可分频器M分频。在相位比较器中，可变分频器的输出相位与参考信号的相位相比较。相位比较器的输出由环路滤波器平滑。压控振荡器的输出由环路滤波器的输出控制。使压控振荡器的输出的基波通过另一个带通滤波器，然后输出到外部。此时，参考信号的频率是压控振荡器的输出的基波的频率间隔的n倍。

10. 发明授权

US07110486B2 Frequency synthesizer apparatus equipped with fraction part control circuit, communication apparatus, frequency modulator apparatus, and frequency modulating method 有权
$Frequency synthesizer apparatus equipped with fraction part control circuit, communication apparatus, frequency modulator apparatus, and frequency modulating method$
公开(公告)号：US07110486B2
公开(公告)日：2006-09-19
申请号：US11333245
申请日：2006-01-18
申请人： Hisashi Adachi , Toshifumi Nakatani , Hiroaki Kosugi , Masakatsu Maeda , Shunsuke Hirano
发明人： Hisashi Adachi , Toshifumi Nakatani , Hiroaki Kosugi , Masakatsu Maeda , Shunsuke Hirano
IPC分类号： H03D3/24 , H03L7/00 , H03C3/06
CPC分类号： H03L7/1976
摘要： A fraction part control circuit of a frequency synthesizer apparatus including a PLL circuit is of a plural-n-th-order delta-sigma modulator circuit for controlling a fraction part of a number of frequency division to a variable frequency divider of the PLL circuit. An adder adds data of the fraction part to an output data from a multiplier and outputs the resultant data to a quantizer through a second-order integrator. The quantizer quantizes input data with a quantization step and outputs the quantized data to the multiplier through a feedback circuit. The quantized data is used as data of the controlled fraction part. The multiplier multiplies data from the feedback circuit by the quantization step and outputs the resultant data to the adder. The fraction part control circuit periodically changes the data of the fraction part, thereby setting a frequency of an output signal from a VCO according to an average value of the period.

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