会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明专利
    • Semiconductor storage device
    • 半导体存储设备
    • JP2011096131A
    • 2011-05-12
    • JP2009251283
    • 2009-10-30
    • Toshiba Corp株式会社東芝
    • NISHIYAMA TAKU
    • G06K19/077H01L23/12H01L25/065H01L25/07H01L25/18
    • G06K19/07732H01L24/73H01L2224/32225H01L2224/48145H01L2224/48227H01L2224/73265H01L2225/06562H01L2924/30107H01L2924/00012H01L2924/00
    • PROBLEM TO BE SOLVED: To provide a high-performance semiconductor storage device which can be efficiently produced.
      SOLUTION: A circuit board 11 has a column of a plurality of external connection terminals 3 on a first side, and a memory chip and a controller chip are mounted on a second side. The column of a connection pad 15 is disposed outside the edge of the external connection terminal of the memory chip on the second side and connected to the controller chip. The column of a resistance element 22 is arranged on the opposite side of the memory chip on the column of the connection pad and connected to the connection pad at one end. A plug 32 is provided near outside of the edge of the memory chip of the external connection terminal and penetrates through the first and second sides. A first wiring 31 is provided on the second side, is connected to the other end of the resistance element at one end, and is connected to a portion of the first side of a plug at the other end through outside of the column of the resistance element and outside of the column of the connection pad. A second wiring 33 is provided on the second side and connects the plug and the external connection terminal.
      COPYRIGHT: (C)2011,JPO&INPIT
    • 要解决的问题:提供可以有效地制造的高性能半导体存储装置。 解决方案:电路板11具有在第一侧上的多个外部连接端子3的列,并且存储芯片和控制器芯片安装在第二侧上。 连接焊盘15的列设置在第二侧的存储芯片的外部连接端子的边缘的外侧,并连接到控制器芯片。 电阻元件22的列布置在连接焊盘的列上的存储芯片的相对侧上,并在一端连接到连接焊盘。 插头32设置在外部连接端子的存储芯片的边缘附近,并穿过第一和第二侧。 第一配线31设置在第二侧,一端连接到电阻元件的另一端,另一端通过电阻柱的外部连接到插头的第一侧的一部分 元件和连接垫的列之外。 第二配线33设置在第二侧,并连接插头和外部连接端子。 版权所有(C)2011,JPO&INPIT
    • 9. 发明专利
    • Semiconductor device and semiconductor memory device
    • 半导体器件和半导体存储器件
    • JP2009158738A
    • 2009-07-16
    • JP2007335665
    • 2007-12-27
    • Toshiba Corp株式会社東芝
    • NISHIYAMA TAKUYAMAMOTO TETSUYA
    • H01L25/065H01L25/07H01L25/18
    • H01L24/73H01L2224/32145H01L2224/32225H01L2224/48145H01L2224/48147H01L2224/48227H01L2224/73265H01L2225/06562H01L2924/01037H01L2924/00012
    • PROBLEM TO BE SOLVED: To prevent contact of a metal wire between element groups in a semiconductor device where semiconductor elements are arranged in multistage on a wiring board.
      SOLUTION: A plurality of semiconductor elements 9A-9D constituting a first element group 12 are stacked stepwise on a wiring board 2 while directing the pad arrangement sides toward the same direction. On the first element group 12, a plurality of semiconductor elements 9E-9H constituting a second element group 13 are stacked stepwise to expose electrode pads 11 while directing the pad arrangement sides toward the same direction as that of the first element group. The second element group 13 is arranged while being shifted from the first element group 12 in the arrangement direction of the electrode pads 11. Each semiconductor element 9 is electrically connected with the connection pad 7 of the wiring board 2 through a metal wire 14.
      COPYRIGHT: (C)2009,JPO&INPIT
    • 要解决的问题:为了防止半导体元件中的元件组之间的金属线接触,其中半导体元件被布置在布线板上的多级中。 解决方案:构成第一元件组12的多个半导体元件9A-9D分层地叠置在布线板2上,同时将焊盘配置侧朝向相同的方向。 在第一元件组12上,构成第二元件组13的多个半导体元件9E-9H被逐层堆叠,以使焊盘排列侧朝与第一元件组的方向相同的方向露出电极焊盘11。 第二元件组13沿着电极焊盘11的排列方向从第一元件组12移位而布置。每个半导体元件9通过金属线14与布线板2的连接焊盘7电连接。 P>版权所有(C)2009,JPO&INPIT
    • 10. 发明专利
    • Semiconductor memory card
    • 半导体存储卡
    • JP2013182291A
    • 2013-09-12
    • JP2012043680
    • 2012-02-29
    • Toshiba Corp株式会社東芝
    • INAGAKI HIROSHIKAWAMURA HIDEKIOKADA TAKASHINISHIYAMA TAKU
    • G06K19/077H01L23/12H01L25/065H01L25/07H01L25/18
    • H01L2224/48091H01L2224/48227H01L2924/00014
    • PROBLEM TO BE SOLVED: To provide a semiconductor memory card for shortening wiring length from an external connection terminal to a controller chip.SOLUTION: A semiconductor memory card includes a semiconductor storage device 11 with an SiP structure having a memory chip 24 disposed on a wiring board 12, a controller chip 29 laminated on the memory chip 24 and a sealing resin layer. Electrode pads 301 of the controller chip 29 to be electrically connected to external connection terminals are arrayed in parallel with the array direction of the external connection terminals, and along the outer shape side of the controller chip 29 positioned at a first outer shape side S1 side of the wiring board 12 on which the external connection terminals are arrayed so as to be positioned in a terminal correspondence area X1 on a second face 12b of the wiring board 12.
    • 要解决的问题:提供一种用于缩短从外部连接端子到控制器芯片的布线长度的半导体存储卡。解决方案:半导体存储卡包括具有SiP结构的半导体存储装置11,其具有布置在布线上的存储芯片24 板12,层叠在存储芯片24上的控制芯片29和密封树脂层。 与外部连接端子电连接的控制器芯片29的电极焊盘301与外部连接端子的排列方向平行地排列,并且沿着位于第一外部形状侧S1侧的控制器芯片29的外形侧 布线基板12的外部连接端子排列在布线基板12的第二面12b上的端子对应区域X1内。