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1. 发明专利

JP2009253306A Charging/discharging circuit and binarizing circuit 审中-公开
标题翻译：充电/放电电路和二极管电路
公开(公告)号：JP2009253306A
公开(公告)日：2009-10-29
申请号：JP2008094599
申请日：2008-04-01
申请人： Toshiba Corp , Toshiba Information Systems (Japan) Corp , Toshiba Joho System Technology Kk , 東芝情報システムテクノロジー株式会社 , 東芝情報システム株式会社 , 株式会社東芝
发明人： HONMA SOICHI , SUZUKI TSUNEO , YAMAMOTO TATSUYA
IPC分类号： H03K5/08 , H03K5/1532 , H04L25/03 , H04L27/06
摘要： PROBLEM TO BE SOLVED: To provide a charging/discharging circuit and a binarizing circuit, capable of keeping the amplitude of an input signal compared to a binary threshold value constant even in demodulating an ASK (amplitude shift keying) signal using RSSI (received signal strength indicator). SOLUTION: An ASK signal demodulated by an RSSI detector 17 is inputted into a peak hold circuit 23, the peak hold circuit 23 detects a peak value of an input signal inputted into a charging/discharging section 24, a clip circuit 22 clips a level not higher than a given value, from the peak value of the input signal inputted into the charging/discharging section 24, and the charging/discharging section 24 rapidly charges and discharges a capacitor C2 using the signal clipped in the clip circuit 22, thereby generating a reference voltage Vref used as a threshold value of a comparator 27. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种充电/放电电路和二值化电路，即使在使用RSSI解调ASK（振幅移动键控）信号时，也能够将输入信号的幅度与二进制阈值相比恒定，接收信号强度指示）。解决方案：由RSSI检测器17解调的ASK信号被输入到峰值保持电路23中，峰值保持电路23检测输入到充电/放电部分24的输入信号的峰值，钳位电路22剪辑从输入到充电/放电部分24的输入信号的峰值以及充电/放电部分24中的电平不会高于给定值的电平，并且使用夹在电路22中的信号快速地对电容器C2进行充电和放电，从而产生用作比较器27的阈值的参考电压Vref。（C）2010，JPO＆INPIT

2. 发明专利

JP2004281491A Semiconductor device and manufacturing method thereof 审中-公开
公开(公告)号：JP2004281491A
公开(公告)日：2004-10-07
申请号：JP2003067607
申请日：2003-03-13
申请人： Toshiba Corp , 株式会社東芝
发明人： HONMA SOICHI
IPC分类号： H01L23/29 , H01L21/316 , H01L21/56 , H01L21/60 , H01L23/31 , H01L23/485
CPC分类号： H01L24/32 , H01L21/563 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/29 , H01L2224/0401 , H01L2224/05624 , H01L2224/05647 , H01L2224/1147 , H01L2224/13023 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2224/29111 , H01L2224/2919 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/83192 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01041 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01073 , H01L2924/01074 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/04953 , H01L2924/05042 , H01L2924/10253 , H01L2924/14 , H01L2924/15311 , H01L2924/1579 , H01L2924/181 , H01L2924/19043 , H01L2924/351 , H01L2924/00014 , H01L2224/13099 , H01L2924/00 , H01L2924/3512 , H01L2224/13111
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device in which a damage or separation never occurs on an interface below bump electrodes at the time of flip-chip bonding even if a low dielectric constant insulating film is used in a semiconductor chip, when the semiconductor chip is flip-chip-mounted on a wiring substrate, and to provide a manufacturing method thereof. SOLUTION: A semiconductor chip 1 and a wiring substrate 10 are heated to electrically connect the bump electrodes 9 of the semiconductor chip to the connection pads 11 of the wiring substrate, and a resin-sealing body 14 consisting of a resin having a flux function is formed to fill the gap between the semiconductor chip and the wiring substrate. As the resin, a resin is used in a state of changing from a liquid to a solid when the bump electrodes are in a melted state at the time of connecting the bump electrodes to the connection pads. In this way, even if there is a difference in thermal expansion coefficient between the semiconductor chip and the wiring substrate, since the resin suppresses the behavior of the bump electrodes, the separation of the bump electrodes due to the stress of a LowK film 12 used for the semiconductor chip can be remarkably reduced, and also the separation of the LowK film can be remarkably reduced. COPYRIGHT: (C)2005,JPO&NCIPI

3. 发明专利

JP2003077930A Semiconductor device and its manufacturing method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2003077930A
公开(公告)日：2003-03-14
申请号：JP2001268871
申请日：2001-09-05
申请人： Toshiba Corp , 株式会社東芝
发明人： HONMA SOICHI , SUGIYAMA TORU , MORITSUKA KOHEI
IPC分类号： H01L21/331 , H01L21/3205 , H01L21/60 , H01L23/52 , H01L29/737
CPC分类号： H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device where heat dissipating characteristics can be improved without the occurrence of element breakdown and bump electrodes can be easily microfabricated, and to provide its manufacturing method. SOLUTION: In the semiconductor device 1, an emitter electrode 31 is arranged on an emitter region 26 of a heterojunction bipolar transistor 20 of a compound semiconductor element 2, and an emitter main electrode terminal 42A is connected to the emitter electrode 31 through an opening 41A of an interlayer dielectric 40. A film thickness of the emitter main electrode terminal 42A is thick in comparison with that of the emitter electrode 31. The interlayer dielectric 40 includes at least an organic film, and the film thickness of the interlayer dielectric 40 is equivalent to that of the emitter main electrode terminal 42A. An Au stud bump electrode 43A is arranged on the emitter main electrode terminal 42A.
摘要翻译：要解决的问题：提供一种半导体器件，其中可以提高散热特性，而不会发生元件击穿，并且凸块电极可以容易地微制造，并提供其制造方法。解决方案：在半导体器件1中，发射极31配置在化合物半导体元件2的异质结双极晶体管20的发射极区域26上，发射极主电极端子42A通过开口41A与发射电极31连接发射极主电极端子42A的膜厚与发射电极31的膜厚相比较厚。层间电介质40至少包含有机膜，并且层间电介质40的膜厚等于与发射极主电极端子42A的距离。在发射极主电极端子42A上配置Au凸块电极43A。

4. 发明专利

JP2013135011A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2013135011A
公开(公告)日：2013-07-08
申请号：JP2011282692
申请日：2011-12-26
申请人： Toshiba Corp , 株式会社東芝
发明人： HONMA SOICHI
IPC分类号： H01L21/3205 , H01L21/768 , H01L21/822 , H01L23/522 , H01L27/04
CPC分类号： H01L2224/11
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device capable of suppressing lowering of the manufacturing yield and reliability of the semiconductor device due to, for example, peeling and removal of a chip ring.SOLUTION: A semiconductor device 1 includes: a semiconductor substrate 2 having an element region; a wiring layer 3 provided on the semiconductor substrate; and an electrode pad 5 electrically connected to the wiring layer 3. In the wiring layer 3, a chip ring 4 is provided so as to surround the element region. The chip ring 4 has a projection part 4b projecting from a surface of the wiring layer 3. In a region of the semiconductor substrate 2 closer to the inside than the chip ring 4, an insulating resin film 7, which covers the wiring layer 3 while exposing the electrode pad 5, is provided. The projection part 4b of the chip ring 4 is covered with a metal film 9.
摘要翻译：要解决的问题：提供一种能够抑制由于例如剥离和去除芯片环而导致的半导体器件的制造成品率和可靠性降低的半导体器件。解决方案：半导体器件1包括：半导体衬底2 具有元素区域; 设置在半导体基板上的布线层3; 以及与配线层3电连接的电极焊盘5.在布线层3中，设置有围绕元件区域的芯片环4。芯片环4具有从布线层3的表面突出的突出部4b。在半导体基板2的比芯片环4更靠近内侧的区域中，覆盖布线层3的绝缘树脂膜7同时露出电极焊盘5。芯片环4的突出部分4b被金属膜9覆盖。

5. 发明专利

JP2012069734A Manufacturing method of semiconductor device 审中-公开
标题翻译：半导体器件的制造方法
公开(公告)号：JP2012069734A
公开(公告)日：2012-04-05
申请号：JP2010213216
申请日：2010-09-24
申请人： Toshiba Corp , 株式会社東芝
发明人： HONMA SOICHI , KAMOTO TAKU , TAKANO YUSUKE , MIURA MASAYUKI
IPC分类号： H01L23/12 , H01L25/065 , H01L25/07 , H01L25/18
CPC分类号： H01L21/568 , H01L21/561 , H01L21/563 , H01L21/6835 , H01L23/3121 , H01L23/3128 , H01L23/49822 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/19 , H01L24/20 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/92 , H01L24/97 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L2221/68359 , H01L2221/68381 , H01L2224/0401 , H01L2224/04042 , H01L2224/04105 , H01L2224/05624 , H01L2224/12105 , H01L2224/13025 , H01L2224/131 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13169 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/16235 , H01L2224/16237 , H01L2224/21 , H01L2224/215 , H01L2224/2919 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/48464 , H01L2224/48484 , H01L2224/48624 , H01L2224/73204 , H01L2224/73259 , H01L2224/73265 , H01L2224/81005 , H01L2224/81011 , H01L2224/81013 , H01L2224/8121 , H01L2224/814 , H01L2224/81815 , H01L2224/8191 , H01L2224/83005 , H01L2224/831 , H01L2224/8385 , H01L2224/85385 , H01L2224/97 , H01L2225/06506 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06562 , H01L2225/06565 , H01L2924/0001 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/15311 , H01L2924/15321 , H01L2924/181 , H01L2924/19107 , H01L2924/00014 , H01L2224/83 , H01L2224/85 , H01L2224/19 , H01L2224/92247 , H01L2924/00 , H01L2924/3512 , H01L2924/00012 , H01L2224/13099
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device in which defects such as displacement of a wiring layer or cracking of a substrate are less likely to occur during formation of the wiring layer or detachment of a supporting substrate.SOLUTION: In the manufacturing method of a semiconductor device, a first resin layer 3 inhibiting transmission of light is formed on a supporting substrate 2, and a second resin layer 4 consisting of a thermoplastic resin is formed on the first resin layer. An insulation layer 5 and a wiring layer 8 are formed on the second resin layer, and a first semiconductor chip 10 is mounted on the wiring layer. The supporting substrate is detached by irradiating the first resin layer with laser light, and the second resin layer is removed.
摘要翻译：要解决的问题：提供一种半导体器件的制造方法，其中在形成布线层或支撑衬底的分离期间不太可能发生诸如布线层的位移或基板的开裂等缺陷。解决方案：在半导体器件的制造方法中，在支撑基板2上形成抑制光的透过的第一树脂层3，在第一树脂层上形成由热塑性树脂构成的第二树脂层4。绝缘层5和布线层8形成在第二树脂层上，第一半导体芯片10安装在布线层上。通过用激光照射第一树脂层来分离支撑基板，并且去除第二树脂层。版权所有（C）2012，JPO＆INPIT

6. 发明专利

JP2011054852A Method of manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2011054852A
公开(公告)日：2011-03-17
申请号：JP2009204082
申请日：2009-09-03
申请人： Toshiba Corp , 株式会社東芝
发明人： MIURA MASAYUKI , HONMA SOICHI , SHIMA SHINYA
IPC分类号： H01L23/32
CPC分类号： H01L23/3121 , H01L21/6835 , H01L2221/6835 , H01L2221/68381 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device, the method preventing the occurrence of interfacial delamination between a release layer and insulating layer of a lowermost interposing layer in (an assembly including) the manufacturing of an interposer and the mounting of a semiconductor chip.
SOLUTION: The release layer 2 composed of a thermoplastic resin is formed on a support substrate 1, and the insulating layer 3 composed of the thermoplastic resin containing solvent to solve the thermoplastic resin used for forming the release layer 2 is formed on the release layer 2.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种制造半导体器件的方法，该方法防止在（包括）制造插入件的组件（包括）的中间层的最下层的绝缘层的剥离层和绝缘层之间发生界面分层，半导体芯片的安装。解决方案：在支撑基板1上形成由热塑性树脂构成的剥离层2，并且在包含溶剂的热塑性树脂构成的绝缘层3上形成用于形成剥离层2的热塑性树脂释放层2.版权所有（C）2011，JPO＆INPIT

7. 发明专利

JP2010092931A Method and apparatus for manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法和装置
公开(公告)号：JP2010092931A
公开(公告)日：2010-04-22
申请号：JP2008258825
申请日：2008-10-03
申请人： Toshiba Corp , 株式会社東芝
发明人： MIZOGUCHI KEITA , HONMA SOICHI
IPC分类号： H01L25/065 , H01L25/07 , H01L25/18
CPC分类号： H01L21/67103 , H01L23/3128 , H01L25/0652 , H01L25/50 , H01L2224/48091 , H01L2924/09701 , H01L2924/10253 , H01L2924/181 , Y10T29/41 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a method and apparatus for manufacturing a semiconductor device which suppress the reduction of yielding in the semiconductor device. SOLUTION: The method for manufacturing the semiconductor device includes: a process for forming a support substrate 11 and a resin layer 13 on the support substrate 11, which is made of a thermoplastic resin, and forming an intermediate structure body 20 having a wiring substrate 21, a semiconductor chip, and a seal resin 27 on the resin layer; a process for fixing the support substrate to a lower fixing heating unit 33 and fixing the intermediate structure body to an upper fixing heating unit 43; a process for performing heating with the use of the lower and upper fixing heating units, so as to soften the resin layer; a process for moving the upper fixing heating unit, by keeping a horizontal state, with respect to the lower fixing heating unit, thereby making a segment, subsequently making another segment by changing directions, and having a plurality of segments where a distance between a center of the support substrate and a center of the intermediate structure body at the end point becomes larger than a distance at the start point; and a process for repeating the movement along the segments until the support substrate and the intermediate structure body are separated by the resin layer. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：解决的问题：提供抑制半导体器件的屈服减小的半导体器件的制造方法和装置。解决方案：半导体器件的制造方法包括：在由热塑性树脂制成的支撑基板11上形成支撑基板11和树脂层13的工序，形成中间结构体20，布线基板21，半导体芯片和树脂层上的密封树脂27; 将支撑基板固定到下定影加热单元33并将中间结构体固定到上定影加热单元43的工艺; 使用上下定影加热单元进行加热的方法，以使树脂层软化; 通过保持水平状态相对于下定影加热单元移动上定影加热单元的过程，从而形成段，随后通过改变方向制作另一段，并且具有多个段，其中中心并且在终点处的中间结构体的中心变得大于起始点处的距离; 以及用于重复沿着所述片段的移动的过程，直到所述支撑衬底和所述中间结构体被所述树脂层分离为止。版权所有（C）2010，JPO＆INPIT

8. 发明专利

JP2005340674A Semiconductor device and manufacturing method thereof 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2005340674A
公开(公告)日：2005-12-08
申请号：JP2004160322
申请日：2004-05-28
申请人： Toshiba Corp , 株式会社東芝
发明人： SAWADA KANAKO , HONMA SOICHI , IIJIMA TOSHITSUNE
IPC分类号： H01L21/60 , H01L21/44 , H05K3/34
CPC分类号： H01L24/81 , H01L23/49816 , H01L24/17 , H01L2224/05124 , H01L2224/05147 , H01L2224/05556 , H01L2224/05573 , H01L2224/05655 , H01L2224/05664 , H01L2224/05666 , H01L2224/13099 , H01L2224/13111 , H01L2224/16105 , H01L2224/17051 , H01L2224/171 , H01L2224/17179 , H01L2224/81801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01021 , H01L2924/01029 , H01L2924/01033 , H01L2924/01043 , H01L2924/0105 , H01L2924/01051 , H01L2924/01058 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/09701 , H01L2924/15787 , H01L2924/30105 , H01L2924/3511 , H05K3/3436 , H05K2201/094 , H05K2201/09427 , H05K2203/0465 , Y02P70/613 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To increase the manufacturing yield in the connection process for a semiconductor device by applying a flip chip connection structure capable of suppressing the crack or exfoliation etc. resulting from a low-κ film etc. SOLUTION: This semiconductor device 20 comprises a semiconductor chip 21 having a plurality of first electrode pads 25 and solder bumps 23, and a substrate 22 having a plurality of second electrode pads 28 which are connected to the first electrode pads 25 respectively via the solder bumps 23. When the cross-section through the center of the first electrode pad 25 and the solder bump 23 is seen, the solder bump group has solder bump 23A wherein the stress magnification coefficient K in the notch shape formed by the first electrode pad and the profile of the solder bump 23 on the chip center side is smaller than or equal to that on the chip edge side. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：通过应用能够抑制由低κ膜等引起的裂纹或剥离等的倒装芯片连接结构，来提高半导体器件的连接工艺中的制造成品率。解决方案：该半导体装置20包括具有多个第一电极焊盘25和焊料凸点23的半导体芯片21和具有多个第二电极焊盘28的基板22，该第二电极焊盘28分别经由焊料凸块23连接到第一电极焊盘25 当看到通过第一电极焊盘25和焊料凸块23的中心的横截面时，焊料凸块组具有焊料凸块23A，其中由第一电极焊盘和型材形成的切口形状中的应力放大系数K 芯片中心侧的焊料凸块23的长度小于或等于芯片边缘侧的焊料凸块23。版权所有（C）2006，JPO＆NCIPI

9. 发明专利

JP2005011838A Semiconductor device and its assembling method 审中-公开
标题翻译：半导体器件及其组装方法
公开(公告)号：JP2005011838A
公开(公告)日：2005-01-13
申请号：JP2003170905
申请日：2003-06-16
申请人： Toshiba Corp , 株式会社東芝
发明人： TOMONO AKIRA , HONMA SOICHI
IPC分类号： H01L21/56 , H01L21/60 , H01L23/31 , H01L23/485 , H01L23/498
CPC分类号： H01L24/12 , H01L21/563 , H01L23/3128 , H01L23/49811 , H01L24/11 , H01L24/16 , H01L24/29 , H01L24/81 , H01L24/83 , H01L2224/05001 , H01L2224/05022 , H01L2224/05026 , H01L2224/05027 , H01L2224/0508 , H01L2224/05572 , H01L2224/1147 , H01L2224/13099 , H01L2224/13111 , H01L2224/16225 , H01L2224/29109 , H01L2224/29111 , H01L2224/2919 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/81801 , H01L2224/83192 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01056 , H01L2924/01067 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/0133 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/1579 , H01L2924/19043 , H01L2924/30105 , H01L2924/351 , H01L2924/01014 , H01L2924/01083 , H01L2924/00 , H01L2924/00014 , H01L2224/13109 , H01L2924/3512 , H01L2924/00012 , H01L2224/05664 , H01L2224/05155 , H01L2224/05166
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device that can prevent the breakage of the surface of a semiconductor chip element, especially, the breakage of a low-dielectric constant insulating film disposed immediately above the solder used for connecting a semiconductor chip and a substrate to each other without generating voids in a sealing resin, by minimizing a thermal stress caused by the reflow soldering of the solder; and to provide a method of assembling the device.
SOLUTION: The semiconductor device is provided with a chip mounting substrate 1 having a first and a second principal surfaces facing each other, a plurality of substrate-side internal electrode pads 2 disposed on the second principal surface, first solder balls 3 connected to the electrode pads 2. The device is also provided with second solder balls 4 connected to the first solder balls 3 and having high melting points, the semiconductor chip 6 connected to the second solder balls 4, and the sealing resin 7 encapsulated in the peripheries of the first and the second solder balls 3 and 4.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种能够防止半导体芯片元件的表面破损的半导体器件，特别是设置在用于连接半导体芯片的焊料正上方的低介电常数绝缘膜的断裂并且通过使由焊料的回流焊接引起的热应力最小化，在密封树脂中不产生空隙而彼此相对的基板; 并提供组装该装置的方法。解决方案：半导体器件设置有具有彼此面对的第一和第二主表面的芯片安装基板1，设置在第二主表面上的多个基板侧内部电极焊盘2，第一焊球3连接该装置还设置有连接到第一焊球3并具有高熔点的第二焊球4，连接到第二焊球4的半导体芯片6和封装在周边中的密封树脂7 的第一和第二焊球3和4.版权所有（C）2005，JPO＆NCIPI

10. 发明专利

JP2014179429A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2014179429A
公开(公告)日：2014-09-25
申请号：JP2013051947
申请日：2013-03-14
申请人： Toshiba Corp , 株式会社東芝
发明人： HONMA SOICHI , MATSUURA EIGO , SHIMA SHINYA , MUKODA HIDEKO , AOKI HIDEO
IPC分类号： H01L23/12
CPC分类号： H01L24/96 , H01L21/568 , H01L24/97 , H01L2224/04105 , H01L2224/12105 , H01L2924/3511
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which does not cause breaking even in TCT (Temperature Cycle Test) to ensure high reliability.SOLUTION: A semiconductor device comprises: a semiconductor chip 1; a first resin 2 for burying the semiconductor chip 1 so as to expose a surface of the semiconductor chip 1; a second resin 3 formed on a surface of the first resin 2, which lies in the same plane with the surface of the semiconductor chip 1; a re-wiring layer 4 which is formed on the second resin 3 and electrically connected to the semiconductor chip 1; an external connection terminal 5 formed on a wiring layer 4; and a metal plate 6 formed on an opposite side surface of the first resin 2, which is opposite to the surface where the semiconductor chip 1 is buried, in which the first resin 2 has an elastic modulus of 0.5-5 GPa.
摘要翻译：要解决的问题：提供即使在TCT（温度循环测试）中也不会引起断裂的半导体器件，以确保高可靠性。解决方案：半导体器件包括：半导体芯片1; 用于掩埋半导体芯片1以露出半导体芯片1的表面的第一树脂2; 形成在与半导体芯片1的表面位于同一平面上的第一树脂2的表面上的第二树脂3; 形成在第二树脂3上并与半导体芯片1电连接的再布线层4; 形成在布线层4上的外部连接端子5; 以及金属板6，其形成在第一树脂2的相对于半导体芯片1埋入的表面的相对侧表面上，其中第一树脂2具有0.5-5GPa的弹性模量。

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