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1. 发明授权

US4636824A Voltage-controlled type semiconductor switching device 失效
标题翻译：电压控制型半导体开关器件
公开(公告)号：US4636824A
公开(公告)日：1987-01-13
申请号：US850065
申请日：1986-04-07
申请人： Toshiaki Ikoma , Hajime Maeda , Hisayoshi Yanai , Ryo Dang , Naoyuki Shigyo
发明人： Toshiaki Ikoma , Hajime Maeda , Hisayoshi Yanai , Ryo Dang , Naoyuki Shigyo
IPC分类号： H01L29/74 , H01L29/78
CPC分类号： H01L29/78 , H01L29/74
摘要： A voltage-control type semiconductor switching device is disclosed which includes a pair of controlled electrodes to which a control voltage signal is supplied, and a semiconductive layer formed between the electrodes so as electrically insulative from the electrodes through insulative layers. The semiconductive layer has a channel region and a carrier-storage region which is substantially nonconductive. The channel region is formed laterally along the longitudinal direction of the electrodes, thereby allowing majority carriers such as electrons of the semiconductive layer to flow in the lateral direction. In the current cut-off mode, the carrier-storage region temporarily stores the carriers which move in the direction of thickness of the semiconductive layer due to the electric field created by the voltage. In the current conduction mode, the carrier-storage region releases the carriers stored therein toward the channel region.
摘要翻译：公开了一种电压控制型半导体开关器件，其包括一对受控电极，控制电压信号被提供给该电压控制电极，以及形成在电极之间的半导体层，以便通过绝缘层与电极电绝缘。半导体层具有基本不导电的沟道区和载流子存储区。通道区域沿着电极的纵向横向地形成，从而允许多数载流子例如半导体层的电子沿横向流动。在当前截止模式中，载流子存储区域暂时存储由于由电压产生的电场而在半导体层的厚度方向上移动的载流子。在电流导通模式中，载流子存储区域释放其中存储的载流子朝向沟道区域。

2. 发明授权

US4651411A Method of manufacturing a MOS device wherein an insulating film is deposited in a field region 失效
标题翻译：在场区域中淀积绝缘膜的MOS器件的制造方法
公开(公告)号：US4651411A
公开(公告)日：1987-03-24
申请号：US744899
申请日：1985-06-17
申请人： Masami Konaka , Naoyuki Shigyo , Ryo Dang
发明人： Masami Konaka , Naoyuki Shigyo , Ryo Dang
IPC分类号： H01L29/78 , H01L21/76 , H01L21/762
CPC分类号： H01L21/76216 , Y10S148/05
摘要： A method of manufacturing a MOS device wherein a semiconductor substrate is selectively etched to form a groove in a field region and an element formation region surrounded by the groove such that an angle .theta. is formed between a wall of the groove and a first imaginary extension of a top surface of the element formation region, the angle .theta. satisfying the relation, 70.degree..ltoreq..theta..ltoreq.90.degree.. Then, a field insulating film is deposited in the groove, and a MOS transistor is formed in the element formation region. The element formation region has source, drain and channel regions of a field effect transistor therein and a gate electrode formed on a gate insulating film on the channel region. The gate electrode extends onto the surface portion of the field insulating film. The thickness of an upper portion of the field insulating film above a first imaginary extension of an interface between the gate insulating film and the gate electrode is formed smaller than that of a lower portion of the field insulating film below the first imaginary extension.
摘要翻译：一种制造MOS器件的方法，其中选择性地蚀刻半导体衬底以在场区域中形成沟槽，并且所述元件形成区域被所述沟槽包围，使得在所述沟槽的壁和所述沟槽的第一假想延伸部之间形成角度θ 元件形成区域的顶面，角度θ满足关系，70°θ= 90°。然后，在沟槽中沉积场绝缘膜，并且在元件形成区域中形成MOS晶体管。元件形成区域具有其中的场效应晶体管的源极，漏极和沟道区，以及形成在沟道区上的栅极绝缘膜上的栅电极。栅电极延伸到场绝缘膜的表面部分上。栅极绝缘膜和栅电极之间的界面的第一假想延伸部上方的场绝缘膜的上部的厚度形成为比第一假想延伸部以下的场绝缘膜的下部的厚度小。

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