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1. 发明申请

US20080067546A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20080067546A1
公开(公告)日：2008-03-20
申请号：US11898958
申请日：2007-09-18
申请人： Tomohiro MURATA , Hiroaki UENO , Hidetoshi ISHIDA , Tetsuzo UEDA , Yasuhiro UEMOTO , Tsuyoshi TANAKA , Daisuke UEDA
发明人： Tomohiro MURATA , Hiroaki UENO , Hidetoshi ISHIDA , Tetsuzo UEDA , Yasuhiro UEMOTO , Tsuyoshi TANAKA , Daisuke UEDA
IPC分类号： H01L29/20
CPC分类号： H01L29/7787 , H01L23/367 , H01L23/3677 , H01L29/2003 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes: a semiconductor layer; at least one electrode formed on a semiconductor layer to be in contact with the semiconductor layer; and a passivation film covering the semiconductor layer and at least part of the top surface of the electrode to protect the semiconductor layer and formed of a plurality of sub-films. The passivation film includes a first sub-film made of aluminum nitride.
摘要翻译：半导体器件包括：半导体层; 形成在与半导体层接触的半导体层上的至少一个电极; 以及覆盖半导体层和电极的顶表面的至少一部分的钝化膜，以保护半导体层并由多个子膜形成。钝化膜包括由氮化铝制成的第一子膜。

2. 发明申请

US20110114967A1 NITRIDE SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：氮化物半导体器件及其制造方法
公开(公告)号：US20110114967A1
公开(公告)日：2011-05-19
申请号：US13010238
申请日：2011-01-20
申请人： Masahiro HIKITA , Tetsuzo UEDA , Manabu YANAGIHARA , Yasuhiro UEMOTO , Tsuyoshi TANAKA
发明人： Masahiro HIKITA , Tetsuzo UEDA , Manabu YANAGIHARA , Yasuhiro UEMOTO , Tsuyoshi TANAKA
IPC分类号： H01L29/205 , H01L29/78
CPC分类号： H01L29/7786 , H01L29/1066 , H01L29/2003 , H01L29/4175 , H01L29/432 , H01L29/66462
摘要： A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer formed over the substrate; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a larger band gap energy than the first nitride semiconductor layer; a third nitride semiconductor layer formed on the second nitride semiconductor layer and including a p-type nitride semiconductor with at least a single-layer structure; a gate electrode formed on the third nitride semiconductor layer; and a source electrode and a drain electrode formed in regions located on both sides of the gate electrode, respectively. The third nitride semiconductor layer has a thickness greater in a portion below the gate electrode than in a portion below the side of the gate electrode.
摘要翻译：氮化物半导体器件包括：衬底; 形成在所述基板上的第一氮化物半导体层; 形成在所述第一氮化物半导体层上并且具有比所述第一氮化物半导体层更大的带隙能量的第二氮化物半导体层; 形成在所述第二氮化物半导体层上并且包括具有至少单层结构的p型氮化物半导体的第三氮化物半导体层; 形成在所述第三氮化物半导体层上的栅电极; 以及分别形成在位于栅电极两侧的区域中的源电极和漏电极。所述第三氮化物半导体层的厚度比所述栅极电极侧的部分的厚度大。

3. 发明申请

US20080149965A1 TRANSISTOR AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：晶体管及其制造方法
公开(公告)号：US20080149965A1
公开(公告)日：2008-06-26
申请号：US11939899
申请日：2007-11-14
申请人： Kazuhiro KAIBARA , Masahiro HIKITA , Tetsuzo UEDA , Yasuhiro UEMOTO , Tsuyoshi TANAKA
发明人： Kazuhiro KAIBARA , Masahiro HIKITA , Tetsuzo UEDA , Yasuhiro UEMOTO , Tsuyoshi TANAKA
IPC分类号： H01L29/80 , H01L21/335
CPC分类号： H01L29/7787 , H01L29/1066 , H01L29/2003 , H01L29/41766 , H01L29/432
摘要： A transistor includes: a first semiconductor layer and a second semiconductor layer with a first region and a second region, which are sequentially formed above a substrate; a first p-type semiconductor layer formed on a region of the second semiconductor layer other than the first and second regions; and a second p-type semiconductor layer formed on the first p-type semiconductor layer. The first p-type semiconductor layer is separated from a drain electrode by interposing therebetween a first groove having a bottom composed of the first region, and from a source electrode by interposing therebetween a second groove having a bottom composed of the second region.
摘要翻译：晶体管包括：第一半导体层和具有第一区域和第二区域的第二半导体层，其顺序地形成在衬底上; 形成在除了第一和第二区域之外的第二半导体层的区域上的第一p型半导体层; 以及形成在第一p型半导体层上的第二p型半导体层。第一p型半导体层与漏电极分离，其间具有由第一区域构成的底部的第一沟槽和源极电极之间插入具有由第二区域构成的底部的第二沟槽。

4. 发明申请

US20070278521A1 TRANSISTOR 有权
标题翻译：晶体管
公开(公告)号：US20070278521A1
公开(公告)日：2007-12-06
申请号：US11758304
申请日：2007-06-05
申请人： Hidetoshi ISHIDA , Tsuyoshi TANAKA , Daisuke UEDA
发明人： Hidetoshi ISHIDA , Tsuyoshi TANAKA , Daisuke UEDA
IPC分类号： H01L31/00
CPC分类号： H01L29/7787 , H01L29/045 , H01L29/0891 , H01L29/1066 , H01L29/2003 , H01L29/432 , H01L29/452
摘要： There is provided a normally-off type transistor made of a nitride semiconductor. The transistor includes: an undoped GaN layer which forms a channel region; an undoped Al0.2Ga0.8N layer which is formed on the undoped GaN layer and has a band gap larger than that of the undoped GaN layer; a p-type Al0.2Ga0.8N control layer which is formed on the undoped Al0.2Ga0.8N layer, has a p-type conductivity and forms a control region; an Ni gate electrode which contacts with the p-type Al0.2Ga0.8N control layer; a Ti/Al source electrode and a Ti/Al drain electrode which are formed beside the p-type Al0.2Ga0.8N control layer; and an Ni ohmic electrode which is connected to the undoped GaN layer and serves as a hole absorbing electrode. With this transistor, it is possible to achieve a large-current operation and a high switching speed.
摘要翻译：提供了由氮化物半导体制成的常关型晶体管。晶体管包括：形成沟道区的未掺杂的GaN层; 形成在未掺杂的GaN层上并且具有比未掺杂的GaN层的带隙大的带隙的未掺杂的Al 2 O 3 Ga 0.8 N N层; 在未掺杂的Al 0.2 Ga 0.8 N上形成的p型Al 0.2 N 0.2 Ga N N N N控制层层，具有p型导电性并形成控制区; 与p型Al 0.2 Ga 0.8 N控制层接触的Ni栅电极; 在p型Al 0.2 Ga 0.8 N控制层旁边形成的Ti / Al源电极和Ti / Al漏电极; 以及连接到未掺杂的GaN层并用作空穴吸收电极的Ni欧姆电极。利用该晶体管，可以实现大电流动作和高切换速度。

5. 发明申请

US20080179694A1 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080179694A1
公开(公告)日：2008-07-31
申请号：US12023461
申请日：2008-01-31
申请人： Kazushi NAKAZAWA , Satoshi NAKAZAWA , Tetsuzo UEDA , Tsuyoshi TANAKA , Masahiro HIKITA
发明人： Kazushi NAKAZAWA , Satoshi NAKAZAWA , Tetsuzo UEDA , Tsuyoshi TANAKA , Masahiro HIKITA
IPC分类号： H01L29/00 , H01L21/336
CPC分类号： H01L29/7787 , H01L29/1029 , H01L29/1066 , H01L29/2003 , H01L29/41766 , H01L29/42316 , H01L29/4236 , H01L29/66462
摘要： In FET, a second nitride semiconductor layer is provided on a first nitride semiconductor layer, and a source electrode and a drain electrode are each provided to have at least a portion thereof in contact with the second nitride semiconductor layer. A concave portion is formed in the upper surface of the second nitride semiconductor layer to be located between the source electrode and the drain electrode. A gate electrode is provided over the concave portion to cover the opening of the concave portion.
摘要翻译：在FET中，第二氮化物半导体层设置在第一氮化物半导体层上，并且源电极和漏电极分别设置成使其至少一部分与第二氮化物半导体层接触。在第二氮化物半导体层的上表面上形成凹部，位于源电极和漏电极之间。在所述凹部上设置有栅电极以覆盖所述凹部的开口。

6. 发明申请

US20110024797A1 NITRIDE-BASED SEMICONDUCTOR DEVICE WITH CONCAVE GATE REGION 审中-公开
标题翻译：基于氮化物的半导体器件，带有栅极区域
公开(公告)号：US20110024797A1
公开(公告)日：2011-02-03
申请号：US12903505
申请日：2010-10-13
申请人： Kazushi NAKAZAWA , Satoshi NAKAZAWA , Tetsuzo UEDA , Tsuyoshi TANAKA , Masahiro HIKITA
发明人： Kazushi NAKAZAWA , Satoshi NAKAZAWA , Tetsuzo UEDA , Tsuyoshi TANAKA , Masahiro HIKITA
IPC分类号： H01L29/778 , H01L29/772
CPC分类号： H01L29/7787 , H01L29/1029 , H01L29/1066 , H01L29/2003 , H01L29/41766 , H01L29/42316 , H01L29/4236 , H01L29/66462
摘要： In FET, a second nitride semiconductor layer is provided on a first nitride semiconductor layer, and a source electrode and a drain electrode are each provided to have at least a portion thereof in contact with the second nitride semiconductor layer. A concave portion is formed in the upper surface of the second nitride semiconductor layer to be located between the source electrode and the drain electrode. A gate electrode is provided over the concave portion to cover the opening of the concave portion.
摘要翻译：在FET中，第二氮化物半导体层设置在第一氮化物半导体层上，并且源电极和漏电极分别设置成使其至少一部分与第二氮化物半导体层接触。在第二氮化物半导体层的上表面上形成凹部，位于源电极和漏电极之间。在所述凹部上设置有栅电极以覆盖所述凹部的开口。

7. 发明申请

US20090313427A1 COMPUTER SYSTEM FOR REDUCING POWER CONSUMPTION OF STORAGE SYSTEM AND METHOD FOR CONTROLLING THE SAME 有权
标题翻译：用于降低存储系统功耗的计算机系统及其控制方法
公开(公告)号：US20090313427A1
公开(公告)日：2009-12-17
申请号：US12203372
申请日：2008-09-03
申请人： Toshiyuki UKAI , Tsuyoshi TANAKA
发明人： Toshiyuki UKAI , Tsuyoshi TANAKA
IPC分类号： G06F12/00 , G06F12/02 , G06F12/16
CPC分类号： G06F3/0631 , G06F1/3221 , G06F1/3268 , G06F3/0613 , G06F3/0625 , G06F3/0689 , G06F11/2082 , Y02D10/154
摘要： To optimize performance and power consumption of a storage system having many disk drives, the storage system contains a plurality of volumes. A first number of the volumes belong to a first volume set. The first number of the remaining volumes belong to a second volume set. The volumes that belong to the first volume set are allocated dispersedly to a second number of disk drives. The volumes that belong to the second volume set are allocated dispersedly to a third number of disk drives, the third number being larger than the second number. A computer selects one of the first volume set and the second volume set based on a predetermined condition to store data dispersedly in the volumes belonging to the selected volume set. The computer stops spinning of disks in the disk drives to which none of the volumes belonging to the selected volume set are allocated.
摘要翻译：为了优化具有许多磁盘驱动器的存储系统的性能和功耗，存储系统包含多个卷。卷的第一个数量属于第一个卷集。剩余卷的第一个数量属于第二卷集。属于第一个卷集的卷分散分配到第二个数量的磁盘驱动器。属于第二卷集的卷分散分配到第三个磁盘驱动器，第三个数字大于第二个数。计算机基于预定条件选择第一卷集和第二卷集中的一个，以分散地存储属于所选卷集的卷中的数据。计算机停止旋转属于所选卷集的任何卷的磁盘驱动器中的磁盘。

8. 发明申请

US20080071939A1 SYSTEM AND METHOD FOR PERFORMANCE MONITORING AND RECONFIGURING COMPUTER SYSTEM WITH HARDWARE MONITOR 失效
标题翻译：具有硬件监视器的性能监控和重新配置计算机系统的系统和方法
公开(公告)号：US20080071939A1
公开(公告)日：2008-03-20
申请号：US11771397
申请日：2007-06-29
申请人： Tsuyoshi TANAKA , Yoshiki Murakami
发明人： Tsuyoshi TANAKA , Yoshiki Murakami
IPC分类号： G06F3/00
CPC分类号： G06F11/3419 , G06F11/3466 , G06F2201/87 , G06F2201/88
摘要： A judgment is made quickly about whether or not it is a memory or a chipset that is causing a performance bottleneck in an application program. A computer system of this invention includes at least one CPU, a controller that connects the CPU to a memory and to an I/O interface, in which the controller includes a response time measuring unit, which receives a request to access the memory and measures a response time taken to respond to the memory access request, a frequency counting unit, which measures an issue count of the memory access request, a measurement result storing unit, which stores a measurement result associating the response time with the corresponding issue count, and a measurement result control unit which outputs the measurement result stored in the measurement result storing unit when receiving a measurement result read request.
摘要翻译：快速判断是否是在应用程序中导致性能瓶颈的存储器或芯片组。本发明的计算机系统包括至少一个CPU，将CPU连接到存储器和I / O接口的控制器，其中控制器包括响应时间测量单元，其接收访问存储器的请求并测量对存储器访问请求进行响应的响应时间;测量存储器访问请求的发行次数的频率计数单元;存储将响应时间与相应发行次数相关联的测量结果的测量结果存储单元;以及测量结果控制单元，当接收到测量结果读取请求时，输出存储在测量结果存储单元中的测量结果。

9. 发明申请

US20120313090A1 PHENYL-SUBSTITUTED 1,3,5-TRIAZINE COMPOUND, PROCESS FOR PRODUCING THE SAME, AND ORGANIC ELECTROLUMINESCENT DEVICE CONTAINING THE SAME AS COMPONENT 有权
标题翻译：苯基取代的1,3,5-三嗪化合物，其制备方法和含有该组合物的有机电致发光器件
公开(公告)号：US20120313090A1
公开(公告)日：2012-12-13
申请号：US13590837
申请日：2012-08-21
申请人： Tetsu YAMAKAWA , Hidenori AIHARA , Naoko YANAI , Tsuyoshi TANAKA , Yoko HONMA , Masaru SATO
发明人： Tetsu YAMAKAWA , Hidenori AIHARA , Naoko YANAI , Tsuyoshi TANAKA , Yoko HONMA , Masaru SATO
IPC分类号： H01L51/54
CPC分类号： H01L51/0067 , C07D251/24 , C07D401/10 , C07D401/14 , H01L51/5048 , H05B33/22
摘要： A phenyl-substituted 1,3,5-triazine compound represented by the general formula (1): wherein Ar1 and Ar2 independently represent substituted or unsubstituted phenyl, naphthyl or biphenylyl group; R1, R2 and R3 independently represent hydrogen atom or methyl group; X1 and X2 independently represent substituted or unsubstituted phenylene, naphthylene or pyridylene group; p and q independently represent an integer of 0 to 2; and Ar3 and Ar4 independently represent substituted or unsubstituted pyridyl or phenyl group. This compound is suitable for an organic electroluminescent device.
摘要翻译：由通式（1）表示的苯基取代的1,3,5-三嗪化合物：其中Ar1和Ar2独立地表示取代或未取代的苯基，萘基或联苯基; R1，R2和R3独立地表示氢原子或甲基; X 1和X 2独立地表示取代或未取代的亚苯基，亚萘基或亚吡啶基; p和q独立地表示0〜2的整数。 Ar 3和Ar 4独立地表示取代或未取代的吡啶基或苯基。该化合物适用于有机电致发光器件。

10. 发明申请

US20110191357A1 MAP DATA, STORAGE MEDIUM AND NAVIGATION APPARATUS 审中-公开
标题翻译：地图数据，存储介质和导航设备
公开(公告)号：US20110191357A1
公开(公告)日：2011-08-04
申请号：US13014175
申请日：2011-01-26
申请人： Tsuyoshi TANAKA , Takayuki Matsunaga
发明人： Tsuyoshi TANAKA , Takayuki Matsunaga
IPC分类号： G06F17/30
CPC分类号： G09B29/106 , G01C21/32
摘要： Map data is disclosed. The map data includes a multilink information list, a road name information list and an offset information list. The multilink information list has fixed-length multilink information elements each indicting a number of links contained in a corresponding multilink. The road name information list has road name information elements each indicating a road name of corresponding multilink information element. The road name information elements are arranged in the road name information list in an order in which the corresponding multilink information elements are arranged in the multilink information list. The offset information list has fixed-length offset information elements each indicating location of a corresponding road name information element in the road name information list. The offset information elements are arranged in the offset information list in an order in which the corresponding multilink information elements are arranged in the multilink information list.
摘要翻译：公开了地图数据。地图数据包括多链路信息列表，道路名称信息列表和偏移信息列表。多链路信息列表具有固定长度的多链路信息单元，每个单元指示包含在相应多链路中的链路数量。道路名称信息列表具有道路名称信息元素，每个道路名称信息元素指示相应多链路信息元素的道路名称。将道路名称信息单元按照多重链路信息单元中排列的顺序排列在道路名称信息列表中。偏移信息列表具有各自指示道路名称信息列表中的相应道路名称信息元素的位置的固定长度偏移信息元素。偏移信息元素按照多重链接信息元素排列在多链路信息列表中的顺序排列在偏移信息列表中。

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