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    • 6. 发明授权
    • Spin MOSFET and reconfigurable logic circuit using the spin MOSFET
    • 使用自旋MOSFET的Spin MOSFET和可重构逻辑电路
    • US08487359B2
    • 2013-07-16
    • US12486999
    • 2009-06-18
    • Yoshiaki SaitoHideyuki SugiyamaTomoaki InokuchiMizue IshikawaTakao Marukame
    • Yoshiaki SaitoHideyuki SugiyamaTomoaki InokuchiMizue IshikawaTakao Marukame
    • H01L27/108
    • H01L29/66984B82Y25/00H01F10/3272H01F10/3286
    • It is made possible to provide a spin MOSFET that can minimize the increase in production costs and can perform both spin injection writing and reading. A spin MOSFET includes: a substrate that has a semiconductor region of a first conductivity type; first and second ferromagnetic stacked films that are formed at a distance from each other on the semiconductor region, and each have the same stacked structure comprising a first ferromagnetic layer, a nonmagnetic layer, and a second ferromagnetic layer stacked in this order, the second ferromagnetic stacked film having a film-plane area different from that of the first ferromagnetic stacked film; a gate insulating film that is formed on a portion of the semiconductor region, the portion being located between the first ferromagnetic stacked film and the second ferromagnetic stacked film; and a gate that is formed on the gate insulating film.
    • 可以提供一种可以使生产成本增加最小化的自旋MOSFET,并且可以执行自动注入写入和读取两种操作。 自旋MOSFET包括:具有第一导电类型的半导体区域的衬底; 第一和第二铁磁层叠膜,其形成在半导体区域上彼此间隔一定距离处,并且各自具有包括依次层叠的第一铁磁层,非磁性层和第二铁磁层的相同层叠结构,第二铁磁体 具有与第一铁磁性层叠膜不同的膜面积的层叠膜; 形成在所述半导体区域的一部分上的所述栅绝缘膜,所述栅极绝缘膜位于所述第一铁磁层叠膜和所述第二铁磁性堆叠膜之间; 以及形成在栅极绝缘膜上的栅极。
    • 8. 发明授权
    • Nonvolatile memory circuit using spin MOS transistors
    • 使用自旋MOS晶体管的非易失性存储电路
    • US08154916B2
    • 2012-04-10
    • US12889881
    • 2010-09-24
    • Hideyuki SugiyamaTetsufumi TanamotoTakao MarukameMizue IshikawaTomoaki InokuchiYoshiaki Saito
    • Hideyuki SugiyamaTetsufumi TanamotoTakao MarukameMizue IshikawaTomoaki InokuchiYoshiaki Saito
    • G11C11/14
    • G11C14/0081
    • Certain embodiments provide a nonvolatile memory circuit in which a first p-channel MOS transistor and a first n-channel spin MOS transistor are connected in series, a second p-channel MOS transistor and a second n-channel spin MOS transistor are connected in series, gates of the first p-channel MOS transistor and the first n-channel spin MOS transistor are connected, gates of the second p-channel MOS transistor and the second n-channel spin MOS transistor are connected, a first n-channel transistor includes a drain connected to a drain of the first p-channel transistor and the gate of the second p-channel transistor, a second n-channel transistor includes a drain connected to a drain of the second p-channel transistor and the gate of the first p-channel transistor, and gates of the first and second n-channel transistors are connected.
    • 某些实施例提供了其中第一p沟道MOS晶体管和第一n沟道自旋MOS晶体管串联连接的非易失性存储器电路,第二p沟道MOS晶体管和第二n沟道自旋MOS晶体管串联连接 第一p沟道MOS晶体管和第一n沟道自旋MOS晶体管的栅极连接,第二p沟道MOS晶体管和第二n沟道自旋MOS晶体管的栅极连接,第一n沟道晶体管包括 连接到第一p沟道晶体管的漏极和第二p沟道晶体管的栅极的漏极,第二n沟道晶体管包括连接到第二p沟道晶体管的漏极和第一p沟道晶体管的栅极的漏极 p沟道晶体管,第一和第二n沟道晶体管的栅极连接。
    • 9. 发明申请
    • LOOK-UP TABLE CIRCUITS AND FIELD PROGRAMMABLE GATE ARRAY
    • 查看表电路和现场可编程门阵列
    • US20120074984A1
    • 2012-03-29
    • US13238020
    • 2011-09-21
    • Hideyuki SUGIYAMATetsufumi TanamotoTakao MarukameMizue IshikawaTomoaki InokuchiYoshiaki Saito
    • Hideyuki SUGIYAMATetsufumi TanamotoTakao MarukameMizue IshikawaTomoaki InokuchiYoshiaki Saito
    • H03K19/177H03K5/00
    • H03K19/177
    • A look-up table circuit according to an embodiment includes: a variable resistance circuit including variable resistance devices and selecting a variable resistance device from the variable resistance devices based on an input signal; a reference circuit having a resistance value between the largest resistance value and the smallest resistance value of the variable resistance circuit; a first n-channel MOSFET including a source connected to a terminal of the variable resistance circuit and a gate connected to a drain; a second n-channel MOSFET including a source connected to a terminal of the reference circuit and a gate connected to the gate of the first n-channel MOSFET; a first current supply circuit to supply a current to the variable resistance circuit; a second current supply circuit to supply a current to the reference circuit; and a comparator comparing voltages at a first input terminal and a second input terminal.
    • 根据实施例的查找表电路包括:可变电阻电路,包括可变电阻器件,并且基于输入信号从可变电阻器件中选择可变电阻器件; 参考电路,其具有可变电阻电路的最大电阻值和最小电阻值之间的电阻值; 第一n沟道MOSFET,其包括连接到可变电阻电路的端子的源极和连接到漏极的栅极; 第二n沟道MOSFET,其包括连接到参考电路的端子的源极和连接到第一n沟道MOSFET的栅极的栅极; 用于向可变电阻电路提供电流的第一电流供应电路; 第二电流供应电路,用于向参考电路提供电流; 以及比较器,用于比较第一输入端和第二输入端的电压。