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1. 发明授权

US06246115B1 Semiconductor package having a heat sink with an exposed surface 有权
标题翻译：具有具有暴露表面的散热器的半导体封装
公开(公告)号：US06246115B1
公开(公告)日：2001-06-12
申请号：US09425145
申请日：1999-10-21
申请人： Tom Tang , Chien Ping Huang , Kevin Chiang , Jeng-Yuan Lai , Candy Tien , Vicky Liu
发明人： Tom Tang , Chien Ping Huang , Kevin Chiang , Jeng-Yuan Lai , Candy Tien , Vicky Liu
IPC分类号： H01L2310
CPC分类号： H01L21/565 , H01L23/3128 , H01L23/4334 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： An integrated circuit package with a fully-exposed heat sink is provided. The integrated circuit package includes a substrate having a first side being formed with first conductive traces and a second side being formed with second conductive traces. At least one chip is mounted on the substrate and electrically connected to the first conductive traces. A plurality of solder balls are provided at the terminal ends of the second conductive traces to allow external connection of the chip. The fully-exposed heat sink is mounted on the substrate. The heat sink is formed with a plurality of supportive legs arranged in such a manner as to allow a bottom surface of the heat sink to be separated from the chip and a top surface of the heat sink to be tightly attached to a cavity in a mold used to form an encapsulant for enclosing the chip. A plurality of positioning tongues are formed on the heat sink for securing the heat sink in position when performing a molding process for forming the encapsulant. With this integrated circuit package, no jig is required in the assembly of the integrated circuit package. Moreover, since there is no need to use adhesives to adhere the supportive legs onto the substrate, the integrated circuit package would not suffer from delamination as in the case of the prior art. The fully-exposed heat sink allows an increased heat-dissipating efficient as compared to the prior art.
摘要翻译：提供了一个具有完全暴露的散热器的集成电路封装。集成电路封装包括具有形成有第一导电迹线的第一侧的基板，和形成有第二导电迹线的第二侧。至少一个芯片安装在基板上并电连接到第一导电迹线。多个焊球设置在第二导电迹线的末端，以允许芯片的外部连接。完全曝光的散热器安装在基板上。散热器形成有多个支撑腿，其布置成允许散热器的底表面与芯片分离，并且散热器的顶表面紧密地附接到模具中的空腔中用于形成封装芯片的密封剂。多个定位舌片形成在散热器上，用于在执行用于形成密封剂的成型工艺时将散热器固定就位。使用该集成电路封装，集成电路封装的组装中不需要夹具。此外，由于不需要使用粘合剂将支撑腿粘附到基板上，所以与现有技术的情况相同，集成电路封装不会遭受分层。与现有技术相比，完全暴露的散热器允许增加散热效率。

2. 发明授权

US06552428B1 Semiconductor package having an exposed heat spreader 失效
标题翻译：具有暴露的散热器的半导体封装
公开(公告)号：US06552428B1
公开(公告)日：2003-04-22
申请号：US09416314
申请日：1999-10-12
申请人： Chien Ping Huang , Tom Tang , Kevin Chiang , Jenq-Yuan Lai , Candy Tien , Vicky Liu
发明人： Chien Ping Huang , Tom Tang , Kevin Chiang , Jenq-Yuan Lai , Candy Tien , Vicky Liu
IPC分类号： H01L2310
CPC分类号： H01L21/565 , H01L23/4334 , H01L24/45 , H01L24/48 , H01L2224/45144 , H01L2224/48227 , H01L2924/00014 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/16152 , H01L2924/181 , H01L2224/05599 , H01L2924/00 , H01L2924/00012
摘要： A semiconductor package with an exposed heat spreader includes a substrate having a semiconductor chip adhered to a first surface of the substrate. The heat spreader includes an upper portion, a lower portion with an opening formed in the center for receiving the semiconductor chip, and a connecting portion for connecting the upper portion and the lower portion in a manner that the upper portion is raised to a height above the opening of the lower portion. The lower portion is formed with a plurality of positioning members outwardly extending from edges of the lower portion to prevent the heat spreader from being dislocated during a molding process, and further includes downward flutes formed on the periphery of the opening for enabling resin flow underneath the heat spreader. The upper portion of the heat spreader is exposed to an exterior of the semiconductor package to improve heat dissipation.
摘要翻译：具有暴露的散热器的半导体封装包括具有粘附到基板的第一表面的半导体芯片的基板。散热器包括上部，具有形成在用于容纳半导体芯片的中心的开口的下部，以及用于连接上部和下部的连接部分，其上部部分被升高到上方的高度下部的开口。下部形成有从下部的边缘向外延伸的多个定位构件，以防止在模制过程中散热器脱位，并且还包括形成在开口的周边上的向下的凹槽，以使树脂在下面的流动散热器散热器的上部暴露于半导体封装的外部，以改善散热。

3. 发明授权

US06650015B2 Cavity-down ball grid array package with semiconductor chip solder ball 有权
标题翻译：具有半导体芯片焊球的凹陷球栅阵列封装
公开(公告)号：US06650015B2
公开(公告)日：2003-11-18
申请号：US10173213
申请日：2002-06-14
申请人： Eing-Chieh Chen , Shiu-Tai Tzung , Ting-Ke Chai , Jeng-Yuan Lai , Candy Tien
发明人： Eing-Chieh Chen , Shiu-Tai Tzung , Ting-Ke Chai , Jeng-Yuan Lai , Candy Tien
IPC分类号： H01L2348
CPC分类号： H01L24/73 , H01L23/13 , H01L23/3128 , H01L23/36 , H01L24/17 , H01L24/48 , H01L24/49 , H01L24/91 , H01L2224/05554 , H01L2224/13099 , H01L2224/16 , H01L2224/48095 , H01L2224/48227 , H01L2224/49171 , H01L2224/73207 , H01L2924/00014 , H01L2924/01029 , H01L2924/014 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/1532 , H01L2924/181 , H01L2924/1815 , H01L2924/00 , H01L2224/45099 , H01L2224/05599 , H01L2924/00012
摘要： A cavity-down ball grid array package includes a substrate having a through cavity provided therein. A heat sink is attached to the substrate and a semiconductor chip in the cavity is attached to the heat sink and electrically connected to the substrate. A ball grid array is on the substrate and on the semiconductor chip.
摘要翻译：空腔向下的球栅阵列封装包括其中设置有通孔的衬底。将散热器附接到基板，并且空腔中的半导体芯片附接到散热器并电连接至基板。球栅阵列位于衬底和半导体芯片上。

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