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1. 发明授权

US08129628B2 Multilayer wiring board and method for manufacturing multilayer wiring board 失效
标题翻译：多层布线板及其制造方法
公开(公告)号：US08129628B2
公开(公告)日：2012-03-06
申请号：US12067408
申请日：2006-08-14
申请人： Tokuo Yoshida , Akiyoshi Fujii , Tatsuya Fujita
发明人： Tokuo Yoshida , Akiyoshi Fujii , Tatsuya Fujita
IPC分类号： H05K1/11
CPC分类号： H05K3/4069 , H05K1/115 , H05K3/125 , H05K3/1258 , H05K3/4664 , H05K2201/09727 , H05K2201/09854 , H05K2203/013 , H05K2203/0568 , Y10T29/49128 , Y10T29/49155 , Y10T29/49162 , Y10T29/49165
摘要： The multilayer wiring board is provided with a lower layer wiring (8), and an upper layer wiring (10) formed on the lower layer wiring (8) through an interlayer insulating layer (9). On the interlayer insulating layer (9), a contact hole (11) is provided for interconnecting the upper layer wiring (8) with the lower layer wiring (10). A region surrounded by an inner wall (13) which forms the contact hole (11) is permitted to have a linewidth region wherein a wide line region (13A) and protruding regions (13B, 13C) as regions having different linewidths are connected. Thus, film thickness distribution of an ink baked product (12) formed at the contact hole (11) rises at the protruding regions (13B, 13C), and highly reliable multilayer interconnection can be performed between the lower layer wiring (8) and the upper layer wiring (10).
摘要翻译：多层布线基板具有下层布线（8）和通过层间绝缘层（9）形成在下层布线（8）上的上层布线（10）。在层间绝缘层（9）上设置有用于使上层布线（8）与下层布线（10）互连的接触孔（11）。由形成接触孔（11）的内壁（13）包围的区域被允许具有作为具有不同线宽的区域的宽线区域（13A）和突出区域（13B，13C）的线宽区域。因此，形成在接触孔（11）处的油墨烘烤产品（12）的膜厚分布在突出区域（13B，13C）处上升，并且可以在下层布线（8）和上层布线（10）。

2. 发明申请

US20100071951A1 MULTILAYER WIRING BOARD AND METHOD FOR MANUFACTURING MULTILAYER WIRING BOARD 失效
标题翻译：多层接线板及制造多层接线板的方法
公开(公告)号：US20100071951A1
公开(公告)日：2010-03-25
申请号：US12067408
申请日：2006-08-14
申请人： Tokuo Yoshida , Akiyoshi Fujii , Tatsuya Fujita
发明人： Tokuo Yoshida , Akiyoshi Fujii , Tatsuya Fujita
IPC分类号： H05K1/11 , H01K3/10
CPC分类号： H05K3/4069 , H05K1/115 , H05K3/125 , H05K3/1258 , H05K3/4664 , H05K2201/09727 , H05K2201/09854 , H05K2203/013 , H05K2203/0568 , Y10T29/49128 , Y10T29/49155 , Y10T29/49162 , Y10T29/49165
摘要： The multilayer wiring board is provided with a lower layer wiring (8), and an upper layer wiring (10) formed on the lower layer wiring (8) through an interlayer insulating layer (9). On the interlayer insulating layer (9), a contact hole (11) is provided for interconnecting the upper layer wiring (8) with the lower layer wiring (10). A region surrounded by an inner wall (13) which forms the contact hole (11) is permitted to have a linewidth region wherein a wide line region (13A) and protruding regions (13B, 13C) as regions having different linewidths are connected. Thus, film thickness distribution of an ink baked product (12) formed at the contact hole (11) rises at the protruding regions (13B, 13C), and highly reliable multilayer interconnection can be performed between the lower layer wiring (8) and the upper layer wiring (10).
摘要翻译：多层布线基板具有下层布线（8）和通过层间绝缘层（9）形成在下层布线（8）上的上层布线（10）。在层间绝缘层（9）上设置有用于使上层布线（8）与下层布线（10）互连的接触孔（11）。由形成接触孔（11）的内壁（13）包围的区域被允许具有作为具有不同线宽的区域的宽线区域（13A）和突出区域（13B，13C）的线宽区域。因此，形成在接触孔（11）处的油墨烘烤产品（12）的膜厚分布在突出区域（13B，13C）处上升，并且可以在下层布线（8）和上层布线（10）。

3. 发明申请

US20130213798A1 MAGNETRON SPUTTERING DEVICE, METHOD FOR CONTROLLING MAGNETRON SPUTTERING DEVICE, AND FILM FORMING METHOD 审中-公开
标题翻译：磁控溅射装置，控制磁控溅射装置的方法和薄膜形成方法
公开(公告)号：US20130213798A1
公开(公告)日：2013-08-22
申请号：US13878695
申请日：2011-10-17
申请人： Tokuo Yoshida
发明人： Tokuo Yoshida
IPC分类号： C23C14/35
CPC分类号： C23C14/351 , C23C14/35 , C23C14/54 , H01J37/3405 , H01J37/3455 , H01J37/3464 , H01J37/3476
摘要： A magnetron sputtering device is provided with: a target part positioned in such a manner as to face a substrate held by a substrate holding part; a power source that supplies power to the target part; a magnet part that moves back and forth along the rear of the target part; a chamber having side walls that are electrically grounded; and a power source control part that controls the power source in such a manner that, while the magnet part is away from approach points, which are points respectively closest to the side walls, a prescribed voltage is applied to the target part by the power source, but the prescribed voltage is reduced when the magnet part reaches one of the approach points.
摘要翻译：磁控溅射装置设置有：以与被基板保持部保持的基板相对的方式设置的目标部分; 向目标部件供电的电源; 沿着目标部分的后部来回移动的磁体部分; 具有电接地的侧壁的室; 以及电源控制部，其以这样的方式控制所述电源，即当所述磁体部分远离接近所述接近点时，所述接近点是分别最靠近所述侧壁的点，通过所述电源将规定的电压施加到所述目标部分但是当磁体部分到达接近点之一时，规定的电压降低。

4. 发明授权

US08179515B2 Apparatus and method for manufacturing liquid crystal display panel 有权
标题翻译：液晶显示面板制造装置及方法
公开(公告)号：US08179515B2
公开(公告)日：2012-05-15
申请号：US12524194
申请日：2007-11-12
申请人： Tokuo Yoshida
发明人： Tokuo Yoshida
IPC分类号： G02F1/1339 , G02F1/1341
CPC分类号： G02F1/1341 , G02F1/1303 , G02F1/133305 , G02F1/1339 , G02F2001/13415
摘要： In a method for manufacturing a liquid crystal display panel, a sealant having a cut-out formed at least on the other end side of a display region is provided on one film substrate. A liquid crystal material is supplied to one end side of the display region in the one film substrate or the other film substrate. An apparatus for manufacturing a liquid crystal display panel includes a bonding unit arranged to bond the pair of film substrates and to each other through the sealant and the liquid crystal material by pressing respective surfaces of the film substrates and so that a pressure in a middle of the film substrates and becomes higher than that at both ends thereof, and a sealing unit arranged to seal the cut-out of the sealant to the pair of film substrates and bonded in the bonding unit.
摘要翻译：在液晶显示面板的制造方法中，在一个薄膜基板上设置具有至少在显示区域的另一端形成的切口的密封剂。在一个膜基板或另一个膜基板中，向显示区域的一端侧供给液晶材料。一种液晶显示面板的制造装置，其特征在于，包括：接合单元，其通过按压所述薄膜基板的各个表面，通过所述密封剂和所述液晶材料将所述一对薄膜基板和所述一对薄膜基板彼此粘合，薄膜基板，并且变得比其两端高;以及密封单元，其被设置成将密封剂的切口密封到所述一对薄膜基板并且接合在所述接合单元中。

5. 发明申请

US20130313108A1 MAGNETRON SPUTTERING DEVICE, METHOD FOR CONTROLLING MAGNETRON SPUTTERING DEVICE, AND FILM FORMING METHOD 审中-公开
标题翻译：磁控溅射装置，控制磁控溅射装置的方法和薄膜形成方法
公开(公告)号：US20130313108A1
公开(公告)日：2013-11-28
申请号：US13984034
申请日：2012-02-02
申请人： Tokuo Yoshida
发明人： Tokuo Yoshida
IPC分类号： C23C14/35
CPC分类号： C23C14/352 , C23C14/08 , C23C14/54 , H01J37/3408 , H01J37/3444 , H01J37/3464
摘要： A magnetron sputtering device includes alternating current power supplies each connected to a first target and a second target in a pair, and a controller configured to control a phase difference between voltages output from the alternating current power supplies connected to the first targets and the second targets in the pairs adjacent to each other.
摘要翻译：磁控溅射装置包括各自连接到第一靶和成对的第二靶的交流电源，以及控制器，被配置为控制从连接到第一靶和第二靶的交流电源输出的电压之间的相位差在彼此相邻的对中。

6. 发明授权

US08174666B2 Apparatus and method for manufacturing display panel, and display panel manufactured by the method 有权
标题翻译：用于制造显示面板的装置和方法以及通过该方法制造的显示面板
公开(公告)号：US08174666B2
公开(公告)日：2012-05-08
申请号：US12518463
申请日：2007-11-12
申请人： Tokuo Yoshida
发明人： Tokuo Yoshida
IPC分类号： G02F1/13
CPC分类号： G02F1/1341 , G02F1/1303 , G02F1/133305 , G02F2001/133354 , Y10T156/1043
摘要： A liquid crystal display panel manufacturing apparatus for successively bonding a pair of film substrates, each having a plurality of display regions defined at least along a longitudinal direction, along the longitudinal direction through a sealant formed in every display region of one of the film substrates includes: a first processing unit arranged to form a bonded body by bonding the film substrates so that the respective display regions are superimposed on each other; and a second processing unit including a molding roll configured to hold the bonded body formed in the first processing unit onto a peripheral wall thereof, and arranged to mold the bonded body into a curved shape along the peripheral wall of the molding roll by curing the sealant while holding the bonded body on the peripheral wall of the molding roll.
摘要翻译：一种液晶显示面板制造装置，用于通过形成在一个膜基板的每个显示区域中的密封剂沿纵向连续地结合一对薄膜基板，每个薄膜基板具有至少沿着纵向方向限定的多个显示区域，：第一处理单元，其布置成通过粘合所述薄膜基板形成接合体，使得各个显示区域彼此重叠; 以及第二处理单元，其包括成型辊，其被配置为将形成在第一处理单元中的接合体保持在其周壁上，并且布置成通过固化密封剂将接合体沿着成型辊的周壁成型为弯曲形状同时将粘合体保持在成型辊的周壁上。

7. 发明申请

US20100116155A1 APPARATUS AND METHOD FOR PRODUCING DISPLAY PANEL 有权
标题翻译：用于生产显示面板的装置和方法
公开(公告)号：US20100116155A1
公开(公告)日：2010-05-13
申请号：US12597033
申请日：2008-03-17
申请人： Tokuo Yoshida
发明人： Tokuo Yoshida
IPC分类号： B30B13/00 , F16C13/00
CPC分类号： G02F1/133305 , G02F1/1303 , G02F2001/133354 , Y10S425/029 , Y10T156/10
摘要： An apparatus for manufacturing a display panel includes a pair of pressing jigs respectively having pressing surfaces that overlap each other. A pair of film substrates, each having a display region defined thereon, are molded into a curved shape by holding the pair of film substrates between the respective pressing surfaces of the pair of pressing jigs so that the respective display regions overlap each other with a sealant, which is positioned around the display regions between the pair of film substrates, being interposed therebetween, and at least one pressing jig of the pair of pressing jigs has multiple pressing surfaces, which have different radii of curvature from each other, and are switchable with each other.
摘要翻译：一种用于制造显示面板的装置，包括分别具有彼此重叠的按压面的一对按压夹具。通过将一对薄膜基板保持在一对按压夹具的各个按压面之间，使各显示区域用密封剂彼此重叠，将一对具有限定在其上的显示区域的薄膜基板成型为弯曲形状位于一对薄膜基板之间的显示区域周围，插入其间，并且所述一对按压夹具的至少一个按压夹具具有彼此不同的曲率半径的多个按压面，并且能够与彼此。

8. 发明授权

US08698152B2 Display panel and thin film transistor substrate 有权
标题翻译：显示面板和薄膜晶体管基板
公开(公告)号：US08698152B2
公开(公告)日：2014-04-15
申请号：US13695837
申请日：2011-02-14
申请人： Yoshiyuki Harumoto , Yoshifumi Ohta , Yoshimasa Chikama , Tokuo Yoshida , Masahiko Suzuki , Okifumi Nakagawa , Yoshinobu Miyamoto , Tetsuya Yamashita , Hinae Mizuno
发明人： Yoshiyuki Harumoto , Yoshifumi Ohta , Yuuji Mizuno , Yoshimasa Chikama , Tokuo Yoshida , Masahiko Suzuki , Okifumi Nakagawa , Yoshinobu Miyamoto , Tetsuya Yamashita
IPC分类号： H01L29/04 , H01L31/036 , H01L31/0376 , H01L31/20 , H01L27/12
CPC分类号： H01L27/1214 , G02F1/1368 , G02F2201/086 , H01L27/1225 , H01L27/1255 , H01L29/78633
摘要： A display panel (50a) includes a TFT substrate (20a) in which a plurality of TFTs (5a) are provided, a counter substrate (30a) provided to face the TFT substrate (20a), and a display medium layer (40) provided between the TFT substrate (20a) and the counter substrate (30a), a plurality of pixels being provided so that each of the plurality of pixels is associated with a corresponding one of the TFTs (5a), wherein an oxide semiconductor layer (13) is provided in each of the TFTs (5a) as a channel, and an ultraviolet light absorbing layer (22) having a light transmitting property is provided in each of the pixels (P) so as to overlap the oxide semiconductor layer (13).
摘要翻译：显示面板（50a）包括其中设置有多个TFT（5a）的TFT基板（20a），与TFT基板（20a）相对设置的对置基板（30a）和设置在显示介质层（40）在TFT基板（20a）和对置基板（30a）之间，设置多个像素，使得多个像素中的每一个与相应的一个TFT（5a）相关联，其中氧化物半导体层（13）设置在每个TFT（5a）中作为沟道，并且在每个像素（P）中提供具有透光性的紫外光吸收层（22），以与氧化物半导体层（13）重叠。

9. 发明授权

US08592811B2 Active matrix substrate and display panel 有权
标题翻译：有源矩阵基板和显示面板
公开(公告)号：US08592811B2
公开(公告)日：2013-11-26
申请号：US13697106
申请日：2011-02-14
申请人： Masahiko Suzuki , Yoshimasa Chikama , Yoshifumi Ohta , Tokuo Yoshida , Okifumi Nakagawa , Yoshiyuki Harumoto , Yoshinobu Miyamoto , Tetsuya Yamashita , Hinae Mizuno
发明人： Masahiko Suzuki , Yoshimasa Chikama , Yuuji Mizuno , Yoshifumi Ohta , Tokuo Yoshida , Okifumi Nakagawa , Yoshiyuki Harumoto , Yoshinobu Miyamoto , Tetsuya Yamashita
IPC分类号： H01L29/10 , H01L29/12 , H01L27/12 , H01L27/088 , H01L29/06 , H01L23/48 , H01L23/52 , H01L29/40 , G02F1/136
CPC分类号： H01L27/124 , G02F1/13458 , G02F1/136286 , G02F2001/13629 , G02F2001/136295 , H01L27/1214 , H01L27/1225 , H01L27/1244
摘要： An active matrix substrate (20a) includes a plurality of pixel electrodes (18a) arranged in a matrix, and a plurality of TFTs (5) each connected to a corresponding one of the pixel electrodes (18a), and each including a gate electrode (11a) provided on an insulating substrate (10a), a gate insulating film (12a) covering the gate electrode (11a), a semiconductor layer (16a) provided on the gate insulating film (12a) and having a channel region (C) overlapping the gate electrode (11a), and a source electrode (15aa) and a drain electrode (15b) of copper or copper alloy provided on the gate insulating film (12a) and separated from each other by the channel region (C) of the semiconductor layer (16a). The semiconductor layer (16a) is formed of an oxide semiconductor and covers the source electrode (15aa) and the drain electrode (15b).
摘要翻译：有源矩阵基板（20a）包括以矩阵形式布置的多个像素电极（18a）和多个TFT（5），每个TFT（5）分别连接到相应的一个像素电极（18a），并且各自包括栅电极设置在绝缘基板（10a）上的11a），覆盖栅极（11a）的栅极绝缘膜（12a），设置在栅极绝缘膜（12a）上并具有沟道区域（C）的半导体层栅极电极（11a）以及设置在栅极绝缘膜（12a）上的铜或铜合金的源电极（15aa）和漏电极（15b），并通过半导体的沟道区域（C）彼此分离层（16a）。半导体层（16a）由氧化物半导体形成，并覆盖源电极（15aa）和漏电极（15b）。

10. 发明授权

US08575615B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08575615B2
公开(公告)日：2013-11-05
申请号：US13119210
申请日：2009-09-01
申请人： Yuichi Saito , Masao Moriguchi , Tokuo Yoshida , Yasuaki Iwase , Yohsuke Kanzaki , Mayuko Sakamoto
发明人： Yuichi Saito , Masao Moriguchi , Tokuo Yoshida , Yasuaki Iwase , Yohsuke Kanzaki , Mayuko Sakamoto
IPC分类号： H01L31/00 , H01L29/10 , H01L29/04 , H01L31/036
CPC分类号： H01L27/12 , G02F1/136204 , H01L27/1225
摘要： A diode 201 includes a gate electrode 2, a gate insulating layer 5 provided on the gate electrode 2, at least one semiconductor layer 6, 7 provided on the gate insulating layer 5 and which includes a first region 6a and a second region 7b, a first electrode 10 which is provided on the first region 6a and which is electrically coupled to the first region 6a and the gate electrode 2, and a second electrode 12 which is provided on the second region 7b and which is electrically coupled to the second region 7b. The at least one semiconductor layer 6, 7 includes a channel region 6c which extends above the gate electrode 2 with the intervention of the gate insulating layer 5 therebetween, and a resistor region 7d which does not extend above the gate electrode 2. When the diode 201 is in an ON state, an electric current path is formed between the first electrode 10 and the second electrode 12, the electric current path including the channel region 6c and the resistor region 7d.
摘要翻译：二极管201包括栅极电极2，设置在栅极电极2上的栅极绝缘层5，设置在栅极绝缘层5上的至少一个半导体层6,7，其包括第一区域6a和第二区域7b，第一电极10设置在第一区域6a上并且电耦合到第一区域6a和栅极电极2;以及第二电极12，其设置在第二区域7b上并且电耦合到第二区域7b 。至少一个半导体层6,7包括在栅极电极2上方延伸的沟道区域6c，其中介于其间的栅极绝缘层5以及不在栅极电极2上方延伸的电阻器区域7d。当二极管 201处于导通状态，在第一电极10和第二电极12之间形成电流路径，电流路径包括沟道区6c和电阻区7d。

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