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1. 发明授权

US08427879B2 Method for enabling a SONOS transistor to be used as both a switch and a memory 有权
标题翻译：使SONOS晶体管能够用作开关和存储器的方法
公开(公告)号：US08427879B2
公开(公告)日：2013-04-23
申请号：US12644575
申请日：2009-12-22
申请人： Ting-Chang Chang , Shih-Ching Chen , Te-Chih Chen , Fu-Yen Jian , Yong-En Syu
发明人： Ting-Chang Chang , Shih-Ching Chen , Te-Chih Chen , Fu-Yen Jian , Yong-En Syu
IPC分类号： G11C11/34 , G11C16/04
CPC分类号： G11C16/0466 , G11C16/10 , H01L29/792
摘要： There is a method for enabling a SONOS transistor to be used as both a switch and a memory. FN tunneling is carried out through the source or drain of the transistor, so as to further change the state of electrons stored in an upper charge storage layer adjacent to the drain or source, and the variation in gate-induced drain leakage is used to recognize the memory state of the drain and source. A stable threshold voltage of the transistor is always maintained during this operation. The present invention enables one single transistor having dual features of switch and memory, while being provided with a two-bit memory effect, thus providing a higher memory density in comparison with a general transistor.
摘要翻译：存在使SONOS晶体管能够用作开关和存储器的方法。通过晶体管的源极或漏极进行FN隧穿，从而进一步改变存储在与漏极或源极相邻的上部电荷存储层中的电子的状态，并且使用栅极引起的漏极泄漏的变化来识别漏极和源的存储状态。在此操作期间，始终保持晶体管的稳定阈值电压。本发明使得具有开关和存储器的双重特征的单个晶体管同时具有两比特存储器效应，从而与通用晶体管相比提供了更高的存储器密度。

2. 发明授权

US08592794B2 Resistance random access memory element and method for making the same 有权
标题翻译：电阻随机存取存储元件及其制作方法
公开(公告)号：US08592794B2
公开(公告)日：2013-11-26
申请号：US13112605
申请日：2011-05-20
申请人： Ting-Chang Chang , Po-Chun Yang , Yu-Shih Lin , Shih-Ching Chen , Fu-Yen Jian
发明人： Ting-Chang Chang , Po-Chun Yang , Yu-Shih Lin , Shih-Ching Chen , Fu-Yen Jian
IPC分类号： H01L47/00 , H01L21/04
CPC分类号： H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/1273 , H01L45/145 , H01L45/146 , H01L45/16
摘要： A resistance random access memory element includes a first electrode, an insulating layer, a diffusing metal layer, and a second electrode superimposed in sequence. The insulating layer includes a plurality of pointed electrodes. A method for making a resistance random access memory element includes growing and forming an insulating layer on a surface of a first electrode. A diffusing metal layer is formed on a surface of the insulating layer. A second electrode is mounted on a surface of the diffusing metal layer. A negative pole and a positive pole of a driving voltage are connected with the first and second electrodes, respectively. The diffusing metal in the diffusing metal layer is oxidized into metal ions by the driving voltage. The metal ions are driven into the insulating layer and form a plurality of pointed electrodes after reduction.
摘要翻译：电阻随机存取存储元件包括依次叠加的第一电极，绝缘层，扩散金属层和第二电极。绝缘层包括多个尖电极。制造电阻随机存取存储元件的方法包括在第一电极的表面上生长并形成绝缘层。在绝缘层的表面上形成扩散金属层。第二电极安装在漫射金属层的表面上。驱动电压的负极和正极分别与第一和第二电极连接。扩散金属层中的扩散金属通过驱动电压被氧化为金属离子。金属离子被驱动到绝缘层中，并且在还原之后形成多个尖电极。

3. 发明授权

US08208307B2 Operation method of memory device 有权
标题翻译：存储器件的操作方法
公开(公告)号：US08208307B2
公开(公告)日：2012-06-26
申请号：US12772111
申请日：2010-04-30
申请人： Ting-Chang Chang , Fu-Yen Jian , Shih-Ching Chen , Te-Chih Chen
发明人： Ting-Chang Chang , Fu-Yen Jian , Shih-Ching Chen , Te-Chih Chen
IPC分类号： G11C11/34
CPC分类号： G11C16/0466 , G11C11/5628 , H01L29/792
摘要： A method for operating a memory device is provided. In accordance with the method, the charges are stored in a source storage region, a drain storage region, and a channel storage region of a charge storage layer which respectively correspond to a source, a drain, and a channel of a SONOS transistor, thereby achieving 3-bit information storage in one cell. The channel storage region is programmed and erased by FN tunneling. Both of the source storage region and the drain storage region are programmed by channel hot electrons and erased by source-side or drain-side FN tunneling. The present invention can store three-bit data per cell, such that the storage density of the memory device can be substantially increased.
摘要翻译：提供了一种用于操作存储器件的方法。根据该方法，将电荷存储在电荷存储层的源极存储区域，漏极存储区域以及与SONOS晶体管的源极，漏极和沟道对应的电荷存储层的沟道存储区域中，从而在一个单元中实现3位信息存储。信道存储区域通过FN隧道编程和擦除。源极存储区域和漏极存储区域都被通道热电子编程，并通过源极侧或漏极侧FN隧道擦除。本发明可以存储每个小区的三比特数据，从而可以显着增加存储装置的存储密度。

4. 发明授权

US07835192B2 Method for programming a nonvolatile memory 有权
标题翻译：非易失性存储器编程方法
公开(公告)号：US07835192B2
公开(公告)日：2010-11-16
申请号：US12314129
申请日：2008-12-04
申请人： Ting-Chang Chang , Shih-Ching Chen , Fu-Yen Jian
发明人： Ting-Chang Chang , Shih-Ching Chen , Fu-Yen Jian
IPC分类号： G11C16/04
CPC分类号： G11C16/0408 , G11C16/0466 , G11C16/10
摘要： A method for programming a nonvolatile memory includes applying at least a voltage to a source or a drain, so as to inject carriers of the source or drain into a substrate; applying a third voltage to a gate or the substrate, so that the carriers which are in the substrate having enough energy can surmount an oxide layer to reach a charge storage device.
摘要翻译：一种用于对非易失性存储器进行编程的方法包括至少向源极或漏极施加电压，以便将源极或漏极的载流子注入到衬底中; 向栅极或衬底施加第三电压，使得在衬底中具有足够能量的载流子可以超过氧化物层到达电荷存储装置。

5. 发明申请

US20110096610A1 METHOD FOR ENABLING A SONOS TRANSISTOR TO BE USED AS BOTH A SWITCH AND A MEMORY 有权
标题翻译：用于启用要用作开关和存储器的SONOS晶体管的方法
公开(公告)号：US20110096610A1
公开(公告)日：2011-04-28
申请号：US12644575
申请日：2009-12-22
申请人： Ting-Chang Chang , Shih-Ching Chen , Te-Chih Chen , Fu-Yen Jian , Yong-En Syu
发明人： Ting-Chang Chang , Shih-Ching Chen , Te-Chih Chen , Fu-Yen Jian , Yong-En Syu
IPC分类号： G11C16/04
CPC分类号： G11C16/0466 , G11C16/10 , H01L29/792
摘要： There is a method for enabling a SONOS transistor to be used as both a switch and a memory. FN tunneling is carried out through the source or drain of the transistor, so as to further change the state of electrons stored in an upper charge storage layer adjacent to the drain or source, and the variation in gate-induced drain leakage is used to recognize the memory state of the drain and source. A stable threshold voltage of the transistor is always maintained during this operation. The present invention enables one single transistor having dual features of switch and memory, while being provided with a two-bit memory effect, thus providing a higher memory density in comparison with a general transistor.
摘要翻译：存在使SONOS晶体管能够用作开关和存储器的方法。通过晶体管的源极或漏极进行FN隧穿，从而进一步改变存储在与漏极或源极相邻的上部电荷存储层中的电子的状态，并且使用栅极引起的漏极泄漏的变化来识别漏极和源的存储状态。在此操作期间，始终保持晶体管的稳定阈值电压。本发明使得具有开关和存储器的双重特征的单个晶体管同时具有两比特存储器效应，从而与通用晶体管相比提供了更高的存储器密度。

6. 发明申请

US20100034027A1 Method for programming a nonvolatile memory 有权
标题翻译：非易失性存储器编程方法
公开(公告)号：US20100034027A1
公开(公告)日：2010-02-11
申请号：US12314129
申请日：2008-12-04
申请人： Ting-Chang Chang , Shih-Ching Chen , Fu-Yen Jian
发明人： Ting-Chang Chang , Shih-Ching Chen , Fu-Yen Jian
IPC分类号： G11C16/04
CPC分类号： G11C16/0408 , G11C16/0466 , G11C16/10
摘要： A method for programming a nonvolatile memory is provided. The method includes applying at least a voltage to a source or a drain, so as to inject carriers of the source or drain into a substrate; applying a third voltage to a gate or the substrate, so that the carriers which are in the substrate having enough energy can surmount an oxide layer to reach a charge storage device.
摘要翻译：提供了一种非易失性存储器的编程方法。该方法包括将至少一个电压施加到源极或漏极，以便将源极或漏极的载流子注入到衬底中; 向栅极或衬底施加第三电压，使得在衬底中具有足够能量的载流子可以超过氧化物层到达电荷存储装置。

7. 发明申请

US20130234094A1 Methods and Apparatus for Resistive Random Access Memory (RRAM) 有权
标题翻译：电阻随机存取存储器（RRAM）的方法和装置
公开(公告)号：US20130234094A1
公开(公告)日：2013-09-12
申请号：US13416183
申请日：2012-03-09
申请人： Ting-Chang Chang , Yong-En Syu , Fu-Yen Jian , Shih-Chieh Chang , Ying-Lang Wang
发明人： Ting-Chang Chang , Yong-En Syu , Fu-Yen Jian , Shih-Chieh Chang , Ying-Lang Wang
IPC分类号： H01L45/00
CPC分类号： H01L45/04 , H01L27/2436 , H01L45/12 , H01L45/145 , H01L45/1608
摘要： Methods and apparatuses for a resistive random access memory (RRAM) device are disclosed. The RRAM device comprises a bottom electrode, a resistive switching layer disposed on the bottom electrode, and a top electrode disposed on the resistive switching layer. The resistive switching layer is made of a composite of a metal, Si, and O. There may be an additional tunnel barrier layer between the top electrode and the bottom electrode. The top electrode and the bottom electrode may comprise multiple sub-layers.
摘要翻译：公开了一种用于电阻随机存取存储器（RRAM）装置的方法和装置。 RRAM器件包括底电极，设置在底电极上的电阻开关层和设置在电阻开关层上的顶电极。电阻开关层由金属，Si和O的复合材料制成。在顶部电极和底部电极之间可能存在额外的隧道势垒层。顶部电极和底部电极可以包括多个子层。

8. 发明申请

US20110103155A1 OPERATION METHOD OF MEMORY DEVICE 有权
标题翻译：存储器件的操作方法
公开(公告)号：US20110103155A1
公开(公告)日：2011-05-05
申请号：US12841739
申请日：2010-07-22
申请人： Ting-Chang Chang , Te-Chih Chen , Fu-Yen Jian , Chia-Sheng Lin
发明人： Ting-Chang Chang , Te-Chih Chen , Fu-Yen Jian , Chia-Sheng Lin
IPC分类号： G11C16/04
CPC分类号： G11C16/0408 , H01L21/28282 , H01L29/66833 , H01L29/792
摘要： One embodiment of the present invention provides an operation method of a memory device. The memory device includes a source, a drain, and a channel region between the source and the drain, a gate dielectric with a charge storage layer on the channel region, and a gate on the gate dielectric, wherein the source, the drain and the channel region are located in a substrate. The operation method includes the following steps: applying a reverse bias between the gate and the drain of the memory device to generate band-to-band hot holes in the substrate near the drain; injecting the band-to-band hot holes to a drain side of the charge storage layer; and performing a program/erase operation upon the memory device. The band-to-band hot holes in the drain side of the charge storage layer are not completely vanished by the program/erase operation.
摘要翻译：本发明的一个实施例提供一种存储装置的操作方法。存储器件包括源极和漏极之间的源极，漏极和沟道区域，在沟道区域上具有电荷存储层的栅极电介质和栅极电介质上的栅极，其中源极，漏极和漏极沟道区域位于衬底中。操作方法包括以下步骤：在存储器件的栅极和漏极之间施加反向偏置，以在漏极附近的衬底中产生带对带热孔; 将带 - 带热孔注入到电荷存储层的漏极侧; 以及对存储器件执行编程/擦除操作。通过编程/擦除操作，电荷存储层的漏极侧的带对带热孔并不完全消失。

9. 发明申请

US20100322014A1 ERASING METHOD FOR NONVOLATILE MEMORY 有权
标题翻译：非易失性存储器的擦除方法
公开(公告)号：US20100322014A1
公开(公告)日：2010-12-23
申请号：US12498010
申请日：2009-07-06
申请人： Ting-Chang Chang , Fu-Yen Jian , Hung-Wei Li
发明人： Ting-Chang Chang , Fu-Yen Jian , Hung-Wei Li
IPC分类号： G11C16/04
CPC分类号： G11C16/14 , G11C16/0408
摘要： The present invention relates to an erasing method for nonvolatile memory, which uses forward bias between the source/drain region and body contact to inject majority carriers into the body, and then accelerates the majority carriers by an electric field between the body and the gate to energize the majority carriers to overcome the oxide barrier and to erase the nonvolatile memory.
摘要翻译：本发明涉及一种用于非易失性存储器的擦除方法，其使用源极/漏极区域和体接触之间的正向偏压将多数载流子注入到体内，然后通过体和门之间的电场加速多数载流子，激励多数载流子以克服氧化物屏障并擦除非易失性存储器。

10. 发明授权

US09847478B2 Methods and apparatus for resistive random access memory (RRAM) 有权
公开(公告)号：US09847478B2
公开(公告)日：2017-12-19
申请号：US13416183
申请日：2012-03-09
申请人： Ting-Chang Chang , Yong-En Syu , Fu-Yen Jian , Shih-Chieh Chang , Ying-Lang Wang
发明人： Ting-Chang Chang , Yong-En Syu , Fu-Yen Jian , Shih-Chieh Chang , Ying-Lang Wang
IPC分类号： H01L45/00 , H01L27/24
CPC分类号： H01L45/04 , H01L27/2436 , H01L45/12 , H01L45/145 , H01L45/1608
摘要： Methods and apparatuses for a resistive random access memory (RRAM) device are disclosed. The RRAM device comprises a bottom electrode, a resistive switching layer disposed on the bottom electrode, and a top electrode disposed on the resistive switching layer. The resistive switching layer is made of a composite of a metal, Si, and O. There may be an additional tunnel barrier layer between the top electrode and the bottom electrode. The top electrode and the bottom electrode may comprise multiple sub-layers.

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