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1. 发明授权

US06700807B1 Flexible converter 有权
标题翻译：柔性转换器
公开(公告)号：US06700807B1
公开(公告)日：2004-03-02
申请号：US09966979
申请日：2001-09-28
申请人： Timothy J. Williams , Steven P. Larky , David G. Wright
发明人： Timothy J. Williams , Steven P. Larky , David G. Wright
IPC分类号： H02M1100
CPC分类号： H02M3/157
摘要： The present invention is directed to a flexible converter. A flexible converter of the present invention may provide a desired output utilizing a variety of methods, systems and apparatus without departing from the spirit and scope of the present invention. For instance, a method may include loading an initial configuration including at least one power characteristic into a converter. The converter is suitable for providing power to an electrical device. A power output is generated having the at least one power characteristic. The power output is monitored with a comparator, the comparator suitable for measuring the at least one power characteristic.
摘要翻译：本发明涉及柔性转换器。本发明的柔性转换器可以在不脱离本发明的精神和范围的情况下，利用各种方法，系统和装置提供期望的输出。例如，方法可以包括将包括至少一个功率特性的初始配置加载到转换器中。该转换器适用于向电气设备供电。产生具有至少一个功率特性的功率输出。功率输出由比较器监控，比较器适用于测量至少一个功率特性。

2. 发明授权

US06580623B1 Flexible converter routing apparatus, system and method 有权
标题翻译：灵活的转换器路由设备，系统和方法
公开(公告)号：US06580623B1
公开(公告)日：2003-06-17
申请号：US09967260
申请日：2001-09-28
申请人： Timothy J. Williams , Steven P. Larky , David G. Wright
发明人： Timothy J. Williams , Steven P. Larky , David G. Wright
IPC分类号： H02M1100
CPC分类号： H02M3/157
摘要： The present invention is directed to a flexible converter suitable for providing a routing function. A flexible converter of the present invention may provide a desired output utilizing a variety of methods, systems and apparatus without departing from the spirit and scope of the present invention. A routing apparatus may include a converter, at least one comparator and a controller. The converter is capable of providing an output supply from an input supply coupled to the converter, the output supply capable of routing between a first output and a second output. At least one comparator is coupled to the output supply of the converter, the comparator capable of measuring at least one power characteristic of the first output and the second output to a first electrical device and to a second electrical device. The controller is coupled to the comparator; the controller being capable of implementing a process within the converter such that the first output is routed to the first electrical device and the second output is routed to the second electrical device. The first output and the second output are monitored with the at least one comparator and the first output to the first electrical device and the second output to the second electrical device are re-routed based upon the monitoring by the comparator.
摘要翻译：本发明涉及一种适于提供路由功能的柔性转换器。本发明的柔性转换器可以在不脱离本发明的精神和范围的情况下，利用各种方法，系统和装置提供期望的输出。路由设备可以包括转换器，至少一个比较器和控制器。转换器能够从耦合到转换器的输入电源提供输出电源，输出电源能够在第一输出和第二输出之间路由。至少一个比较器耦合到转换器的输出电源，比较器能够测量第一输出的第一功率特性和第二输出到第一电气设备和第二电气设备。控制器耦合到比较器; 所述控制器能够实现所述转换器内的过程，使得所述第一输出被路由到所述第一电气设备，并且所述第二输出被路由到所述第二电气设备。第一输出和第二输出由至少一个比较器监视，并且第一输出到第一电气设备，而第二输出到第二电气设备是基于比较器的监视被重新路由的。

3. 发明授权

US07047173B1 Analog signal verification using digital signatures 失效
标题翻译：使用数字签名的模拟信号验证
公开(公告)号：US07047173B1
公开(公告)日：2006-05-16
申请号：US09631427
申请日：2000-08-03
申请人： Steven P. Larky , Terry D. Little
发明人： Steven P. Larky , Terry D. Little
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： A method for modeling analog signals that may comprise (A) detecting one or more attributed analog signals and (B) modeling the attributed analog signals by adding a signature to each of the one or more attributed analog signals.
摘要翻译：一种用于对模拟信号建模的方法，其可以包括（A）检测一个或多个归属的模拟信号，以及（B）通过向所述一个或多个归属的模拟信号中的每一个添加签名来对归属的模拟信号进行建模。

4. 发明授权

US6092210A Device and method for synchronizing the clocks of interconnected universal serial buses 有权
标题翻译：互连通用串行总线时钟同步的装置和方法
公开(公告)号：US6092210A
公开(公告)日：2000-07-18
申请号：US173470
申请日：1998-10-14
申请人： Steven P. Larky , Scott Swindle
发明人： Steven P. Larky , Scott Swindle
IPC分类号： G06F13/40 , G06F1/12
CPC分类号： G06F13/4054
摘要： A USB-to-USB connecting device is provided for interconnecting two independent universal serial buses (USBs) and for synchronizing local device clocks to the data streams of both USBs. To interconnect the USBs, the device may include a separate local clock synchronization mechanism for each USB connected to the device. Each separate local clock synchronization may utilize the same reference clock. A method for interconnecting two USBs is also provided.
摘要翻译： USB-USB连接设备用于互连两个独立的通用串行总线（USB），并用于将本地设备时钟同步到两个USB的数据流。为了互连USB，设备可以为连接到设备的每个USB包括单独的本地时钟同步机制。每个单独的本地时钟同步可以利用相同的参考时钟。还提供了一种用于互连两个USB的方法。

5. 发明授权

US5452412A High performance rasterization engine 失效
标题翻译：高性能光栅化引擎
公开(公告)号：US5452412A
公开(公告)日：1995-09-19
申请号：US109414
申请日：1993-08-19
申请人： Lee E. Johnson, Jr. , Daryl J. Kokoszka , Steven P. Larky , Paolo Sidoli
发明人： Lee E. Johnson, Jr. , Daryl J. Kokoszka , Steven P. Larky , Paolo Sidoli
IPC分类号： G06F3/153 , G06T11/20 , G06T15/83 , G06T15/87 , G06T15/10
CPC分类号： G06T15/83 , G06T11/40 , G06T15/87
摘要： A graphics processor including an interface for providing triangle primitives and line primitives representing a graphical image, a line drawer for receiving line primitives and for rendering the line primitives, and a triangle interpolator for receiving the triangle primitives from the interface and for providing line primitives therefrom to the line drawer, wherein the interface includes a register for storing graphics image line primitives and for selectively providing the stored line primitives to the line drawer.
摘要翻译：一种图形处理器，包括用于提供表示图形图像的三角形图元和线图元的接口，用于接收线图元和用于渲染线图元的线抽屉，以及用于从界面接收三角形图元并用于从其提供线图元的三角形插值器其中所述接口包括用于存储图形图像线原语的寄存器，并且用于选择性地将所存储的线原语提供给线抽屉。

6. 发明授权

US5301278A Flexible dynamic memory controller 失效
标题翻译：灵活的动态存储控制器
公开(公告)号：US5301278A
公开(公告)日：1994-04-05
申请号：US873880
申请日：1992-04-23
申请人： Ronald J. Bowater , Steven P. Larky , Joe C. St. Clair , Paolo G. Sidoli
发明人： Ronald J. Bowater , Steven P. Larky , Joe C. St. Clair , Paolo G. Sidoli
IPC分类号： G06F13/16 , G11C7/22 , G11C8/18 , G11C11/4076 , G06F13/10
CPC分类号： G11C7/22 , G06F13/1689 , G06F13/1694 , G11C11/4076 , G11C8/18
摘要： A flexible dynamic memory controller that is operable with dynamic RAMS having a wide range of operating characteristics. These characteristics include different operating speeds for various memory functions, and the usage of memories. In a state machine, a special register is utilized to control where in the sequence of operation, and for how long various delays must be inserted. The delays are dynamically determined by the memory controller in accordance with the type of memory being accessed at a given time and the source of the request.
摘要翻译：灵活的动态存储器控制器，其可操作与动态RAMS具有广泛的操作特性。这些特征包括各种存储器功能的不同操作速度和存储器的使用。在状态机中，使用专用寄存器来控制操作顺序以及必须插入多长时间的延迟。根据在给定时间访问的存储器的类型和请求的来源，存储器控制器动态地确定延迟。

7. 发明授权

US4956638A Display using ordered dither 失效
标题翻译：使用有序抖动显示
公开(公告)号：US4956638A
公开(公告)日：1990-09-11
申请号：US245857
申请日：1988-09-16
申请人： Steven P. Larky , Bruce D. Lucas , Daniel H. McCabe , Todd K. Rodgers
发明人： Steven P. Larky , Bruce D. Lucas , Daniel H. McCabe , Todd K. Rodgers
IPC分类号： G09G5/00 , G06T5/00 , G09G3/20 , G09G5/02 , G09G5/06 , H04N1/41 , H04N1/64
CPC分类号： H04N1/648 , G09G5/02 , G09G3/2051
摘要： A color display device which includes dither apparatus for each primary color to be displayed. A dither matrix provides a dither signal output as a function of the position of a pixel on the color display device. An input primary color signal includes an integer signal and a fraction signal. The integer signal is incremented by an incrementer. There is means for providing an output primary color signal which is the incremented signal whenever a predetermined relationship exists between the dither signal and the fraction signal, and which is the integer signal whenever the predetermined relationship does not exist.

8. 发明授权

US4910687A Bit gating for efficient use of RAMs in variable plane displays 失效
标题翻译：位选通以在可变平面显示器中高效使用RAM
公开(公告)号：US4910687A
公开(公告)日：1990-03-20
申请号：US116104
申请日：1987-11-03
申请人： Nicholas D. Butler , Brian C. Homewood , Steven P. Larky
发明人： Nicholas D. Butler , Brian C. Homewood , Steven P. Larky
IPC分类号： G06F3/153 , G06T9/00 , G09G1/00 , G09G1/02 , G09G5/00 , G09G5/36 , G09G5/39 , G09G5/395
CPC分类号： G09G5/395
摘要： Apparatus for serializing 2.sup.M parallel outputs of an all points addressable memory into successive data groups, with each data group corresponding to a respective value for a pixel in an image, wherein the bit-length of the pixel value is selectable. The apparatus includes a gate circuit having 2.sup.M parallel input junctions connected to the outputs of the memory and 2.sup.N output junctions. The gate circuit selectively converts each set of 2.sup.M parallel inputs at the input junctions in to 2.sup.M-n successive data groups, with each group having a bit-length of 2.sup.n bits. Each such group is transmitted to 2.sup.n of the 2.sup.N output junctions. A communication element conveys to the gate circuit a signal which controls the bit-length 2.sup.n of the data groups, wherein n is an integer 1.ltoreq.n.ltoreq.N.ltoreq.M.

9. 发明授权

US07489092B1 Method and apparatus for enhanced alert notification 有权
标题翻译：用于增强警报通知的方法和装置
公开(公告)号：US07489092B1
公开(公告)日：2009-02-10
申请号：US11540524
申请日：2006-09-28
申请人： Steven P. Larky , Darrin Vallis
发明人： Steven P. Larky , Darrin Vallis
IPC分类号： H02P5/00
CPC分类号： F04D29/005 , F04D27/004 , F04D27/008 , F04D29/582
摘要： A system, fan controller and method for enhanced alert notification. Embodiments provide an effective mechanism for utilizing system fans to create alert tones or messages, where fan speed differentials may be adjusted to alter the frequency of the fan interference sounds. As such, existing hardware can be used to reduce cost by producing audible alerts which may be heard above ambient noise in a room with one or more electronic systems. Further, the frequency of the interference sounds may be altered to more clearly identify one or more systems to which a fault pertains.
摘要翻译：一种用于增强警报通知的系统，风扇控制器和方法。实施例提供了一种利用系统风扇来创建警报音或消息的有效机构，其中可以调整风扇速度差以改变风扇干扰声音的频率。因此，现有硬件可以用于通过在具有一个或多个电子系统的房间中产生可能在环境噪声之上听到的声音警报来降低成本。此外，可以改变干扰声音的频率以更清楚地识别故障所属的一个或多个系统。

10. 发明授权

US06779061B1 Method and apparatus implementing a FIFO with discrete blocks 有权
标题翻译：实现具有离散块的FIFO的方法和装置
公开(公告)号：US06779061B1
公开(公告)日：2004-08-17
申请号：US09567681
申请日：2000-05-09
申请人： Scott A. Swindle , Lane T. Hauck , Steve H. Kolokowsky , Steven P. Larky
发明人： Scott A. Swindle , Lane T. Hauck , Steve H. Kolokowsky , Steven P. Larky
IPC分类号： G06F1312
CPC分类号： G06F5/065 , G06F13/4059 , G06F2205/066
摘要： An apparatus comprising one or more storage elements. The one or more storage elements may be configured to switch an input/output between a first domain and a second domain in response to one or more control signals.
摘要翻译：一种包括一个或多个存储元件的装置。一个或多个存储元件可以被配置为响应于一个或多个控制信号而在第一域和第二域之间切换输入/输出。

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