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1. 发明申请

US20060001737A1 Video conference arrangement 审中-公开
标题翻译：视频会议安排
公开(公告)号：US20060001737A1
公开(公告)日：2006-01-05
申请号：US10883089
申请日：2004-07-01
申请人： Thomas Dawson , Priyan Gunatilake , David Boyden , Takaaki Ota , Christopher Read
发明人： Thomas Dawson , Priyan Gunatilake , David Boyden , Takaaki Ota , Christopher Read
IPC分类号： H04N7/14
CPC分类号： H04N7/15 , H04N7/148
摘要： A videoconferencing method consistent with certain embodiments involves receiving a video stream via a broadband network connection at a television display to display a remote party's inbound video information. A video stream is transmitted via a wireless cellular telephone's camera to the remote party to provide outbound video information. Inbound audio is received from the remote party via the broadband network connection at the television display and playing the audio using the television display's audio circuits. Outbound audio is transmitted to the remote party via the wireless cellular telephone's audio circuits. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.
摘要翻译：与某些实施例一致的视频会议方法涉及通过电视显示器上的宽带网络连接接收视频流，以显示远程方的入站视频信息。通过无线蜂窝电话的相机将视频流发送到对方，以提供出站视频信息。通过电视显示器上的宽带网络连接从对方接收入站音频，并使用电视显示器的音频电路播放音频。出站音频通过无线蜂窝电话的音频电路传输到对方。该摘要不被认为是限制性的，因为其他实施例可能偏离本摘要中描述的特征。

2. 发明申请

US20050134728A1 Flat moldable HDTV display 有权
公开(公告)号：US20050134728A1
公开(公告)日：2005-06-23
申请号：US11047162
申请日：2005-01-31
申请人： Thomas Dawson , David Bessel , David Boyden , David Desch , Paul Georgief , Priyan Gunatilake , Kevin Jones , Takaaki Ota , Christopher Read , Kenichi Kawasaki
发明人： Thomas Dawson , David Bessel , David Boyden , David Desch , Paul Georgief , Priyan Gunatilake , Kevin Jones , Takaaki Ota , Christopher Read , Kenichi Kawasaki
IPC分类号： G09G3/34 , G09G3/36 , H04N9/12 , H04N5/66
CPC分类号： G09G3/342 , G09G3/3413 , G09G3/3629 , G09G2310/024 , G09G2320/0633 , H04N9/12
摘要： An apparatus comprising a plurality of columns bound together, configured to display a single row of pixels scanned out from top to bottom. It also comprises a timing control unit to synchronize between the columns to allow all pixels of a single row to be lit at the same time.

3. 发明申请

US20070028260A1 Multipurpose television module 失效
标题翻译：多功能电视模组
公开(公告)号：US20070028260A1
公开(公告)日：2007-02-01
申请号：US11365016
申请日：2006-03-01
申请人： George Williams , Xudong Yu , Toshiro Ozawa , Rolf Toft , Leo Pedlow , Brant Candelore , David Boyden , Robert Blanchard , Christopher Read
发明人： George Williams , Xudong Yu , Toshiro Ozawa , Rolf Toft , Leo Pedlow , Brant Candelore , David Boyden , Robert Blanchard , Christopher Read
IPC分类号： H04N7/167 , H04N7/16
CPC分类号： H04N21/4181 , H04N7/1675 , H04N21/4184 , H04N21/4367 , H04N21/4433
摘要： An external module for use with a host television device consistent with certain embodiments wherein the host television device receives at least one content service has a connector for attaching to the module. Java™ code is received from the content service being received by the host television device over the connector. An application execution engine residing on the external module carries out execution of the Java™ code. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.
摘要翻译：一种用于与主机电视设备一起使用的外部模块，其与主机电视设备接收至少一个内容服务的某些实施例一致，具有用于连接到模块的连接器。从主机电视设备通过连接器接收的内容服务接收到Java TM代码。驻留在外部模块上的应用执行引擎执行Java（TM）代码的执行。该摘要不被认为是限制性的，因为其他实施例可能偏离本摘要中描述的特征。

4. 发明申请

US20060026483A1 Error correction compensating ones or zeros string suppression 有权
标题翻译：纠错补偿或零字符串抑制
公开(公告)号：US20060026483A1
公开(公告)日：2006-02-02
申请号：US10910433
申请日：2004-08-02
申请人： Christopher Read
发明人： Christopher Read
IPC分类号： G06F11/00 , G06F11/30 , G08C25/00 , H03M13/00 , H04L1/00
CPC分类号： H04L1/0041
摘要： An error correction compensating ones or zeros string suppression system and method for use in a digital transmission system is herein disclosed. In digital transmission systems utilizing error control coding (ECC)/forward error correction (FEC) to reduce the number of bit errors in a bit stream, long strings of ones and zeros are easily suppressed by detecting a prohibited length of ones or zeros, and flipping a bit in the string of ones or zeros. This method and system removes the violation of the ones or zeros bit string requirement by flipping a bit in the string, while the receiving side utilizes the error correction capability of the ECC/FEC to correct the inverted bit.
摘要翻译：本文公开了一种用于数字传输系统的纠错补偿补偿或零字符串抑制系统和方法。在利用误差控制编码（ECC）/前向纠错（FEC）的数字传输系统中，为了减少比特流中的比特错误的数量，通过检测1或0的禁止长度容易地抑制长串的1和0，翻转一个字符串的一个或零。该方法和系统通过翻转字符串中的位来消除对1或0位的比特串要求的违反，而接收侧利用ECC / FEC的纠错能力来校正反相位。

5. 发明申请

US20080186410A1 System and method for effectively implementing a charging base for a remote control device 失效
标题翻译：有效实施遥控装置的充电座的系统和方法
公开(公告)号：US20080186410A1
公开(公告)日：2008-08-07
申请号：US11701667
申请日：2007-02-02
申请人： Robert Hardacker , Christopher Read , Brant Candelore
发明人： Robert Hardacker , Christopher Read , Brant Candelore
IPC分类号： H04N5/44
CPC分类号： H04N5/63 , H04B1/202 , H04N21/4126 , H04N21/42207 , H04N21/4222 , H04N21/43637 , H04N21/6125 , H04N21/6175 , H04N2005/4425
摘要： A system and method for effectively implementing a charging base for a remote control includes a television device that is controlled by the remote control over a wireless RC-TV communications link. The charging base recharges a battery of the remote control when the remote control is docked to the charging base. In addition, the remote control may be docked to the charging base for bi-directionally communicating with the television and other external entities over a wireless base-TV communications link. Furthermore, various compatible peripheral devices may also recharge their batteries and bi-directionally communicate with the television and the external entities over the base-TV communications link while the peripheral devices are docked to the charging base.
摘要翻译：用于有效实现遥控器的充电基座的系统和方法包括由无线RC-TV通信链路进行遥控控制的电视设备。当遥控器对接到充电座时，充电座对遥控器的电池充电。此外，遥控器可以对接到充电基座，以通过无线基地电视通信链路与电视机和其他外部实体进行双向通信。此外，各种兼容的外围设备还可以对其电池进行充电，并且在外围设备对接到充电基座的同时，通过基础电视通信链路与电视机和外部实体进行双向通信。

6. 发明申请

US20060023673A1 System and method for dynamically determining retransmit buffer time 失效
标题翻译：用于动态确定重传缓冲时间的系统和方法
公开(公告)号：US20060023673A1
公开(公告)日：2006-02-02
申请号：US10903171
申请日：2004-07-30
申请人： Christopher Read
发明人： Christopher Read
IPC分类号： H04Q7/24
CPC分类号： H04L1/1835
摘要： A packetized data receiver establishes at the beginning of receiving each respective stream a buffer length for sending packets to higher levels of a protocol stack in the event that a packet is missed. This can be done by requesting retransmission of the first packet and measuring the actual time delay between request and receipt of the retransmitted packet.
摘要翻译：分组化数据接收机在接收每个相应流的开始处建立用于在丢失分组的情况下将分组发送到协议栈的较高级别的缓冲器长度。这可以通过请求重传第一分组并测量请求和接收重传的分组之间的实际时间延迟来完成。

7. 发明授权

US08300818B2 System and method for effectively protecting electronic content information 失效
标题翻译：有效保护电子内容信息的系统和方法
公开(公告)号：US08300818B2
公开(公告)日：2012-10-30
申请号：US11711381
申请日：2007-02-27
申请人： Christopher Read
发明人： Christopher Read
IPC分类号： G06F3/14 , G06F13/10
CPC分类号： G06F21/10
摘要： A system and method for effectively protecting electronic content information includes a channel setup module that coordinates a channel setup procedure to create a secure communications channel between a content drive and a display module. A source DRM module transmits a special content key from the content drive to the display module over the secure communications channel. A content playback module then initiates a content playback procedure for utilizing the electronic content. The source DRM module responsively encrypts the electronic content with the content key. The channel setup module and the content playback module are unable to access or utilize the content key. A destination DRM module then receives the electronic content over the secure communications channel and utilizes the content key to decrypt the electronic content.
摘要翻译：用于有效保护电子内容信息的系统和方法包括：信道建立模块，其协调信道建立过程以在内容驱动器和显示模块之间建立安全通信信道。源DRM模块通过安全通信信道将特殊内容密钥从内容驱动器发送到显示模块。内容回放模块然后启动用于利用电子内容的内容重放过程。源DRM模块用内容密钥对电子内容进行响应式加密。频道设置模块和内容播放模块不能访问或利用内容密钥。目的地DRM模块然后通过安全通信信道接收电子内容，并利用内容密钥对电子内容进行解密。

8. 发明申请

US20080205656A1 System and method for effectively protecting electronic content information 失效
标题翻译：有效保护电子内容信息的系统和方法
公开(公告)号：US20080205656A1
公开(公告)日：2008-08-28
申请号：US11711381
申请日：2007-02-27
申请人： Christopher Read
发明人： Christopher Read
IPC分类号： H04L9/00
CPC分类号： G06F21/10
摘要： A system and method for effectively protecting electronic content information includes a channel setup module that coordinates a channel setup procedure to create a secure communications channel between a content drive and a display module. A source DRM module transmits a special content key from the content drive to the display module over the secure communications channel. A content playback module then initiates a content playback procedure for utilizing the electronic content. The source DRM module responsively encrypts the electronic content with the content key. The channel setup module and the content playback module are unable to access or utilize the content key. A destination DRM module then receives the electronic content over the secure communications channel and utilizes the content key to decrypt the electronic content.
摘要翻译：用于有效保护电子内容信息的系统和方法包括：信道建立模块，其协调信道建立过程以在内容驱动器和显示模块之间建立安全通信信道。源DRM模块通过安全通信信道将特殊内容密钥从内容驱动器发送到显示模块。内容回放模块然后启动用于利用电子内容的内容重放过程。源DRM模块用内容密钥对电子内容进行响应式加密。频道设置模块和内容播放模块不能访问或利用内容密钥。目的地DRM模块然后通过安全通信信道接收电子内容，并利用内容密钥对电子内容进行解密。

9. 发明申请

US20080077771A1 Long Instruction Word Controlling Plural Independent Processor Operations 审中-公开
公开(公告)号：US20080077771A1
公开(公告)日：2008-03-27
申请号：US11930652
申请日：2007-10-31
申请人： Karl Guttag , Christopher Read , Keith Balmer
发明人： Karl Guttag , Christopher Read , Keith Balmer
IPC分类号： G06F9/30
CPC分类号： G06F7/53 , G06F7/57 , G06F9/30014 , G06F9/30032 , G06F9/30036 , G06F9/30145 , G06F9/30167 , G06F9/3851 , G06F9/3853 , G06F9/3867 , G06F9/3885 , G06F2207/382
摘要： This invention is a data processing apparatus which operates on instruction controlling plural processor actions. Each instruction includes a data unit section and a data transfer section. These instruction sections are independent and may include differing options. In the preferred embodiment, each instruction is 64 bits. The data unit section includes a data operation field that indicates the type of arithmetic logic unit operation and six operand fields. The six operand fields include four source data register fields and two destination register fields. The data unit (110) includes a multiplication unit (220) and an arithmetic logic unit (230). The data unit (110) may include a barrel rotator (235) for one input of the arithmetic logic unit (230). The rotated data may be stored in the first destination register instead of the multiply result. The address unit (120) operations according to the data transfer operation field. This could be a load, a store or a register to register move. Operations may be conditional based upon conditions stored in a status register (210). The status register (210) is set by a prior output of the arithmetic logic unit (230) and the instruction may specify some of the status bits protect from change. The address unit (120) preferably includes a plurality of base address registers (611), a full adder (615) and a left shifter (614). The full adder (615) may add an index as scaled by the left shifter to the base address or subtract the scaled index from the base address. The full adder (615) output may update the base address register (611), either before supply of the address or following supply of the address. The index may be recalled from an index register (612) or an immediate value. In the preferred embodiment of this invention, the data unit (110) including the data registers (200), the multiplication unit (220) and the arithmetic logic unit (230), the address unit (120) and the instruction decode logic (250, 660) are embodied in at least one digital image/graphics processor (71, 72, 73, 74) as a part of a multiprocessor (100) formed in a single integrated circuit used in image processing.

10. 发明申请

US20060268912A1 System and method for dynamically establishing PLL speed based on receive buffer data accumulation for streaming video 失效
标题翻译：基于用于流视频的接收缓冲器数据累积的动态建立PLL速度的系统和方法
公开(公告)号：US20060268912A1
公开(公告)日：2006-11-30
申请号：US11136199
申请日：2005-05-24
申请人： Christopher Read
发明人： Christopher Read
IPC分类号： H04L12/56 , H04L12/54
CPC分类号： H04N21/44004 , H04N21/4305 , H04N21/4325
摘要： The decode rate of an MPEG decoder of streaming video is set to a relatively slow value at the start of a stream to permit playing, albeit at relatively low speeds, of the video until such time as an appropriate number of packets are in a receive buffer, at which time the decode rate is speeded up to normal.
摘要翻译：流视频的MPEG解码器的解码速率在流的开始处设置为相对较慢的值，以允许视频播放，尽管速度相对较低，直到适当数量的分组在接收缓冲器中，此时解码速度加快到正常。

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