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1. 发明申请

WO2005101419A1 BIMODAL OPERATION OF FERRROELECTRIC AND ELECTRET MEMORY CELLS AND DEVICES 审中-公开
标题翻译：微电子和电子存储器电池和器件的双重操作
公开(公告)号：WO2005101419A1
公开(公告)日：2005-10-27
申请号：PCT/NO2005/000119
申请日：2005-04-12
申请人： THIN FILM ELECTRONICS ASA , GUDESEN, Hans, Gude , LEISTAD, Geirr, I. , ENGQUIST, Isak , GUSTAFSSON, Göran
发明人： GUDESEN, Hans, Gude , LEISTAD, Geirr, I. , ENGQUIST, Isak , GUSTAFSSON, Göran
IPC分类号： G11C11/22
CPC分类号： G11C11/22
摘要： In a method for enhancing the data storage capability of ferroelectric or electret memory cell which has been applied to storage of data and attained an imprint condition, suitable voltage pulses are used for evoking a temporary relaxation of the imprint condition into a volatile polarization state that can be discriminated from the imprinted polarization state in a non-destructive readout operation. Sequences of one or more voltage pulses are used to evoke readout signals respectively indicative of a non-volatile and a volatile polarization state of the memory cell, but without altering said polarization states. Imprinted memory cells can be overwritten to effect a temporary and volatile storage of data in a memory device in a ferroelectric or electret memory device by assigning a first logical value to imprinted memory cells and a second logical value by transferring selected to memory cells transferred into a relaxed volatile state, whereby the stored logical values can be discriminated by the detecting the difference in dynamic response of respectively imprinted and relaxed memory cells.
摘要翻译：在用于增强已经应用于数据存储和达到印记条件的铁电或驻极体存储单元的数据存储能力的方法中，使用适当的电压脉冲来引起压印条件的暂时放宽到易挥发的极化状态，在非破坏性读出操作中与印刻偏振状态区分开来。使用一个或多个电压脉冲的序列来唤起分别指示存储器单元的非易失性和易失性极化状态但不改变所述极化状态的读出信号。印刷的存储器单元可以被覆盖，以通过将所选择的第一逻辑值分配给压印存储器单元并将所转移的存储器单元传送到第二逻辑值来实现在铁电或驻极体存储器件中的存储器件中的数据的临时和易失性存储轻松的挥发性状态，由此可以通过检测分别压印和放松的存储单元的动态响应的差异来区分所存储的逻辑值。

2. 发明申请

WO2004025658A1 A METHOD FOR OPERATING A FERROELECTRIC OR ELECTRET MEMORY DEVICE, AND A DEVICE OF THIS KIND 审中-公开
标题翻译：一种用于操作电磁或电子存储器件的方法，以及该类型的器件
公开(公告)号：WO2004025658A1
公开(公告)日：2004-03-25
申请号：PCT/NO2003/000312
申请日：2003-09-10
申请人： THIN FILM ELECTRONICS ASA , GUDESEN, Hans, Gude , NORDAL, Per-Erik , LEISTAD, Geirr, I. , BRÖMS, Per , SANDSTRÖM, Per , JOHANSSON, Mats
发明人： GUDESEN, Hans, Gude , NORDAL, Per-Erik , LEISTAD, Geirr, I. , BRÖMS, Per , SANDSTRÖM, Per , JOHANSSON, Mats
IPC分类号： G11C11/22
CPC分类号： G11C11/22
摘要： In a method for operating a matrix-addressable ferroelectric or electret memory device a first plurality of voltage differences is applied across first and second sets of electrodes when data are read from the memory cells thereof and a second plurality of voltage differences is applied across the first and, second sets of electrodes in the case where data are refreshed or rewritten to the memory cells. In each case the first and second plurality of voltage differences correspond to sets of potential levels as predefined by a voltage pulse protocol comprising time sequences of voltage pulses. At least one parameter indicative of a change in a memory cell response is determined and used for determining at least one correction factor for the voltage pulses, whereby at least one pulse parameter thereof is adjusted in accordance with the at least one correction factor. The invention also relates to a ferroelectric or electret memory device for implementing the above method.
摘要翻译：在用于操作矩阵寻址铁电或驻极体存储器件的方法中，当从其存储器单元读取数据时，在第一组和第二组电极上施加第一组多个电压差，并且第二组电压差跨越第一以及在将数据刷新或重写到存储单元的情况下的第二组电极。在每种情况下，第一和第二多个电压差对应于由包括电压脉冲的时间序列的电压脉冲协议预定义的电位电平集合。确定表示存储器单元响应的变化的至少一个参数，并用于确定电压脉冲的至少一个校正因子，由此根据至少一个校正因子调整其至少一个脉冲参数。本发明还涉及用于实现上述方法的铁电或驻极体存储器件。

3. 发明申请

WO2003044801A1 A FERROELECTRIC OR ELECTRET MEMORY CIRCUIT 审中-公开
标题翻译：电磁或电子存储器电路
公开(公告)号：WO2003044801A1
公开(公告)日：2003-05-30
申请号：PCT/NO2002/000437
申请日：2002-11-22
申请人： THIN FILM ELECTRONICS ASA , GUDESEN, Hans, Gude , NORDAL, Per-Erik
发明人： GUDESEN, Hans, Gude , NORDAL, Per-Erik
IPC分类号： G11C11/22
CPC分类号： H01L27/101 , G11C11/22 , H01L27/11502
摘要： In a ferroelectric or electret memory circuit (C), particularly a ferroelectric or electret memory circuit with improved fatigue resistance, a ferroelectric or electret memory cell, preferably of polymer or oligomer memory material contacting first and second electrodes, at least one of the electrodes comprises at least one functional material capable of physical and/or chemical bulk incorporation of atomic or molecular species contained in the either electrode or the memory material and displaying a propensity for migrating in the form of mobile charged and/or neutral particles between an electrode and a memory material, something which can be detrimental to both. A functional material with the above-mentioned properties shall serve to offset any adverse effect of a migration of this kind, leading to an improvement in the fatigue resistance of the memory cell. Use in a matrix-addressable memory device where the memory cells are formed in distinct portions in a global layer of a ferroelectric or electret thin-film memory material, particularly a polymer material.
摘要翻译：在铁电或驻极体存储器电路（C）中，特别是具有改善的耐疲劳性的铁电或驻极体存储电路，优选与第一和第二电极接触的聚合物或低聚物记忆材料的铁电或驻极体存储单元，至少一个电极包括至少一种功能材料，其能够物理和/或化学地包含在电极或记忆材料中的原子或分子物质并显示在电极和电极之间以移动带电和/或中性粒子的形式迁移的倾向记忆材料，可能对两者都有害的东西。具有上述性能的功能材料应用于抵消这种迁移的任何不利影响，导致记忆单元的耐疲劳性的提高。在矩阵寻址存储器件中使用，其中存储器单元形成在铁电或驻极体薄膜存储器材料，特别是聚合物材料的全局层中的不同部分中。

4. 发明申请

WO2003021601A1 NON-VOLATILE MEMORY DEVICE 审中-公开
标题翻译：非易失性存储器件
公开(公告)号：WO2003021601A1
公开(公告)日：2003-03-13
申请号：PCT/NO2002/000299
申请日：2002-08-28
申请人： THIN FILM ELECTRONICS ASA , GUDESEN, Hans, Gude , NORDAL, Per-Erik
发明人： GUDESEN, Hans, Gude , NORDAL, Per-Erik
IPC分类号： G11C11/22
CPC分类号： H01L27/11502 , G11C11/22
摘要： In a non-volatile memory device (10) comprising an electrically polarizable dielectric memory material (11) with ferroelectric or electret properties and capable of exhibiting hysteresis and remanence, wherein the memory material (11) comprises one or more polymers, at least one of these polymers is a deuterated polymer.
摘要翻译：在非易失性存储器件（10）中，其包括具有铁电或驻极体特性且能够显示滞后和剩磁的电极化电介质存储材料（11），其中所述记忆材料（11）包括一种或多种聚合物，这些聚合物是氘代聚合物。

5. 发明申请

WO2005093870A1 AN ORGANIC ELECTRONIC DEVICE AND METHODS FOR MANUFACTURING A DEVICE OF THIS KIND 审中-公开
标题翻译：有机电子设备及其制造方法
公开(公告)号：WO2005093870A1
公开(公告)日：2005-10-06
申请号：PCT/NO2005/000101
申请日：2005-03-21
申请人： THIN FILM ELECTRONICS ASA , SANDBERG, Mats , NORDAL, Per-Erik , GRECZYNSKI, Grzegorz , JOHANSSON, Mats , CARLSEN, Per , GUDESEN, Hans, Gude , GUSTAFSSON, Göran , ANDERSSON, Linda
发明人： SANDBERG, Mats , NORDAL, Per-Erik , GRECZYNSKI, Grzegorz , JOHANSSON, Mats , CARLSEN, Per , GUDESEN, Hans, Gude , GUSTAFSSON, Göran , ANDERSSON, Linda
IPC分类号： H01L51/30
CPC分类号： G11C13/0014 , B82Y10/00 , G11C13/0016 , G11C2213/55 , H01L51/0025 , H01L51/0026 , H01L51/0034 , H01L51/0043 , H01L51/005
摘要： An organic electronic device consists of one or more electro-active organic or polymer materials sandwiched between electrodes. Critical in such devices is the interface between the electrode and the polymer, where degradation or chemical reaction products may develop that are deleterious to the proper functioning of the device. This is solved by introducing a functional interlayer composed of one or more materials consisting of a molecular backbone bearing phosphonate or phosphate functions, either directly attached or through side chains, said functional layer being disposed between at least one of the respective electrodes and said one or more electro-active materials in the device.
摘要翻译：有机电子器件由夹在电极之间的一种或多种电活性有机或聚合物材料组成。在这种装置中的关键是电极和聚合物之间的界面，其中可能产生对装置的正常功能有害的降解或化学反应产物。这通过引入由一种或多种由含有膦酸酯或磷酸酯官能团的分子骨架组成的材料构成的功能性夹层来解决，直接连接或通过侧链，所述功能层设置在至少一个相应的电极之间，更多的电活性材料在设备中。

6. 发明申请

WO2003075279A1 A MEMORY CELL 审中-公开
标题翻译：内存单元
公开(公告)号：WO2003075279A1
公开(公告)日：2003-09-12
申请号：PCT/NO2003/000052
申请日：2003-02-11
申请人： THIN FILM ELECTRONICS ASA , GUDESEN, Hans, Gude , NORDAL, Per-Erik
发明人： GUDESEN, Hans, Gude , NORDAL, Per-Erik
IPC分类号： G11C11/22
CPC分类号： H01L29/8615 , B82Y10/00 , G11C11/22 , H01L27/11502
摘要： In a ferroelectret or electret memory cell a polymeric memory material is a blend of two or more ploymeric materials, the polymeric material being provided contacting first and second electrodes. Each electrode is a composite multilayer comprising a first highly conducting layer and a conducting polymer layer, the latter forming a contact between the former and the memory material.
摘要翻译：在铁电或驻极体记忆单元中，聚合物记忆材料是两种或更多种聚合物材料的混合物，所述聚合材料与第一和第二电极接触。每个电极是包含第一高导电层和导电聚合物层的复合多层，后者形成前者和记忆材料之间的接触。

7. 发明申请

WO2003050814A1 A MATRIX-ADDRESSABLE ARRAY OF INTEGRATED TRANSISTOR/MEMORY STRUCTURES 审中-公开
标题翻译：集成晶体管/存储器结构的矩阵可寻址阵列
公开(公告)号：WO2003050814A1
公开(公告)日：2003-06-19
申请号：PCT/NO2002/000426
申请日：2002-11-18
申请人： THIN FILM ELECTRONICS ASA , GUDESEN, Hans, Gude
发明人： GUDESEN, Hans, Gude
IPC分类号： G11C11/00
CPC分类号： H01L27/092 , H01L21/823807 , H01L21/823828
摘要： comprises one or more layers (1) of semiconducting material, two or more electrode layers, and memory material (11) contacting electrodes (2,6, 10) in the latter. At least one layer of a semiconducting material and two electrode layers form transistor structures such that the electrodes of the first electrode layer forms source/drain electrode pairs and those of a second electrode layer form the gate electrodes thereof. The source and drain electrodes (2;6) of a single transistor/memory structure are separated by a narrow recess (3) extending down to the semiconducting (1) layer wherein the transistor channel (8) is provided beneath the recess and with extremely small width, while the source and drain regions are provided beneath the respective source and drain electrodes (2;6) on either side of the transistor channel(8). Memory material (11) is provided in the recess (3) and contacts the electrodes (2,6,10) of the transistor. This arrangement defines the transistor channel (8) with a length L corresponding to the width of the recess (3) and a width W corresponding to the width of the gate electrode (10), L being a fraction of W, and three memory cells in the memory material (11) formed respectively between the source electrode (2) and the gate electrode (10), the drain electrode (6) and the gate electrode (10) and in the recess between the source and drain electrodes (2;6).
摘要翻译：包括一个或多个半导体材料层（1），两个或更多个电极层以及与之相接触的电极（2,6,10）的记忆材料（11）。至少一层半导体材料和两个电极层形成晶体管结构，使得第一电极层的电极形成源/漏电极对，而第二电极层的电极形成其栅电极。单个晶体管/存储器结构的源极和漏极（2; 6）由向下延伸到半导体（1）层的窄凹槽（3）分开，其中晶体管沟道（8）设置在凹槽下方，而源极和漏极区域设置在晶体管沟道（8）的任一侧上的相应源极和漏极（2; 6）的下方。存储器材料（11）设置在凹部（3）中并与晶体管的电极（2,6,10）接触。这种布置限定了具有对应于凹部（3）的宽度的长度L和对应于栅电极（10）的宽度的宽度W的晶体管沟道（8），L是W的一部分，以及三个存储单元在源电极（2）和栅电极（10）之间形成的存储材料（11）中，漏电极（6）和栅电极（10）以及源电极和漏电极（2; 6）。

8. 发明申请

WO2006009461A1 AN ORGANIC FERROELECTRIC OR ELECTRET MEMORY CIRCUIT AND A METHOD FOR MAKING SAME 审中-公开
标题翻译：有机电磁或电子存储器电路及其制造方法
公开(公告)号：WO2006009461A1
公开(公告)日：2006-01-26
申请号：PCT/NO2005/000267
申请日：2005-07-18
申请人： THIN FILM ELECTRONICS ASA , LILJEDHAL, Rickard , SANDBERG, Mats , GUSTAFSSON, Göran , GUDESEN, Hans, Gude
发明人： LILJEDHAL, Rickard , SANDBERG, Mats , GUSTAFSSON, Göran , GUDESEN, Hans, Gude
IPC分类号： G11C11/22
CPC分类号： G11C11/22 , B82Y10/00
摘要： In an organic electronic circuit (C), particularly a memory circuit with an organic ferroelectric or electret material (2) the active material comprises fluorine atoms and consists of various organic materials. The active material is located between a first electrode and a second electrode. A cell with a capacitor-like structure is defined in the active material and can be accessed for an addressing operation via a first and a second electrode. At least one of these electrodes (1 a, 1 b) comprises a layer of chemically modified gold. In a passive matrix-addressable electronic device, particularly a ferroelectric or electret memory device, circuits (C) of this kind with the active material as a ferroelectric or electret memory material form the elements of a matrix-addressable array and define the memory cells provided between first and second set of addressing electrodes. At least the electrodes of at least one of the sets then comprise at least a layer of gold. A method in the fabrication of the organic electronic circuit (C) the method comprises steps for depositing a layer of gold as at least one layer of at least one electrode and treating an exposed surface of this layer chemically, whereafter the layer of active material can be deposited on the top of the processed surface of this electrode.
摘要翻译：在有机电子电路（C）中，特别是具有有机铁电或驻极体材料的存储电路（2），活性材料包含氟原子并由各种有机材料组成。活性材料位于第一电极和第二电极之间。具有电容器状结构的电池被限定在活性材料中，并且可以经由第一和第二电极进行寻址操作。这些电极（1a，1b）中的至少一个包括化学改性金层。在无源矩阵寻址电子器件中，特别是铁电或驻极体存储器件中，具有作为铁电或驻极体存储器材料的活性材料的这种电路（C）形成矩阵寻址阵列的元件，并且限定提供的存储器单元在第一和第二组寻址电极之间。至少所述组中的至少一个的电极至少包括一层金。有机电子电路（C）的制造方法包括以下步骤：将金层沉积为至少一层至少一个电极，并化学处理该层的暴露表面，此后活性材料层可以沉积在该电极的被处理表面的顶部。

9. 发明申请

WO2006004421A1 OPERATING TEMPERATURE OPTIMIZATION IN A FERROELECTRIC OR ELECTRET MEMORY 审中-公开
标题翻译：在电磁或电气存储器中操作温度优化
公开(公告)号：WO2006004421A1
公开(公告)日：2006-01-12
申请号：PCT/NO2005/000238
申请日：2005-06-29
申请人： THIN FILM ELECTRONICS ASA , NORDAL, Per-Erik , LEISTAD, Geirr, I. , BRÖMS, Per , GUDESEN, Hans, Gude
发明人： NORDAL, Per-Erik , LEISTAD, Geirr, I. , BRÖMS, Per , GUDESEN, Hans, Gude
IPC分类号： H01L23/34
CPC分类号： G11C29/021 , G11C11/22 , G11C29/02 , G11C29/028 , G11C2029/5002
摘要： In a heating and temperature control system for a data storage apparatus comprising at least one matrix-addressable ferroelectric or electret memory device, Joule heating means are provided in the memory device, a temperature determining means is connected with controller circuitry and the controller circuitry is connected with an external power supply, which controlled by the former powers the Joule heating means to achieve a selected operating temperature. In a method for operating the heating and temperature control system an ambient or instant temperature of the memory device is determined and compared with the set nominal optimal temperature, and the difference between these temperatures is used in a predefined algorithm for establishing control parameters for the application of power to the Joule heating means to achieve the selected operating temperature in the memory device during an addressing operation thereto.
摘要翻译：在包括至少一个可矩阵寻址的铁电或驻极体存储装置的数据存储装置的加热和温度控制系统中，在存储装置中提供焦耳加热装置，温度确定装置与控制器电路连接，并且控制器电路被连接具有外部电源，由前者的焦炭控制，焦耳加热意味着实现选定的工作温度。在用于操作加热和温度控制系统的方法中，确定存储器件的环境温度或即时温度并将其与设定的标称最佳温度进行比较，并且在用于建立应用的控制参数的预定义算法中使用这些温度之间的差异的焦耳加热装置的功率，以在其寻址操作期间实现存储装置中的选定的工作温度。

10. 发明申请

WO2003052762A1 APPARATUS AND METHOD FOR NON-DESTRUCTIVE DATA STORAGE AND RETRIEVAL 审中-公开
标题翻译：非破坏性数据存储和检索的装置和方法
公开(公告)号：WO2003052762A1
公开(公告)日：2003-06-26
申请号：PCT/NO2002/000476
申请日：2002-12-12
申请人： THIN FILM ELECTRONICS ASA , GUDESEN, Hans, Gude , NORDAL, Per-Erik
发明人： GUDESEN, Hans, Gude , NORDAL, Per-Erik
IPC分类号： G11C5/02
CPC分类号： G11C11/22
摘要： In a data storage apparatus comprising means for storing and retrieving data in respective write and read operations, and first and second set of addressing electrodes are provided, the latter set having electrodes that preferably are oriented orthogonally to the electrodes of the first set, and the electrodes ( b , c ) of the second set are provided as parallel twin electrodes located in parallel recesses or trenches (3) in the electrodes of the first set. The trenches compris a soft ferroelectric or electret memory material with piezoelectric properties such that memory cells (1) with two subcells (α¿1?, α¿2?) are formed in the trench (3) respectively between the electrodes ( a ) of the first set and the parallel twin electrodes ( b , c ) on either side of the latter. In a write operation data are encoded in the memory cells (1) by means of an applied voltage potential over the subcells (α¿1?, α¿2?). In a non-destructive readout operation of data encoded and stored in the memory cells (1) in this manner, the piezoelectric properties of the memory material (2) is employed for eliciting response signals from the subcells (α¿1?, α¿2?) of a memory cell (1) when the former are subjected to mechanical stresses in the lateral direction, such that the logical value stored in the memory cell (1) can be determined.
摘要翻译：在一种数据存储装置中，包括用于在各自的写入和读取操作中存储和检索数据的装置，并且提供了第一和第二组寻址电极，后者组具有优选地与第一组电极正交定向的电极，第二组的电极b，c设置为平行的双电极，位于第一组的电极中的平行的凹槽或沟槽3中。沟槽包括具有压电特性的软铁电或驻极体记忆材料，使得具有两个子电池α1，α2，分别形成在第一组的电极a和后者的两侧的平行的双电极b，c之间的沟槽3中。在写入操作中，通过在子单元α1，α2上施加的电压电位将数据编码在存储器单元1中。在以这种方式编码和存储在存储单元1中的数据的非破坏性读出操作中，采用存储材料2的压电特性来引出来自子单元α1，α2，当前者在横向受到机械应力时，可以确定存储在存储单元1中的逻辑值。

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