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1. 发明授权

US5202284A Selective and non-selective deposition of Si.sub.1-x Ge.sub.x on a Si subsrate that is partially masked with SiO.sub.2 失效
标题翻译： SI1-XGEX的选择性和非选择性沉积在部分被SIO2掩蔽的SI
公开(公告)号：US5202284A
公开(公告)日：1993-04-13
申请号：US444464
申请日：1989-12-01
申请人： Theodore I. Kamins , David B. Noble , Judy L. Hoyt , James F. Gibbons , Martin P. Scott
发明人： Theodore I. Kamins , David B. Noble , Judy L. Hoyt , James F. Gibbons , Martin P. Scott
IPC分类号： H01L21/205 , H01L21/20
CPC分类号： H01L21/02381 , H01L21/02395 , H01L21/02532 , H01L21/0262 , H01L21/02639 , Y10S148/026 , Y10S438/942
摘要： Several methods are disclosed for minimizing the number of defects or misfit locations in a SiGe layer selectively or non-selectively deposited on a partially oxide masked Si substrate.

2. 发明授权

US5256550A Fabricating a semiconductor device with strained Si.sub.1-x Ge.sub.x layer 失效
标题翻译：制造具有应变Si1-xGex层的半导体器件
公开(公告)号：US5256550A
公开(公告)日：1993-10-26
申请号：US715054
申请日：1991-06-12
申请人： Stephen Laderman , Martin Scott , Theodore I. Kamins , Judy L. Hoyt , Clifford A. King , James F. Gibbons , David B. Noble
发明人： Stephen Laderman , Martin Scott , Theodore I. Kamins , Judy L. Hoyt , Clifford A. King , James F. Gibbons , David B. Noble
IPC分类号： H01L21/20 , H01L21/205
CPC分类号： H01L21/0262 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/02631 , Y10S148/015 , Y10S438/902 , Y10S438/938
摘要： The present invention comprises a method of fabricating devices and circuits employing at least one heteroepitaxial layer under strain. The thickness of the heteroepitaxial layer is more than two times the calculated equilibrium critical thickness for an uncapped heteroepitaxial layer upon a crystalline substrate, based on previously known equilibrium theory for the uncapped layer. Subsequent to growth of the heteroepitaxial layer, the structure is processed at temperatures higher than the growth temperature of the heteroepitaxial layer.The strained heteroepitaxial layer (second layer) is epitaxially grown upon the surface of a first, underlaying crystalline layer, creating a heterojunction. Subsequently a third crystalline layer is deposited or grown upon the major exposed surface of the second, strained heteroepitaxial layer. The preferred manner of growth of the third crystalline layer is epitaxial growth. The composition of the third crystalline layer must be such that upon deposition or growth, the third layer substantially continuously binds to the heteroepitaxial structure of the second layer. Subsequent to growth of the at least three layer structure, the structure is processed at temperatures in excess of the growth temperature of the second heteroepitaxial layer. Presence of the third crystalline layer prevents the generation of a substantial amount of misfit dislocations between the first crystalline layer substrate and the second heteroepitaxial layer.
摘要翻译：本发明包括一种在应变下使用至少一个异质外延层的器件和电路的制造方法。基于先前已知的无盖层的平衡理论，异质外延层的厚度超过了在结晶衬底上的无盖异质外延层的计算的平衡临界厚度的两倍。在异质外延层的生长之后，在高于异质外延层的生长温度的温度下处理该结构。应变异质外延层（第二层）在第一底层晶体层的表面上外延生长，产生异质结。随后，在第二应变异质外延层的主要暴露表面上沉积或生长第三晶体层。第三晶体层的优选生长方式是外延生长。第三结晶层的组成必须使得在沉积或生长时，第三层基本上连续地结合到第二层的异质外延结构。在至少三层结构生长之后，在超过第二异质外延层的生长温度的温度下处理该结构。第三结晶层的存在防止在第一晶体层衬底和第二异质外延层之间产生大量的失配位错。

3. 发明授权

US5084411A Semiconductor processing with silicon cap over Si.sub.1-x Ge.sub.x Film 失效
标题翻译：半导体处理与Si1-xGex薄膜上的硅帽
公开(公告)号：US5084411A
公开(公告)日：1992-01-28
申请号：US277593
申请日：1988-11-29
申请人： Stephen Laderman , Martin Scott , Theodore I. Kamins , Judy L. Hoyt , Clifford A. King , James F. Gibbons , David B. Noble
发明人： Stephen Laderman , Martin Scott , Theodore I. Kamins , Judy L. Hoyt , Clifford A. King , James F. Gibbons , David B. Noble
IPC分类号： H01L21/20 , H01L21/205
CPC分类号： H01L21/02532 , H01L21/02381 , H01L21/0245 , H01L21/0262 , Y10S148/015 , Y10S438/902
摘要： Improved devices with silicon to SiGe alloy heterojunctions are provided for in accordance with the following discoveries. X-ray topography and transmission electron microscopy were used to quantify misfit-dislocation spacings in as-grown Si.sub.1-x Ge.sub.x films formed by Limited Reaction Processing (LRP), which is a chemical vapor deposition technique. These analysis techniques were also used to study dislocation formation during annealing of material grown by both LRP and by molecular beam epitaxy (MBE). The thickness at which misfit dislocations first appear in as-grown material was similar for both growth techniques. The thermal stability of capped and uncapped films was also investigated after rapid thermal annealing in the range of 625.degree. to 1000.degree. C. Significantly fewer misfit dislocations were observed in samples containing an epitaxial silicon cap. Some differences in the number of misfit dislocations generated in CVD and MBE films were observed after annealing uncapped layers at temperatures between 625.degree. and 825.degree. C.
摘要翻译：根据以下发现提供了具有硅到SiGe合金异质结的改进的器件。使用X射线形貌和透射电子显微镜来定量由作为化学气相沉积技术的限制反应处理（LRP）形成的生长的Si1-xGex膜中的失配位错间隔。这些分析技术也用于研究在通过LRP和分子束外延（MBE）生长的材料退火期间的位错形成。失配位错首先出现在生长材料中的厚度对于两种生长技术是相似的。在625℃至1000℃的范围内快速热退火后，还研究了封盖和未封装的膜的热稳定性。在含有外延硅帽的样品中观察到不合适的位错显着更少。在625°和825℃之间的温度下退火未封层后，观察到在CVD和MBE膜中产生的失配位错数量的一些差异。

4. 发明授权

US5177025A Method of fabricating an ultra-thin active region for high speed semiconductor devices 失效
标题翻译：制造用于高速半导体器件的超薄有源区的方法
公开(公告)号：US5177025A
公开(公告)日：1993-01-05
申请号：US825524
申请日：1992-01-24
申请人： John E. Turner , Theodore I. Kamins , Martin P. Scott , Yvonne H. Keller
发明人： John E. Turner , Theodore I. Kamins , Martin P. Scott , Yvonne H. Keller
IPC分类号： H01L29/73 , H01L21/22 , H01L21/285 , H01L21/331 , H01L21/74 , H01L29/161 , H01L29/737
CPC分类号： H01L29/66242 , H01L21/2205 , H01L21/28525 , H01L21/743 , H01L29/161 , Y10S148/041 , Y10S438/914 , Y10S438/936
摘要： A method of fabricating a semiconductor device to retard diffusion of a dopant from a center active region into adjacent regions. The center active region is epitaxially formed by selectively increasing and decreasing an introduction of diffusion-suppressing material, preferably germanium, into a semiconductor material, preferably silicon, so that a vertical profile of the content of the diffusion-suppressing material is such that outdiffusion of a dopant is minimized. One embodiment of the tailoring is to increase the concentration of the diffusion-suppressing material at both of the opposed sides of a base region of a bipolar transistor, thereby providing concentration peaks at the interfaces of the base region with collector and emitter regions. The concentration of germanium in a Si.sub.1-x Ge.sub.x layer is such that the value x is within the range 0.08 to 0.35 and optimally within the range 0.15 to 0.31. The dopant, preferably boron, also has a tailored concentration profile to minimize outdiffusion. A thinner, more highly doped active region is thereby achieved.

5. 发明授权

US08787064B2 Programmable bipolar electronic device 有权
标题翻译：可编程双极电子器件
公开(公告)号：US08787064B2
公开(公告)日：2014-07-22
申请号：US13130805
申请日：2009-01-13
申请人： Theodore I. Kamins , R. Stanley Williams
发明人： Theodore I. Kamins , R. Stanley Williams
IPC分类号： G11C11/00
CPC分类号： G11C13/0002 , G11C13/003 , G11C2213/52 , G11C2213/53 , H01L27/101 , H01L27/1026 , H01L45/08 , H01L45/1206 , H01L45/122 , H01L45/14 , H01L45/145 , H01L45/146 , H01L45/147
摘要： A configurable memristive device (300) for regulating an electrical signal includes a memristive matrix (350) containing a first dopant species; emitter (320), collector (310), and a base electrodes (330, 340) which are in contact with the memristive matrix (350); and a mobile dopant species contained within a central region (360) contiguous with the base electrodes (330, 340), the mobile dopant species moving within the memristive matrix (350) in response to a programming electrical field. A method of configuring and using a memristive device (300) includes: applying a programming electrical field across a memristive matrix (350) such that a mobile dopant species creates a central doped region (360) which bisects the memristive matrix (350); and applying a control voltage to the central doped region (360) to regulate current flow between an emitter electrode (320) and a collector electrode (310).
摘要翻译：用于调节电信号的可配置忆阻装置（300）包括含有第一掺杂剂物质的忆阻矩阵（350）发射极（320），集电极（310）以及与所述忆阻矩阵（350）接触的基极（330,340）; 以及包含在与所述基极（330,340）相邻的中心区域（360）内的移动掺杂剂物质，所述移动掺杂剂物质响应于编程电场在所述忆阻矩阵（350）内移动。一种配置和使用忆阻器件（300）的方法包括：跨越忆阻矩阵（350）施加编程电场，使得移动掺杂物物质形成将所述忆阻矩阵（350）平分的中心掺杂区域（360）; 以及向所述中心掺杂区域（360）施加控制电压以调节发射极电极（320）和集电极电极（310）之间的电流。

6. 发明授权

US08569900B2 Nanowire sensor with angled segments that are differently functionalized 有权
标题翻译：具有不同功能化角度段的纳米线传感器
公开(公告)号：US08569900B2
公开(公告)日：2013-10-29
申请号：US13383183
申请日：2009-07-20
申请人： Nathaniel J. Quitoriano , Theodore I. Kamins , Hans S. Cho
发明人： Nathaniel J. Quitoriano , Theodore I. Kamins , Hans S. Cho
IPC分类号： H01L23/58
CPC分类号： B81B1/00 , B81B2201/0214
摘要： A nanowire device includes a nanowire having differently functionalized segments. Each of the segments is configured to interact with a species to modulate the conductance of a segment. The nanowire is grown from a single catalyst and the segments include a first segment at a non-linear angle from a second segment.
摘要翻译：纳米线器件包括具有不同功能化片段的纳米线。每个片段被配置为与物种相互作用以调节片段的电导。纳米线从单个催化剂生长，并且所述段包括与第二段非线性角度的第一段。

7. 发明授权

US08223331B2 Signal-amplification device for surface enhanced raman spectroscopy 失效
标题翻译：用于表面增强拉曼光谱的信号放大装置
公开(公告)号：US08223331B2
公开(公告)日：2012-07-17
申请号：US12487940
申请日：2009-06-19
申请人： Alexandre M. Bratkovski , Theodore I. Kamins
发明人： Alexandre M. Bratkovski , Theodore I. Kamins
IPC分类号： G01J3/44
CPC分类号： G01N21/658
摘要： A signal-amplification device for surface enhanced Raman spectroscopy (SERS). The signal-amplification device includes a non-SERS-active (NSA) substrate, a plurality of multi-tiered non-SERS-active nanowire (MNSANW) structures and a plurality of metallic SERS-active nanoparticles. In addition, a MNSANW structure of the plurality of MNSANW structures includes a main arm of a plurality of main arms and a plurality of arms of at least secondary order. The plurality of main arms is disposed on the NSA substrate; and, a secondary arm of the plurality of arms is disposed on the main arm. Moreover, a metallic SERS-active nanoparticle of the plurality of metallic SERS-active nanoparticles is disposed on a surface of the MNSANW structure.
摘要翻译：用于表面增强拉曼光谱（SERS）的信号放大装置。信号放大装置包括非SERS活性（NSA）衬底，多个多层非SERS活性纳米线（MNSANW）结构和多个金属SERS活性纳米颗粒。此外，多个MNSANW结构的MNSANW结构包括多个主臂的主臂和至少二次的多个臂。多个主臂设置在NSA基板上; 并且所述多个臂的次臂设置在所述主臂上。此外，多个金属SERS活性纳米颗粒的金属SERS活性纳米颗粒设置在MNSANW结构的表面上。

8. 发明申请

US20120145988A1 Nanoscale Apparatus and Sensor With Nanoshell and Method of Making Same 审中-公开
标题翻译：纳米尺度仪器和传感器及其制作方法
公开(公告)号：US20120145988A1
公开(公告)日：2012-06-14
申请号：US13146880
申请日：2009-01-29
申请人： Nathaniel J. Quitoriano , Theodore I. Kamins
发明人： Nathaniel J. Quitoriano , Theodore I. Kamins
IPC分类号： H01L29/06 , H01L21/20 , B82Y99/00 , B82Y40/00
CPC分类号： B81C1/0015 , B81B2203/0118 , B81B2203/0361
摘要： A nanoscale apparatus (100) includes a nanoshell (110) extending from a substrate (102) and an epitaxial connection (120) between the substrate and an end (112) of the nanoshell adjacent to the substrate. A nanoscale sensor (200) includes surfaces (204, 206) extending relatively perpendicular to each other, a nanoshell (210) extending from one of the surfaces, and a detector (220) that monitors motion of the nanoshell relative to another of the surfaces spaced from the nanoshell by a gap (208). A method (300) of making a nanoscale apparatus includes growing (310) a nanowire on a surface; forming (320) a core-shell composite nanostructure; exposing (330) an end of the nanowire opposite to the surface with a FIB; and removing (340) the nanowire core from the exposed end, such that a nanoshell having a hollow region is attached to the surface. A material of the nanoshell (110, 210) excludes sp2-bonded carbon materials.
摘要翻译：纳米尺度装置（100）包括从衬底（102）延伸的纳米壳（110）和衬底之间的外延连接（120）和与衬底相邻的纳米壳的端部（112）。纳米尺度传感器（200）包括彼此相对垂直延伸的表面（204,206），从其中一个表面延伸的纳米壳（210）以及监测纳米壳相对于另一表面的运动的检测器（220）与纳米壳间隔开间隙（208）。制造纳米级装置的方法（300）包括在表面上生长（310）纳米线; 形成（320）核 - 壳复合纳米结构; 用FIB将（330）与该表面相对的纳米线的一端暴露（330）以及从所述暴露端去除（340）所述纳米线芯，使得具有中空区域的纳米壳附接到所述表面。纳米壳（110,210）的材料不包括sp2结合的碳材料。

9. 发明授权

US08198706B2 Multi-level nanowire structure and method of making the same 有权
标题翻译：多层纳米线结构及制作方法
公开(公告)号：US08198706B2
公开(公告)日：2012-06-12
申请号：US12243853
申请日：2008-10-01
申请人： Theodore I. Kamins , Nathaniel Quitoriano
发明人： Theodore I. Kamins , Nathaniel Quitoriano
IPC分类号： H01L29/04 , H01L21/20
CPC分类号： H01L29/0665 , B82Y10/00 , H01L21/0237 , H01L21/02433 , H01L21/02521 , H01L21/02573 , H01L21/02603 , H01L21/02609 , H01L21/02645 , H01L21/02653 , H01L29/0673 , H01L29/0676 , H01L31/035281 , H01L31/03529 , Y02E10/50 , Y10S977/762 , Y10S977/778 , Y10S977/813
摘要： A method for making a multi-level nanowire structure includes establishing a first plurality of nanowires on a substrate surface, wherein at least some of the nanowires are i) aligned at a predetermined crystallographically defined angle with respect to the substrate surface, ii) aligned substantially perpendicular with respect to the substrate surface, or iii) combinations of i and ii. An insulating layer is established between the nanowires of the first plurality such that one of two opposed ends of at least some of the nanowires positioned i) at the predetermined crystallographically defined angle, ii) substantially perpendicular with respect to the substrate surface, or iii) combinations of i and ii is exposed. Regions are grown from each of the exposed ends, and such regions coalesce to form a substantially continuous layer on the insulating layer. A second plurality of nanowires is established on the substantially continuous layer.
摘要翻译：制造多层纳米线结构的方法包括在衬底表面上建立第一多个纳米线，其中至少一些纳米线是i）相对于衬底表面以预定的晶体学限定的角度排列，ii）基本上对准垂直于衬底表面，或iii）i和ii的组合。在第一多个纳米线之间建立绝缘层，使得至少一些纳米线的两个相对端中的一个位于i）处于预定的晶体学限定的角度，ii）相对于衬底表面基本垂直，或iii） i和ii的组合被暴露。区域从每个暴露端生长，并且这些区域聚结以在绝缘层上形成基本上连续的层。在基本连续的层上建立第二多个纳米线。

10. 发明授权

US08053982B2 Light-emitting diodes with carrier extraction electrodes 有权
标题翻译：具有载体提取电极的发光二极管
公开(公告)号：US08053982B2
公开(公告)日：2011-11-08
申请号：US12243117
申请日：2008-10-01
申请人： Alexandre Bratkovski , Shih-Yuan Wang , Michael Tan , Theodore I. Kamins
发明人： Alexandre Bratkovski , Shih-Yuan Wang , Michael Tan , Theodore I. Kamins
IPC分类号： H01J1/62 , H01L27/15
CPC分类号： H01L33/0037 , H01L33/20 , H01L33/385 , H05B33/0818 , H05B33/0821 , H05B37/0272
摘要： One embodiment of the present invention relates to a light-emitting diode having one or more light-emitting layers, a pair of electrodes disposed on the light-emitting diode so that an operating voltage can be applied to generate light from the one or more light-emitting layers, and at least one external electrode in electronic communication with the one or more light-emitting layers. Applying an appropriate voltage to the at least one external electrodes at about the time the operating voltage is terminated extracts excess electrons from the one or more light-emitting layers and reduces the duration of electron-hole recombination during the time period over which the operating voltage is turned off.
摘要翻译：本发明的一个实施例涉及具有一个或多个发光层的发光二极管，设置在发光二极管上的一对电极，使得可以施加工作电压以产生来自一个或多个光的光以及与所述一个或多个发光层电连通的至少一个外部电极。大约在工作电压终止时将适当的电压施加到至少一个外部电极，从一个或多个发光层提取出多余的电子，并减少在工作电压的时间段内的电子 - 空穴复合的持续时间已关闭

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