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    • 6. 发明申请
    • Fabrication Methodology For Optoelectronic Integrated Circuits
    • 光电集成电路制造方法
    • US20160365475A1
    • 2016-12-15
    • US14736421
    • 2015-06-11
    • Opel Solar, Inc.The University of Connecticut
    • Geoff W. Taylor
    • H01L33/00H01L33/04H01L33/02
    • H01L29/66462H01L33/0025H01L33/0041H01L33/0062H01L33/0075H01L33/025H01L33/04H01L33/06H01L33/10
    • A method of forming an integrated circuit employs a plurality of layers formed on a substrate including i) n-type modulation doped quantum well structure (MDQWS) structure with n-type charge sheet, ii) p-type MDQWS, iii) undoped spacer layer formed on the n-type charge sheet, iv) p-type layer(s) formed on the undoped spacer layer, v) p-type etch stop layer formed on the p-type layer(s) of iv), and vi) p-type layers (including p-type ohmic contact layer(s)) formed on the p-type etch stop layer. An etch operation removes the p-type layers of vi) for a gate region of an n-channel HFET with an etchant that automatically stops at the p-type etch stop layer. Another etch operation removes the p-type etch stop layer to form a mesa at the p-type layer(s) of iv) which defines an interface to the gate region of the n-channel HFET, and a gate electrode is formed on such mesa.
    • 一种形成集成电路的方法采用在基板上形成的多个层,其包括i)具有n型电荷薄膜的n型调制掺杂量子阱结构(MDQWS)结构,ii)p型MDQWS,iii)未掺杂间隔层 形成在n型电荷片上,iv)形成在未掺杂的间隔层上的p型层,v)形成在iv)的p型层上的p型蚀刻停止层,以及vi) 形成在p型蚀刻停止层上的p型层(包括p型欧姆接触层)。 蚀刻操作移除具有在p型蚀刻停止层处自动停止的蚀刻剂的n沟道HFET的栅极区域的vi的p型层。 另一蚀刻操作移除p型蚀刻停止层,以在限定与n沟道HFET的栅极区域的界面的iv)的p型层上形成台面,并且在其上形成栅极电极 台面。
    • 10. 发明授权
    • Optical phase detector for an optical phase lock loop
    • 用于光锁相环的光相位检测器
    • US09553715B2
    • 2017-01-24
    • US14579066
    • 2014-12-22
    • Opel Solar, Inc.The University of Connecticut
    • Geoff W. Taylor
    • H04B10/00H04L7/00H04L7/033H04B10/2575
    • H04L7/0075H04B10/2575H04B10/5161H04B10/541H04B10/5561H04B10/613H04L7/0331
    • An optical phase detector circuit is provided that is suitable for use in an optical phase lock loop. The optical phase detector includes a first optical flip-flop circuit configured to produce a first digital output based on ON/OFF state of a first digital optical input and a digital electrical control signal. A second optical flip-flop circuit is configured to produce a second digital output based on ON/OFF state of a second digital optical input and the digital electrical control signal. An AND gate is operably coupled to both the first and second optical flip-flops. The AND gate produces the digital electrical control signal for supply to the first and second optical flip-flop circuits according to an AND function of the first and second digital outputs produced by the first and second optical flip-flop circuits.
    • 提供了一种适用于光锁相环的光相位检测电路。 光学相位检测器包括:第一光学触发器电路,被配置为基于第一数字光学输入和数字电气控制信号的ON / OFF状态产生第一数字输出。 第二光学触发器电路被配置为基于第二数字光输入和数字电控信号的ON / OFF状态产生第二数字输出。 与门可操作地耦合到第一和第二光学触发器两者。 根据第一和第二光触发器电路产生的第一和第二数字输出的与功能,与门产生数字电控信号,以提供给第一和第二光触发器电路。