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    • 10. 发明申请
    • METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
    • 制造半导体器件的方法
    • US20120289005A1
    • 2012-11-15
    • US13466480
    • 2012-05-08
    • Tetsuhiro TANAKAShinya SASAGAWA
    • Tetsuhiro TANAKAShinya SASAGAWA
    • H01L21/336H01L21/20
    • H01L29/78696H01L21/02164H01L21/02211H01L21/02216H01L21/02274H01L29/04H01L29/66765H01L29/78648H01L29/78672H01L29/788
    • A thin film transistor having low off-state current and excellent electrical characteristics can be manufactured. In an inverted staggered thin film transistor including a semiconductor film in which at least a microcrystalline semiconductor region and an amorphous semiconductor region are stacked, a conductive film and an etching protective film are stacked over the semiconductor film; a mask is formed over the etching protective film; first etching treatment in which the etching protective film, the conductive film, and the amorphous semiconductor region are partly etched is performed; then, the mask is removed. Next, second etching treatment in which the exposed amorphous semiconductor region and the microcrystalline semiconductor region are partly dry-etched is performed using the etched etching protective film as a mask so that the microcrystalline semiconductor region is partly exposed to form a back channel region.
    • 可以制造具有低截止电流和优异电特性的薄膜晶体管。 在包括半导体膜的倒置交错薄膜晶体管中,其中层叠有至少一个微晶半导体区域和非晶半导体区域,在半导体膜上层叠导电膜和蚀刻保护膜; 在蚀刻保护膜上形成掩模; 执行其中蚀刻保护膜,导电膜和非晶半导体区域被部分蚀刻的第一蚀刻处理; 然后,去除面具。 接下来,使用蚀刻蚀刻保护膜作为掩模进行其中暴露的非晶半导体区域和微晶半导体区域被部分干法蚀刻的第二蚀刻处理,使得微晶半导体区域部分地暴露以形成背沟道区域。