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1. 发明授权

US10022055B2 Blood pressure information measurement device cuff and blood pressure information measurement device provided therewith 有权
公开(公告)号：US10022055B2
公开(公告)日：2018-07-17
申请号：US13632876
申请日：2012-10-01
申请人： Tatsuya Kobayashi , Kenji Fujii , Yukiya Sawanoi , Naoto Akiyama
发明人： Tatsuya Kobayashi , Kenji Fujii , Yukiya Sawanoi , Naoto Akiyama
IPC分类号： A61B5/021 , A61B5/022
摘要： A blood pressure information measurement device cuff includes a wide blood pressure value measurement air bladder wrapped around a fitting area when in a fitted state, and a narrow pulse wave measurement air bladder disposed so as to be closer to the fitting area than the blood pressure value measurement air bladder when in the fitted state, and covered by the blood pressure value measurement air bladder when wrapped around the fitting area. The pulse wave measurement air bladder includes an anchored portion anchored to the blood pressure value measurement air bladder so as to be immobile relative to the blood pressure value measurement air bladder and a mobile portion that is not anchored to the blood pressure value measurement air bladder so as to be mobile relative to the blood pressure value measurement air bladder along a wrapping direction in which the cuff is wrapped around the measurement area.

2. 发明申请

US20130060153A1 BLOOD PRESSURE INFORMATION MEASUREMENT DEVICE CUFF AND BLOOD PRESSURE INFORMATION MEASUREMENT DEVICE PROVIDED THEREWITH 有权
标题翻译：血液压力信息测量装置和血液压力信息测量装置
公开(公告)号：US20130060153A1
公开(公告)日：2013-03-07
申请号：US13632876
申请日：2012-10-01
申请人： Tatsuya Kobayashi , Kenji Fujii , Yukiya Sawanoi , Naoto Akiyama
发明人： Tatsuya Kobayashi , Kenji Fujii , Yukiya Sawanoi , Naoto Akiyama
IPC分类号： A61B5/022
CPC分类号： A61B5/02233 , A61B5/02225
摘要： A blood pressure information measurement device cuff includes a wide blood pressure value measurement air bladder wrapped around a fitting area when in a fitted state, and a narrow pulse wave measurement air bladder disposed so as to be closer to the fitting area than the blood pressure value measurement air bladder when in the fitted state, and covered by the blood pressure value measurement air bladder when wrapped around the fitting area. The pulse wave measurement air bladder includes an anchored portion anchored to the blood pressure value measurement air bladder so as to be immobile relative to the blood pressure value measurement air bladder and a mobile portion that is not anchored to the blood pressure value measurement air bladder so as to be mobile relative to the blood pressure value measurement air bladder along a wrapping direction in which the cuff is wrapped around the measurement area.
摘要翻译：血压信息测量装置袖带包括在装配状态下缠绕在装配区域上的宽血压值测量气囊，以及布置成比血压值更靠近装配区域的窄脉搏波测量气囊测量空气囊处于装配状态时，被包裹在装配区域周围的血压值测量气囊覆盖。脉搏测量用空气囊包括锚定在血压值测量用气囊上的固定部，以相对于血压值测量用气囊不动，以及未固定于血压值测量气囊的移动部，相对于血压值测量气囊沿着包围方向移动，其中袖带缠绕在测量区域周围。

3. 发明申请

US20100127384A1 Semiconductor device and connection checking method for semiconductor device 有权
标题翻译：半导体器件的半导体器件和连接检查方法
公开(公告)号：US20100127384A1
公开(公告)日：2010-05-27
申请号：US12591424
申请日：2009-11-19
申请人： Naoto Akiyama , Toshiaki Umeshima
发明人： Naoto Akiyama , Toshiaki Umeshima
IPC分类号： H01L23/488 , H01L21/66
CPC分类号： H01L25/0657 , H01L22/32 , H01L23/3142 , H01L23/49816 , H01L24/05 , H01L24/17 , H01L24/49 , H01L2224/0401 , H01L2224/05573 , H01L2224/05599 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2224/1705 , H01L2224/32225 , H01L2224/49174 , H01L2224/73204 , H01L2224/85399 , H01L2225/06513 , H01L2924/00013 , H01L2924/00014 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H01L2924/181 , H01L2224/13099 , H01L2224/05099 , H01L2224/13599 , H01L2224/29099 , H01L2224/29599 , H01L2924/014 , H01L2224/45015 , H01L2924/207 , H01L2924/00012 , H01L2224/45099 , H01L2924/00
摘要： Provided is a semiconductor device in which a connection between connection terminals and land of the semiconductor device can be checked with the semiconductor device kept in a sound condition, the connection not being allowed to be checked with a semiconductor chip. The semiconductor device of the present invention includes: a package substrate; a semiconductor chip mounted on the package substrate; a first land formed in a first principal surface of the package substrate; a second land formed in a second principal surface of the package substrate; first connection terminals connected to the second land and having the connection thereto not allowed to be checked with the semiconductor chip; a connection interconnection for connecting the first land and the second land; a second connection terminal formed in the second principal surface of the package substrate; and a branch interconnection for connecting the connection interconnection and the second connection terminal.
摘要翻译：提供一种半导体装置，其中半导体器件的连接端子和焊盘之间的连接可以被保持在声音状态的半导体器件检查，该连接不允许用半导体芯片检查。本发明的半导体器件包括：封装基板; 安装在所述封装基板上的半导体芯片; 形成在所述封装衬底的第一主表面中的第一焊盘; 形成在所述封装衬底的第二主表面中的第二焊盘; 连接到第二焊盘并且与其连接的第一连接端子不允许用半导体芯片检查; 用于连接第一陆地和第二陆地的连接互连; 第二连接端子，形成在所述封装基板的所述第二主表面中; 以及用于连接连接互连和第二连接终端的分支互连。

4. 发明申请

US20050168895A1 Method of manufacturing a semiconductor device having a protection circuit 审中-公开
标题翻译：具有保护电路的半导体器件的制造方法
公开(公告)号：US20050168895A1
公开(公告)日：2005-08-04
申请号：US11097119
申请日：2005-04-04
申请人： Naoto Akiyama
发明人： Naoto Akiyama
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8234 , H01L21/8244 , H01L27/06 , H01L27/088 , H01L27/10 , H01L27/105 , H01L27/11 , H02H9/00
CPC分类号： H01L27/11 , H01L21/823412 , H01L21/823462 , H01L27/105 , H01L27/1116
摘要： The semiconductor device includes a plurality of transistors, wherein one of the transistors that has the thinnest gate dielectric layer is selected to serve as a power source protection element, among a plurality of transistors, each having a gate dielectric layer of an independently set film thickness, disposed on a same substrate to be operated by a voltage from a same power source. Also, a threshold voltage of the transistor selected as the power source protection element is set higher than other transistor that also has the thinnest gate dielectric layer.
摘要翻译：半导体器件包括多个晶体管，其中在多个晶体管中选择具有最薄栅极介电层的晶体管中的一个用作电源保护元件，每个晶体管具有独立设定的膜厚度的栅极介电层，设置在同一基板上，由相同电源的电压进行操作。此外，选择为电源保护元件的晶体管的阈值电压被设置为高于也具有最薄栅介电层的其它晶体管。

5. 发明授权

US06628492B2 Disarm circuit using semiconductor switch device 有权
标题翻译：使用半导体开关装置的解除电路
公开(公告)号：US06628492B2
公开(公告)日：2003-09-30
申请号：US09854664
申请日：2001-05-15
申请人： Naoto Akiyama , Masahiko Inomata , Ikuhiro Tsumura
发明人： Naoto Akiyama , Masahiko Inomata , Ikuhiro Tsumura
IPC分类号： H02H300
CPC分类号： A61N1/3931
摘要： The invention has an object of providing a disarm circuit using a semiconductor switch device that can secure the safety of an electrotherapy apparatus by disarming even if the control of the semiconductor switch is disabled because of some cause. Therefore, the disarm circuit is provided with a transformer, its primary side area, its secondary side area, a resistor for disarming and the semiconductor switch device. The secondary side area is characterized in that a resistor for limiting excessive current for automatically turning on the semiconductor switch device by stored electric energy is connected between a positive terminal of an electric energy storage section and the gate of the semiconductor switch device.
摘要翻译：本发明的目的是提供一种使用半导体开关装置的解除电路，该半导体开关装置即使由于某种原因禁用了半导体开关的控制而能够通过撤防来确保电疗装置的安全性。因此，撤防电路设置有变压器，其初级侧面积，次级侧面积，用于撤防的电阻器和半导体开关装置。二次侧区域的特征在于，用于限制用于通过存储电能自动导通半导体开关装置的过大电流的电阻器连接在电能存储部分的正极端子和半导体开关装置的栅极之间。

6. 发明授权

US6043546A Planar channel-type MOS transistor 失效
标题翻译：平面沟道型MOS晶体管
公开(公告)号：US6043546A
公开(公告)日：2000-03-28
申请号：US50432
申请日：1998-03-31
申请人： Naoto Akiyama
发明人： Naoto Akiyama
IPC分类号： H01L21/28 , H01L21/336 , H01L21/8238 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/665 , H01L21/28052 , H01L21/823835 , H01L21/823871
摘要： In the manufacture of a planar channel-type MOS transistor, an n-well is formed in a predetermined region of a p-type semiconductor substrate to define a p-channel transistor region in which element forming regions are located as a p-type active region and a p-type gate electrode. A p-type substrate region adjacent to the p-channel transistor region defines an n-channel transistor region in which element forming regions are located as an n-type active region and an n-type gate electrode. Titanium silicide is formed in self-alignment as an upper layer of each of the p- and n-type active regions and p- and n-type gate electrodes. A boundary of the p- and n-type gate electrodes is a nondoped region where the titanium silicide is formed in an increased thickness as compared to that of the titanium silicide formed on the remaining portion of the gate electrodes.
摘要翻译：在平面沟道型MOS晶体管的制造中，在p型半导体衬底的预定区域中形成n阱以限定其中元件形成区域位于p型激活态的p沟道晶体管区域区域和p型栅电极。与p沟道晶体管区域相邻的p型衬底区域限定了n沟道晶体管区域，其中元件形成区域被定位为n型有源区域和n型栅极电极。硅化钛以自对准形式形成为p型和n型有源区以及p型和n型栅电极中的每一层的上层。 p型和n型栅电极的边界是与在栅电极的剩余部分形成的硅化钛相比增加的厚度形成硅化钛的非掺杂区域。

7. 发明授权

US06403467B1 Semiconductor device and method for manufacturing same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06403467B1
公开(公告)日：2002-06-11
申请号：US09460997
申请日：1999-12-14
申请人： Naoto Akiyama
发明人： Naoto Akiyama
IPC分类号： H01L214763
CPC分类号： H01L23/5226 , H01L2924/0002 , H01L2924/00
摘要： In a method for manufacturing a semiconductor device, a first insulation film is grown on a semiconductor substrate, a first interconnect is formed thereover, and a second insulation film is grown over the first insulation film, including the first interconnect. A first connecting via hole, disposed at an edge part of the first interconnect, and a second connecting via hole, disposed at the center part thereof, are then formed, a metal film being additionally grown on the second insulation film, after which chemical metal polishing is used to remove the metal film, over which is formed a second interconnect.
摘要翻译：在制造半导体器件的方法中，在半导体衬底上生长第一绝缘膜，在其上形成第一互连，并且在包括第一互连的第一绝缘膜上生长第二绝缘膜。然后，形成设置在第一互连的边缘部分的第一连接通孔和设置在其中心部分的第二连接通孔，金属膜另外生长在第二绝缘膜上，之后化学金属使用抛光来除去形成第二互连的金属膜。

8. 发明授权

US07328065B2 Electric stimulator and defibrillator 有权
标题翻译：电刺激器和除颤器
公开(公告)号：US07328065B2
公开(公告)日：2008-02-05
申请号：US10727493
申请日：2003-12-05
申请人： Jun Watanabe , Tsutomu Wakabayashi , Naoto Akiyama , Masahiko Inomata
发明人： Jun Watanabe , Tsutomu Wakabayashi , Naoto Akiyama , Masahiko Inomata
IPC分类号： A61N1/39
CPC分类号： A61N1/3956 , A61N1/3906 , A61N1/3925
摘要： A plurality of electrodes are adapted to be attached on a living body. An electric pulse is output through the electrodes as an electric stimulation to the living body. An analyzer is operable to detect a waveform of the electric pulse and to analyze a parameter of the waveform. A display displays the parameter together with one of the waveform and a model waveform which is an invariable waveform representative of the electric pulse.
摘要翻译：多个电极适于附接在生物体上。通过电极将电脉冲作为对生物体的电刺激输出。分析器可操作以检测电脉冲的波形并分析波形的参数。显示器将显示参数以及一个波形和一个表示电脉冲的不变波形的模型波形。

9. 发明授权

US06947793B2 Electrotherapy apparatus and its electric energy delivering method 有权
标题翻译：电疗仪及其电能输送方法
公开(公告)号：US06947793B2
公开(公告)日：2005-09-20
申请号：US09800788
申请日：2001-03-08
申请人： Naoto Akiyama , Masahiko Inomata , Ikuhiro Tsumura
发明人： Naoto Akiyama , Masahiko Inomata , Ikuhiro Tsumura
IPC分类号： A61N1/378 , A61N1/39 , H02J17/00 , A61N1/362
CPC分类号： A61N1/3937 , A61N1/3912 , A61N1/3956
摘要： An electrotherapy apparatus for generating first and second waveforms having reversed polarities. When the waveform of the electric energy outputted from the output electrodes 112a and 112b is the positive phase, the inductor 105, electric energy storage section 104, the first switch means 101, output electrode 112a, patient 113, and the output electrode 112b are connected so that these can form the closed circuit. In the case where the waveform of the electric energy outputted from the output electrodes 112a and 112b is the negative phase, when the first switch means 101 is closed, the inductor 105 and the electric energy storage section 104 form the closed circuit, and when the first switch means 101 is opened, the inductor 105 and the electric energy storage section 104 are electrically separated, and the delivery of the electric energy to the output electrodes 112a, and 112b is conducted by the inductor 105.
摘要翻译：一种用于产生具有相反极性的第一和第二波形的电疗设备。当从输出电极112a和112b输出的电能的波形为正相时，电感器105，电能存储部分104，第一开关装置101，输出电极112a，患者113和输出电极 112b被连接，使得它们可以形成闭合电路。在从输出电极112a和112b输出的电能的波形为负相的情况下，当第一开关装置101闭合时，电感器105和电能存储部分104形成闭合电路，并且当第一开关装置101打开时，电感器105和电能存储部分104被电分离，并且电能到输出电极112a和112b的传送由电感器105传导。

10. 发明授权

US06836161B2 Semiconductor switch driving circuit 有权
标题翻译：半导体开关驱动电路
公开(公告)号：US06836161B2
公开(公告)日：2004-12-28
申请号：US09813978
申请日：2001-03-22
申请人： Naoto Akiyama , Masahiko Inomata , Ikuhiro Tsumura
发明人： Naoto Akiyama , Masahiko Inomata , Ikuhiro Tsumura
IPC分类号： H03K300
CPC分类号： H03K17/0406 , H03K17/107 , H03K17/691 , H03K17/785
摘要： To provide a semiconductor switch driving circuit in which a stable conducting state and a non-conducting state can be kept, the high-speed switching operation is enabled, a lag of switching timing is minimized and which has a simple circuit, the semiconductor switch driving circuit for driving a semiconductor switch in which multistage switching devices (IGBT) are connected includes a transformer, a primary side and a secondary side and is configured so that voltage between the gate and the emitter of a switching device can be continuously kept positive, voltage between the gate and the emitter can be continuously kept negative, voltage between the gate and the emitter is alternately switched to positive voltage or negative voltage.
摘要翻译：为了提供能够保持稳定的导通状态和非导通状态的半导体开关驱动电路，能够进行高速开关动作，切换定时的滞后最小化，电路简单，半导体开关驱动用于驱动其中连接有多级开关器件（IGBT）的半导体开关的电路包括变压器，初级侧和次级侧，并且被配置为使得开关器件的栅极和发射极之间的电压可以连续保持为正，电压在栅极和发射极之间可以连续保持负极，栅极和发射极之间的电压交替切换到正电压或负电压。

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