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1. 发明授权

US11280023B2 Film formation apparatus and method of manufacturing semiconductor device 有权
公开(公告)号：US11280023B2
公开(公告)日：2022-03-22
申请号：US16736886
申请日：2020-01-08
申请人： Tatsuji Nagaoka , Hiroyuki Nishinaka , Daisuke Tahara , Masahiro Yoshimoto
发明人： Tatsuji Nagaoka , Hiroyuki Nishinaka , Daisuke Tahara , Masahiro Yoshimoto
IPC分类号： C30B23/02 , C30B7/00 , C30B7/04 , C30B7/14 , H01L21/02 , C30B19/06 , C30B29/16 , C30B19/08
摘要： A film formation apparatus is configured to epitaxially grow a film on a surface of a substrate, and the film formation apparatus may include: a stage configured to allow the substrate to be mounted thereon; a heater configured to heat the substrate; a mist supply source configured to supply mist of a solution that comprises a solvent and a material of the film dissolved in the solvent; a heated-gas supply source configured to supply heated gas that comprises gas constituted of a same material as a material of the solvent and has a higher temperature than the mist; and a delivery device configured to deliver the mist and the heated gas to the surface of the substrate.

2. 发明授权

US11270882B2 Film formation apparatus configured to supply mist of a solution to surface of a substrate and method of manufacturing semiconductor device using the film formation apparatus 有权
公开(公告)号：US11270882B2
公开(公告)日：2022-03-08
申请号：US16741060
申请日：2020-01-13
申请人： Tatsuji Nagaoka , Hiroyuki Nishinaka , Daisuke Tahara , Masahiro Yoshimoto
发明人： Tatsuji Nagaoka , Hiroyuki Nishinaka , Daisuke Tahara , Masahiro Yoshimoto
IPC分类号： H01L21/02 , B05B17/06
摘要： A film formation apparatus is configured to supply mist of a solution to a surface of a substrate so as to epitaxially grow a film on the surface of the substrate. The film formation apparatus may be provided with: a furnace configured to house and heat the substrate; a reservoir configured to store the solution; a heater configured to heat the solution in the reservoir; an ultrasonic transducer configured to apply ultrasound to the solution in the reservoir so as to generate the mist of the solution in the reservoir; and a mist supply path configured to carry the mist from the reservoir to the furnace.

3. 发明授权

US11443944B2 Method of growing semiconductor layers, method of manufacturing semiconductor device, and method of growing balk crystal 有权
公开(公告)号：US11443944B2
公开(公告)日：2022-09-13
申请号：US16859160
申请日：2020-04-27
申请人： Tatsuji Nagaoka , Hiroyuki Nishinaka , Masahiro Yoshimoto , Daisuke Tahara
发明人： Tatsuji Nagaoka , Hiroyuki Nishinaka , Masahiro Yoshimoto , Daisuke Tahara
IPC分类号： H01L21/16 , H01L21/02
摘要： A method of growing semiconductor layers may include: growing a first semiconductor layer on a surface of a substrate at which a crystal layer is exposed, wherein the first semiconductor layer is different from the crystal layer in at least one of a material and a crystal structure; cutting the first semiconductor layer such that a cut surface of the first semiconductor layer extends from a front surface of the first semiconductor layer to a rear surface of the first semiconductor layer; and growing a second semiconductor layer on the cut surface of the first semiconductor layer, wherein the second semiconductor layer has a material and a crystal structure that are same as those of the first semiconductor layer.

4. 发明授权

US11515146B2 Method of forming gallium oxide film 有权
公开(公告)号：US11515146B2
公开(公告)日：2022-11-29
申请号：US16697273
申请日：2019-11-27
申请人： Tatsuji Nagaoka , Hiroyuki Nishinaka , Masahiro Yoshimoto
发明人： Tatsuji Nagaoka , Hiroyuki Nishinaka , Masahiro Yoshimoto
IPC分类号： H01L21/02
摘要： A method of forming a gallium oxide film is provided, and the method may include supplying mist of a material solution comprising gallium atoms and chlorine atoms to a surface of a substrate while heating the substrate so as to form the gallium oxide film on the surface of the substrate, in which a molar concentration of chlorine in the material solution is equal to or more than 3.0 times and equal to or less than 4.5 times a molar concentration of gallium in the material solution.

5. 发明授权

US11424322B2 Semiconductor device and method of manufacturing the same 有权
公开(公告)号：US11424322B2
公开(公告)日：2022-08-23
申请号：US16784907
申请日：2020-02-07
申请人： Tatsuji Nagaoka , Hiroyuki Nishinaka , Masahiro Yoshimoto
发明人： Tatsuji Nagaoka , Hiroyuki Nishinaka , Masahiro Yoshimoto
IPC分类号： H01L29/06 , H01L29/24 , H01L21/784 , H01L29/872 , H01L29/861
摘要： A semiconductor device may include: a gallium oxide substrate including a first side surface constituted of a (100) plane, a second side surface constituted of a plane other than the (100) plane, and an upper surface; and an electrode in contact with the upper surface, in which the gallium oxide substrate may include: a diode interface constituted of a pn interface or a Schottky interface; and an n-type drift region connected to the electrode via the diode interface, and a shortest distance between the first side surface and the diode interface is shorter than a shortest distance between the second side surface and the diode interface.

6. 发明授权

US11534791B2 Mist generator, film formation apparatus, and method of forming film using the film formation apparatus 有权
公开(公告)号：US11534791B2
公开(公告)日：2022-12-27
申请号：US15931968
申请日：2020-05-14
申请人： Tatsuji Nagaoka , Hiroyuki Nishinaka , Masahiro Yoshimoto
发明人： Tatsuji Nagaoka , Hiroyuki Nishinaka , Masahiro Yoshimoto
IPC分类号： B05B17/06 , B05B7/00 , H01L21/02
摘要： A mist generator may include a reservoir storing a solution, a plurality of ultrasonic vibrators, a mist delivery path, and a mist collector. The plurality of ultrasonic vibrators may be disposed under the reservoir and configured to apply ultrasonic vibration to the solution stored in the reservoir to generate mist of the solution in the reservoir. The mist delivery path may be configured to deliver the mist from an inside of the reservoir to an outside of the reservoir. The mist collector may be disposed above the solution in the reservoir, wherein an upper end of the mist collector may be connected to an upstream end of the mist delivery path, a lower end of the mist collector may include an opening, and a width of the mist collector may increase from the upper end toward the opening. The plurality of ultrasonic vibrators may be located directly under the opening.

7. 发明申请

US20060194392A1 MIS-TYPE SEMICONDUCTOR DEVICE 失效
标题翻译： MIS型半导体器件
公开(公告)号：US20060194392A1
公开(公告)日：2006-08-31
申请号：US11383097
申请日：2006-05-12
申请人： Tatsuji Nagaoka
发明人： Tatsuji Nagaoka
IPC分类号： H01L21/336
CPC分类号： H01L29/7802 , H01L29/0634 , H01L29/0847 , H01L29/0878 , H01L29/1083 , H01L29/1087 , H01L29/1095 , H01L29/402 , H01L29/407 , H01L29/7813 , H01L29/7835 , H01L2924/0002 , H01L2924/00
摘要： A MIS-type semiconductor device has reduced ON-resistance by securing an overlapping area between the gate electrode and the drift region, and has low switching losses by reducing the feedback capacitance. The MIS-type semiconductor device includes a p-type base region, an n-type drift region, a p+-type stopper region in the base region, a gate insulation film on the base region, a gate electrode on the gate insulation film, an oxide film on the drift region, a field plate on the oxide film, and a source electrode. The position (P) of the impurity concentration peak in base region is located more closely to the drift region. The oxide film is thinner on the side of the gate electrode. The field plate is connected electrically to the source electrode, the spacing (dg) between the gate insulation film and the stopper region is 2.5 μm or narrower, and the minimum spacing (x) between the drain region and the stopper region is 5.6 μm or narrower. The minimum thickness of the oxide film is equal to or larger than the thickness of the gate insulation film and equal to or smaller than the ratio Vb/Ec of the breakdown voltage Vb to the critical dielectric breakdown strength of silicon Ec. The drift region can be formed of first and second drift regions, with the first drift region being more heavily doped. The gate electrode and the drift region can be buried.
摘要翻译： MIS型半导体器件通过确保栅极电极和漂移区域之间的重叠区域而降低了导通电阻，并且通过减小反馈电容而具有低的开关损耗。 MIS型半导体器件包括基极区域中的p型基极区域，n型漂移区域，ap + + / - 型停止区域，基极区域上的栅极绝缘膜，栅极栅绝缘膜上的电极，漂移区上的氧化膜，氧化膜上的场板和源电极。碱性区域中的杂质浓度峰的位置（P）更靠近漂移区。氧化膜在栅电极侧较薄。场板与源电极电连接，栅绝缘膜与止挡区之间的间隔（dg）为2.5μm或更窄，漏区与阻挡区之间的最小间距（x）为5.6μm或更窄氧化膜的最小厚度等于或大于栅极绝缘膜的厚度，并且等于或小于击穿电压Vb与硅Ec的临界介电击穿强度的比率Vb / Ec。漂移区可以由第一和第二漂移区形成，其中第一漂移区是更重掺杂的。栅电极和漂移区可以埋入。

8. 发明授权

US07067877B2 MIS-type semiconductor device 失效
标题翻译： MIS型半导体器件
公开(公告)号：US07067877B2
公开(公告)日：2006-06-27
申请号：US10781360
申请日：2004-02-18
申请人： Tatsuji Nagaoka
发明人： Tatsuji Nagaoka
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/7802 , H01L29/0634 , H01L29/0847 , H01L29/0878 , H01L29/105 , H01L29/1095 , H01L29/402 , H01L29/407 , H01L29/4175 , H01L29/41758 , H01L29/7393 , H01L29/7813 , H01L29/7816 , H01L29/7835 , H01L2924/0002 , H01L2924/00
摘要： A MIS-type semiconductor device has reduced ON-resistance by securing an overlapping area between the gate electrode and the drift region, and has low switching losses by reducing the feedback capacitance. The MIS-type semiconductor device includes a p-type base region, an n-type drift region, a p+-type stopper region in the base region, a gate insulation film on the base region, a gate electrode on the gate insulation film, an oxide film on the drift region, a field plate on the oxide film, and a source electrode. The position (P) of the impurity concentration peak in base region is located more closely to the drift region. The oxide film is thinner on the side of the gate electrode. The field plate is connected electrically to the source electrode, the spacing (dg) between the gate insulation film and the stopper region is 2.5 μm or narrower, and the minimum spacing (x) between the drain region and the stopper region is 5.6 μm or narrower. The minimum thickness of the oxide film is equal to or larger than the thickness of the gate insulation film and equal to or smaller than the ratio Vb/Ec of the breakdown voltage Vb to the critical dielectric breakdown strength of silicon Ec. The drift region can be formed of first and second drift regions, with the first drift region being more heavily doped. The gate electrode and the drift region can be buried.
摘要翻译： MIS型半导体器件通过确保栅极电极和漂移区域之间的重叠区域而降低了导通电阻，并且通过减小反馈电容而具有低的开关损耗。 MIS型半导体器件包括基极区域中的p型基极区域，n型漂移区域，ap + + / - 型停止区域，基极区域上的栅极绝缘膜，栅极栅绝缘膜上的电极，漂移区上的氧化膜，氧化膜上的场板和源电极。碱性区域中的杂质浓度峰的位置（P）更靠近漂移区。氧化膜在栅电极侧较薄。场板与源电极电连接，栅绝缘膜与止挡区之间的间隔（dg）为2.5μm或更窄，漏区与阻挡区之间的最小间距（x）为5.6μm或更窄氧化膜的最小厚度等于或大于栅极绝缘膜的厚度，并且等于或小于击穿电压Vb与硅Ec的临界介电击穿强度的比率Vb / Ec。漂移区可以由第一和第二漂移区形成，其中第一漂移区是更重掺杂的。栅电极和漂移区可以埋入。

9. 发明授权

US07042046B2 Super-junction semiconductor device and method of manufacturing the same 有权
公开(公告)号：US07042046B2
公开(公告)日：2006-05-09
申请号：US10925407
申请日：2004-08-25
申请人： Yasuhiko Onishi , Tatsuhiko Fujihira , Katsunori Ueno , Susumu Iwamoto , Takahiro Sato , Tatsuji Nagaoka
发明人： Yasuhiko Onishi , Tatsuhiko Fujihira , Katsunori Ueno , Susumu Iwamoto , Takahiro Sato , Tatsuji Nagaoka
IPC分类号： H01L29/76 , H01L23/58
CPC分类号： H01L29/7811 , H01L29/0619 , H01L29/0634 , H01L29/0696 , H01L29/66333 , H01L29/66712 , H01L29/7395 , H01L29/7802 , H01L2924/0002 , H01L2924/00
摘要： Disclosed is a semiconductor device facilitating a peripheral portion thereof with a breakdown voltage higher than the breakdown voltage in the drain drift layer without employing a guard ring or field plate. A preferred embodiment includes a drain drift region with a first alternating conductivity type layer formed of n drift current path regions and p partition regions arranged alternately with each other, and a breakdown withstanding region with a second alternating conductivity type layer formed of n regions and p regions arranged alternately with each other, the breakdown withstanding region providing no current path in the ON-state of the device and being depleted in the OFF-state of the device. Since depletion layers expand in both directions from multiple pn-junctions into n regions and p regions in the OFF-state of the device, the adjacent areas of p-type base regions, the outer area of the semiconductor chip and the deep area of the semiconductor chip are depleted. Thus, the breakdown voltage of breakdown withstanding region is higher than the breakdown voltage of drain drift region.

10. 发明授权

US07002205B2 Super-junction semiconductor device and method of manufacturing the same 有权
标题翻译：超结半导体器件及其制造方法
公开(公告)号：US07002205B2
公开(公告)日：2006-02-21
申请号：US10735501
申请日：2003-12-12
申请人： Yasuhiko Onishi , Tatsuhiko Fujihira , Katsunori Ueno , Susumu Iwamoto , Takahiro Sato , Tatsuji Nagaoka
发明人： Yasuhiko Onishi , Tatsuhiko Fujihira , Katsunori Ueno , Susumu Iwamoto , Takahiro Sato , Tatsuji Nagaoka
IPC分类号： H01L29/76
CPC分类号： H01L29/7811 , H01L29/0619 , H01L29/0634 , H01L29/0696 , H01L29/66333 , H01L29/66712 , H01L29/7395 , H01L29/7802 , H01L2924/0002 , H01L2924/00
摘要： Disclosed is a semiconductor device facilitating a peripheral portion thereof with a breakdown voltage higher than the breakdown voltage in the drain drift layer without employing a guard ring or field plate. A preferred embodiment includes a drain drift region with a first alternating conductivity type layer formed of n drift current path regions and p partition regions arranged alternately with each other, and a breakdown withstanding region with a second alternating conductivity type layer formed of n regions and p regions arranged alternately with each other, the breakdown withstanding region providing no current path in the ON-state of the device and being depleted in the OFF-state of the device. Since depletion layers expand in both directions from multiple pn-junctions into n regions and p regions in the OFF-state of the device, the adjacent areas of p-type base regions, the outer area of the semiconductor chip and the deep area of the semiconductor chip are depleted. Thus, the breakdown voltage of breakdown withstanding region is higher than the breakdown voltage of drain drift region.
摘要翻译：公开了一种半导体器件，其使用其周边部分具有高于漏极漂移层中的击穿电压的击穿电压，而不采用保护环或场板。优选实施例包括漏极漂移区，其具有由n个漂移电流通路区域和彼此交替布置的p个分隔区域形成的第一交变导电类型层，以及具有由n个区域和p形成的第二交变导电类型层的击穿承受区域区域彼此交替布置，击穿承受区域在设备的接通状态下不提供电流路径，并且在器件的关断状态被耗尽。由于耗尽层从多个pn结到两个方向扩展到设备的OFF状态的n个区域和p区域，所以p型基极区域的相邻区域，半导体芯片的外部区域和半导体芯片耗尽。因此，击穿耐受区域的击穿电压高于漏极漂移区域的击穿电压。

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