专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07076225B2 Variable gain selection in direct conversion receiver 失效
标题翻译：直接转换接收机中的可变增益选择
公开(公告)号：US07076225B2
公开(公告)日：2006-07-11
申请号：US10034734
申请日：2001-12-21
申请人： Tao Li , Christian Holenstein , Inyup Kang , Brett C. Walker , Paul E. Peterzell , Raghu Challa , Matthew L. Severson , Arun Raghupathy , Gilbert Christopher Sih
发明人： Tao Li , Christian Holenstein , Inyup Kang , Brett C. Walker , Paul E. Peterzell , Raghu Challa , Matthew L. Severson , Arun Raghupathy , Gilbert Christopher Sih
IPC分类号： H04B7/00
CPC分类号： H03G3/3078 , H03G3/3068 , H03G3/3089
摘要： A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.
摘要翻译：具有用于去除信号分量的DC偏移的DC环路的直接下变频接收机架构，提供一系列增益的数字可变增益放大器（DVGA），用于为DVGA和RF提供增益控制的自动增益控制（AGC）回路 /模拟电路和串行总线接口（SBI）单元，通过串行总线为RF /模拟电路提供控制。可以如本文所述有利地设计和定位DVGA。可以基于DC循环的操作模式来选择VGA循环的操作模式，因为这两个循环彼此相互作用。在采集模式下，DC环路工作的持续时间可以被选择为与采集模式中的DC环路带宽成反比。一些或全部RF /模拟电路的控制可以通过串行总线提供。

2. 发明授权

US08626099B2 Direct conversion receiver architecture 有权
标题翻译：直接转换接收机架构
公开(公告)号：US08626099B2
公开(公告)日：2014-01-07
申请号：US11376502
申请日：2006-03-14
申请人： Tao Li , Christian Holenstein , Inyup Kang , Brett C. Walker , Paul E. Peterzell , Raghu Challa , Matthew L. Severson , Arun Raghupathy , Gilbert Christopher Sih
发明人： Tao Li , Christian Holenstein , Inyup Kang , Brett C. Walker , Paul E. Peterzell , Raghu Challa , Matthew L. Severson , Arun Raghupathy , Gilbert Christopher Sih
IPC分类号： H04B1/06
CPC分类号： H03G3/3078 , H03G3/3068 , H03G3/3089
摘要： A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.
摘要翻译：具有用于去除信号分量的DC偏移的DC环路的直接下变频接收机架构，提供一系列增益的数字可变增益放大器（DVGA），用于为DVGA和RF提供增益控制的自动增益控制（AGC）回路 /模拟电路和串行总线接口（SBI）单元，通过串行总线为RF /模拟电路提供控制。可以如本文所述有利地设计和定位DVGA。可以基于DC循环的操作模式来选择VGA循环的操作模式，因为这两个循环彼此相互作用。在采集模式下，DC环路工作的持续时间可以被选择为与采集模式中的DC环路带宽成反比。一些或全部RF /模拟电路的控制可以通过串行总线提供。

3. 发明授权

US08615212B2 Direct conversion receiver architecture 有权
公开(公告)号：US08615212B2
公开(公告)日：2013-12-24
申请号：US11862330
申请日：2007-09-27
申请人： Tao Li , Christian Holenstein , Inyup Kang , Brett C. Walker , Paul E. Peterzell , Raghu Challa , Matthew L. Severson , Arun Raghupathy , Gilbert Christopher Sih
发明人： Tao Li , Christian Holenstein , Inyup Kang , Brett C. Walker , Paul E. Peterzell , Raghu Challa , Matthew L. Severson , Arun Raghupathy , Gilbert Christopher Sih
IPC分类号： H04B7/00
CPC分类号： H03G3/3078 , H03G3/3068 , H03G3/3089
摘要： A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.

4. 发明申请

US20110105070A1 Direct conversion receiver architecture 有权
标题翻译：直接转换接收机架构
公开(公告)号：US20110105070A1
公开(公告)日：2011-05-05
申请号：US11376502
申请日：2006-03-14
申请人： Tao Li , Christian Holenstein , Inyup Kang , Brett C. Walker , Paul E. Peterzell , Raghu Challa , Matthew L. Severson , Arun Raghupathy , Gilbert Christopher Sih
发明人： Tao Li , Christian Holenstein , Inyup Kang , Brett C. Walker , Paul E. Peterzell , Raghu Challa , Matthew L. Severson , Arun Raghupathy , Gilbert Christopher Sih
IPC分类号： H03L5/00 , H04B1/16
CPC分类号： H03G3/3078 , H03G3/3068 , H03G3/3089
摘要： A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.
摘要翻译：具有用于去除信号分量的DC偏移的DC环路的直接下变频接收机架构，提供一系列增益的数字可变增益放大器（DVGA），用于为DVGA和RF提供增益控制的自动增益控制（AGC）回路 /模拟电路和串行总线接口（SBI）单元，通过串行总线为RF /模拟电路提供控制。可以如本文所述有利地设计和定位DVGA。可以基于DC循环的操作模式来选择VGA循环的操作模式，因为这两个循环彼此相互作用。在采集模式下，DC环路工作的持续时间可以被选择为与采集模式中的DC环路带宽成反比。一些或全部RF /模拟电路的控制可以通过串行总线提供。

5. 发明授权

US08634790B2 Direct conversion receiver architecture with digital fine resolution variable gain amplification 有权
标题翻译：直接转换接收机架构，具有数字精细分辨率可变增益放大
公开(公告)号：US08634790B2
公开(公告)日：2014-01-21
申请号：US11131147
申请日：2005-05-16
申请人： Paul E. Peterzell , Christian Holenstein , Inyup Kang , Tao Li , Matthew L. Severson
发明人： Paul E. Peterzell , Christian Holenstein , Inyup Kang , Tao Li , Matthew L. Severson
IPC分类号： H04B1/06 , H04B7/00
CPC分类号： H03G3/3078 , H03G3/3068 , H03G3/3089
摘要： A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.
摘要翻译：具有用于去除信号分量的DC偏移的DC环路的直接下变频接收机架构，提供一系列增益的数字可变增益放大器（DVGA），用于为DVGA和RF提供增益控制的自动增益控制（AGC）回路 /模拟电路和串行总线接口（SBI）单元，通过串行总线为RF /模拟电路提供控制。可以如本文所述有利地设计和定位DVGA。可以基于DC循环的操作模式来选择VGA循环的操作模式，因为这两个循环彼此相互作用。在采集模式下，DC环路工作的持续时间可以被选择为与采集模式中的DC环路带宽成反比。一些或全部RF /模拟电路的控制可以通过串行总线提供。

6. 发明授权

US07174190B2 Serial bus interface for direct conversion receiver 有权
标题翻译：用于直接转换接收器的串行总线接口
公开(公告)号：US07174190B2
公开(公告)日：2007-02-06
申请号：US11131093
申请日：2005-05-16
申请人： Brett C. Walker , Paul E. Peterzell , Tao Li , Matthew L. Severson
发明人： Brett C. Walker , Paul E. Peterzell , Tao Li , Matthew L. Severson
IPC分类号： H04B1/38
CPC分类号： H03G3/3078 , H03G3/3068 , H03G3/3089
摘要： A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.
摘要翻译：具有用于去除信号分量的DC偏移的DC环路的直接下变频接收机架构，提供一系列增益的数字可变增益放大器（DVGA），用于为DVGA和RF提供增益控制的自动增益控制（AGC）回路 /模拟电路和串行总线接口（SBI）单元，通过串行总线为RF /模拟电路提供控制。可以如本文所述有利地设计和定位DVGA。可以基于DC循环的操作模式来选择VGA循环的操作模式，因为这两个循环彼此相互作用。在采集模式下，DC环路工作的持续时间可以被选择为与采集模式中的DC环路带宽成反比。一些或全部RF /模拟电路的控制可以通过串行总线提供。

7. 发明授权

US07915954B2 Amplifier predistortion and autocalibration method and apparatus 有权
标题翻译：放大器预失真和自动校准方法和装置
公开(公告)号：US07915954B2
公开(公告)日：2011-03-29
申请号：US10987360
申请日：2004-11-12
申请人： Arun Raghupathy , Puay Hoe See , Gurkanwal Kamal Sahota , Robert Reeves , Paul E. Peterzell
发明人： Arun Raghupathy , Puay Hoe See , Gurkanwal Kamal Sahota , Robert Reeves , Paul E. Peterzell
IPC分类号： H03F3/68
CPC分类号： H03F1/3247 , H03F1/0222 , H03F1/3282 , H03F2201/3233 , H03G3/3047
摘要： Methods and apparatus for amplifier AM and PM predistortion and autocalibration. AM and PM amplifier distortion can be corrected using predistortion. The AM and PM distortion characteristics of the amplifier are determined using an autocalibration technique. The amplifier characteristics can be stored in distinct look up tables. Alternatively, the inverse of the amplifier characteristics can be stored in distinct look up tables. Signals that are to be amplified are characterized in polar format having a phase component with a normalized magnitude and a magnitude component. The phase component can be predistorted by applying the inverse of the PM distortion characteristics to the signal. Similarly, the magnitude component can be predistorted by applying the inverse of the AM distortion characteristics to the signal. The predistorted phase component can be amplified using the previously characterized amplifier. The predistorted magnitude component can be used to set the gain of the previously characterized amplifier.
摘要翻译：放大器AM和PM预失真和自动校准的方法和装置。 AM和PM放大器失真可以使用预失真校正。使用自动校准技术确定放大器的AM和PM失真特性。放大器特性可以存储在不同的查找表中。或者，放大器特性的倒数可以存储在不同的查找表中。要被放大的信号的特征在于具有归一化幅度和幅度分量的相位分量的极化格式。通过将PM失真特性的反相应用于信号，可以对相位分量进行预失真。类似地，幅度分量可以通过将AM失真特性的反相应用于信号来预失真。可以使用先前描述的放大器来放大预失真相位分量。预失真幅度分量可用于设置先前表征的放大器的增益。

8. 发明授权

US06496685B2 Portable phone with imbedded battery 失效
标题翻译：便携式手机带嵌入式电池
公开(公告)号：US06496685B2
公开(公告)日：2002-12-17
申请号：US09097612
申请日：1998-06-15
申请人： Paul E. Peterzell , David J. Ross , Marland Chow
发明人： Paul E. Peterzell , David J. Ross , Marland Chow
IPC分类号： H04B138
CPC分类号： H04M1/0262
摘要： A portable phone has an outer casing with opposite upper and lower walls, one of the walls having an opening for access to the interior of the casing, and a lid removably mounted in the opening for normally closing the opening. A main circuit board is mounted in the outer casing, with a plurality of phone components mounted on the circuit board. A predetermined region of the board aligned with the opening is left exposed or empty of components, and forms a recess for receiving a battery. The battery receiving recess has contact pads, and a battery is removably engaged in the recess with battery contacts engaging the contact pads in the recess, whereby the battery can be removed and replaced via the opening after opening the lid.
摘要翻译：便携式电话具有外壳，其具有相对的上壁和下壁，其中一个壁具有用于进入壳体内部的开口，以及可拆卸地安装在开口中以用于正常关闭开口的盖。主电路板安装在外壳中，多个电话部件安装在电路板上。与开口对准的板的预定区域被暴露或清空部件，并形成用于接收电池的凹部。电池接收凹部具有接触垫，并且电池可移除地接合在凹部中，电池触点与凹部中的接触垫接合，由此在打开盖之后可以经由开口移除电池并更换电池。

9. 发明授权

US06194869B1 Circuit to connect battery to load only in presence of a load of acceptable magnitude 失效
标题翻译：电路只能在负载可接受的大小的情况下将电池连接到负载
公开(公告)号：US06194869B1
公开(公告)日：2001-02-27
申请号：US09082512
申请日：1998-05-21
申请人： Paul E. Peterzell
发明人： Paul E. Peterzell
IPC分类号： H01M1046
CPC分类号： H02H3/12 , H02H7/18 , H02J7/0031 , H02J7/0036
摘要： A battery protection circuit for an external battery pack has a switch for controlling connection of a battery output to a load, and a detector for detecting a resistance at a load output terminal. A first comparator compares the detected resistance to a predetermined maximum value, and a second comparator compares the detected resistance to a predetermined minimum value. If the detected resistance is in the range between the minimum and maximum values, a control signal is produced to enable connection of the battery output to the load. If the detected resistance is outside the range, the switch is disabled and no current can flow to the load.
摘要翻译：用于外部电池组的电池保护电路具有用于控制电池输出与负载的连接的开关和用于检测负载输出端子的电阻的检测器。第一比较器将检测到的电阻与预定的最大值进行比较，而第二比较器将检测到的电阻与预定的最小值进行比较。如果检测到的电阻在最小值和最大值之间的范围内，则产生控制信号以使电池输出与负载连接。如果检测到的电阻超出了该范围，开关被禁用，电流不能流向负载。

10. 发明授权

US06175279B1 Amplifier with adjustable bias current 失效
标题翻译：具有可调偏置电流的放大器
公开(公告)号：US06175279B1
公开(公告)日：2001-01-16
申请号：US09034979
申请日：1998-03-04
申请人： Steven C. Ciccarelli , Ralph E. Kaufman , Paul E. Peterzell
发明人： Steven C. Ciccarelli , Ralph E. Kaufman , Paul E. Peterzell
IPC分类号： H03F304
CPC分类号： H03G3/3068 , H03F1/0261 , H03F1/342 , H03F2200/294 , H03F2200/331 , H03F2200/372 , H03G1/0088 , H04B1/1027 , H04B1/109
摘要： An amplifier having an adjustable current source which can be controlled to provide the requisite level of performance at reduced current consumption. The amplifier is first designed using one of many designs available and known in the art. A current source is then designed to provide adjustable bias current for the amplifier. The current source can be designed with MOSFETs which require no additional bias current and can accept a standard digital control signal. The current source can also be designed with active devices which are selected based on the logic of the control signals for ease of interface. The bias current determines the linearity and noise performance of the amplifier. The bias current is adjusted to provide the requisite level of performance while reducing power consumption. The current source can be designed to operate in discrete steps or to have substantially continuous current steps.
摘要翻译：具有可调节电流源的放大器，其可被控制以在降低的电流消耗下提供必要的性能水平。该放大器首先使用本领域已知的许多设计中的一种进行设计。然后设计电流源以为放大器提供可调偏置电流。电流源可以设计为不需要附加偏置电流并可接受标准数字控制信号的MOSFET。电流源也可以设计成基于控制信号的逻辑选择的有源器件，以便于接口。偏置电流决定放大器的线性和噪声性能。调整偏置电流以提供必要的性能水平，同时降低功耗。电流源可以设计成以离散步骤操作或具有基本连续的电流步骤。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式