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1. 发明授权

US5307502A Data processing system having multiple register management for call and return operations 失效
标题翻译：数据处理系统具有多个用于呼叫和返回操作的寄存器管理
公开(公告)号：US5307502A
公开(公告)日：1994-04-26
申请号：US945930
申请日：1992-09-17
申请人： Tan Watanabe , Keiichi Kurakazu , Yugo Kashiwagi , Keisuke Toyama , Tohru Nojiri
发明人： Tan Watanabe , Keiichi Kurakazu , Yugo Kashiwagi , Keisuke Toyama , Tohru Nojiri
IPC分类号： G06F15/00 , G06F9/30 , G06F9/318 , G06F9/355 , G06F9/40 , G06F9/42 , G06F9/46 , G06F9/48 , G06F12/00 , G06F12/02
CPC分类号： G06F9/30138 , G06F9/30105 , G06F9/30127 , G06F9/30134 , G06F9/342 , G06F9/4425 , G06F9/461 , G06F9/462
摘要： In a computer system equipped with a large number of registers which have an access time much shorter than that of a main memory, a register designating address part in which the assignment of an area register having a register address of a register area as its value and the assignment of a register displacement value expressing a relative register address within the register area are combined is provided in each instruction so that, even when physical registers are increased, save and restore of registers attendant upon task switches, etc. may be lessened to attain a raised speed of program run processing. Besides, an address part for designating main memory is provided in the same instruction.
摘要翻译：在配备有大量寄存器的计算机系统中，其存取时间比主存储器短得多;寄存器指定地址部分，其中具有寄存器区域的寄存器地址的区域寄存器的分配作为其值，以及在每个指令中提供了表示寄存器区域内的相对寄存器地址的寄存器位移值的分配，使得即使当物理寄存器增加时，也可以减少对任务切换等等的寄存器的保存和恢复以达到程序运行处理速度提高。此外，在同一指令中提供了用于指定主存储器的地址部分。

2. 发明授权

US5517664A RISC system with instructions which include register area and displacement portions for accessing data stored in registers during processing 失效
标题翻译：具有指令的RISC系统，其包括用于在处理期间访问存储在寄存器中的数据的寄存器区域和位移部分
公开(公告)号：US5517664A
公开(公告)日：1996-05-14
申请号：US459965
申请日：1995-06-02
申请人： Tan Watanabe , Keiichi Kurakazu , Yugo Kashiwagi , Keisuke Toyama , Tohru Nojiri
发明人： Tan Watanabe , Keiichi Kurakazu , Yugo Kashiwagi , Keisuke Toyama , Tohru Nojiri
IPC分类号： G06F15/00 , G06F9/30 , G06F9/318 , G06F9/355 , G06F9/40 , G06F9/42 , G06F9/46 , G06F9/48 , G06F12/00 , G06F12/02
CPC分类号： G06F9/30138 , G06F9/30105 , G06F9/30127 , G06F9/30134 , G06F9/342 , G06F9/4425 , G06F9/461 , G06F9/462
摘要： In a computer system equipped with a large number of registers which have an access time much shorter than that of a main memory, a register designating address part in which the assignment of an area register having a register address of a register area as its value and the assignment of a register displacement value expressing a relative register address within the register area are combined is provided in each instruction so that, even when physical registers are increased, save and restore of registers attendant upon task switches, etc. may be lessened to attain a raised speed of program run processing.Besides, an address part for designating the main memory is provided in the same instruction.
摘要翻译：在配备有大量寄存器的计算机系统中，其存取时间比主存储器短得多;寄存器指定地址部分，其中具有寄存器区域的寄存器地址的区域寄存器的分配作为其值，以及在每个指令中提供了表示寄存器区域内的相对寄存器地址的寄存器位移值的分配，使得即使当物理寄存器增加时，也可以减少对任务切换等等的寄存器的保存和恢复以达到程序运行处理速度提高。此外，在相同的指令中提供了用于指定主存储器的地址部分。

3. 发明授权

US5450610A RISC system capable of performing calls and returns without advancing or restoring window pointers 失效
标题翻译： RISC系统能够执行调用和返回，而无需前进或恢复窗口指针
公开(公告)号：US5450610A
公开(公告)日：1995-09-12
申请号：US183830
申请日：1994-01-21
申请人： Tan Watanabe , Keiichi Kurakazu , Yugo Kashiwagi , Keisuke Toyama , Thoru Nojiri
发明人： Tan Watanabe , Keiichi Kurakazu , Yugo Kashiwagi , Keisuke Toyama , Thoru Nojiri
IPC分类号： G06F15/00 , G06F9/30 , G06F9/318 , G06F9/355 , G06F9/40 , G06F9/42 , G06F9/46 , G06F9/48 , G06F12/00 , G06F12/02
CPC分类号： G06F9/30138 , G06F9/30105 , G06F9/30127 , G06F9/30134 , G06F9/342 , G06F9/4425 , G06F9/461 , G06F9/462
摘要： In a computer system equipped with a large number of registers which have an access time much shorter than that of a main memory, a register designating address part in which the assignment of an area register having a register address of a register area as its value and the assignment of a register displacement value expressing a relative register address within the register area are combined is provided in each instruction so that, even when physical registers are increased, save and restore of registers attendant upon task switches, etc. may be lessened to attain a raised speed of program run processing. Besides, an address part for designating the main memory is provided in the same instruction.
摘要翻译：在配备有大量寄存器的计算机系统中，其存取时间比主存储器短得多;寄存器指定地址部分，其中具有寄存器区域的寄存器地址的区域寄存器的分配作为其值，以及在每个指令中提供了表示寄存器区域内的相对寄存器地址的寄存器位移值的分配，使得即使当物理寄存器增加时，也可以减少对任务切换等等的寄存器的保存和恢复以达到程序运行处理速度提高。此外，在相同的指令中提供了用于指定主存储器的地址部分。

4. 发明授权

US5214786A RISC system performing calls and returns without saving or restoring window pointers and delaying saving until multi-register areas are filled 失效
标题翻译： RISC系统执行调用和返回，而不保存或恢复窗口指针，并延迟保存，直到填充多个寄存器区域
公开(公告)号：US5214786A
公开(公告)日：1993-05-25
申请号：US37843
申请日：1987-04-13
申请人： Tan Watanabe , Keiichi Kurakazu , Yugo Kashiwagi , Keisuke Toyama , Thoru Nojiri
发明人： Tan Watanabe , Keiichi Kurakazu , Yugo Kashiwagi , Keisuke Toyama , Thoru Nojiri
IPC分类号： G06F15/00 , G06F9/30 , G06F9/318 , G06F9/355 , G06F9/40 , G06F9/42 , G06F9/46 , G06F9/48 , G06F12/00 , G06F12/02
CPC分类号： G06F9/30138 , G06F9/30105 , G06F9/30127 , G06F9/30134 , G06F9/342 , G06F9/4425 , G06F9/461 , G06F9/462
摘要： In a computer system equipped with a large number of registers which have an access time much shorter than that of a main memory, a register designating address part in which the assignment of an area register having a register address of a register area as its value and the assignment of a register displacement value expressing a relative register address within the register area are combined is provided in each instruction so that, even when physical registers are increased, save and restore of registers attendant upon task switches, etc. may be lessened to attain a raised speed of program run processing.Besides, an address part for designating the main memory is provided in the same instruction.
摘要翻译：在配备有大量寄存器的计算机系统中，其存取时间比主存储器短得多;寄存器指定地址部分，其中具有寄存器区域的寄存器地址的区域寄存器的分配作为其值，以及在每个指令中提供了表示寄存器区域内的相对寄存器地址的寄存器位移值的分配，使得即使当物理寄存器增加时，也可以减少对任务切换等等的寄存器的保存和恢复以达到程序运行处理速度提高。此外，在相同的指令中提供了用于指定主存储器的地址部分。

5. 发明授权

US5293594A Data processing system having a plurality of register groups and a logical or circuit for addressing one register of one of the register groups 失效
标题翻译：具有多个寄存器组的数据处理系统和用于寻址一个寄存器组的一个寄存器的逻辑或电路
公开(公告)号：US5293594A
公开(公告)日：1994-03-08
申请号：US503626
申请日：1990-04-03
申请人： Tohru Nojiri , Shunpei Kawasaki , Tan Watanabe , Kousuke Sakoda
发明人： Tohru Nojiri , Shunpei Kawasaki , Tan Watanabe , Kousuke Sakoda
IPC分类号： G06F12/02 , G06F12/06
CPC分类号： G06F12/0292
摘要： In order to divide a memory addressed unidimensionally into a plurality of memory areas and to manage efficiently these memory areas, the address to be accessed inside the memory is determined on a software basis by a computer instruction by use of the value of a first pointer designating each memory area and the value of a second pointer designating the relative address in the designated memory area.
摘要翻译：为了将被一维地寻址的存储器分割成多个存储区域并且有效地管理这些存储区域，存储器内部要访问的地址由软件基础上由计算机指令通过使用第一指针的值指定每个存储器区域和指定指定存储器区域中的相对地址的第二指针的值。

6. 发明授权

US5068804A Document input method and apparatus 失效
标题翻译：文件输入法和装置
公开(公告)号：US5068804A
公开(公告)日：1991-11-26
申请号：US520133
申请日：1990-05-07
申请人： Tan Watanabe , Hideki Nishino , Hidefumi Iwami , Kuniaki Tabata
发明人： Tan Watanabe , Hideki Nishino , Hidefumi Iwami , Kuniaki Tabata
IPC分类号： G06F17/21 , G06T11/20
CPC分类号： G06T11/206
摘要： An input method and an input apparatus wherein a sketch read by an image scanner is displayed on the display, the class of component figure is designated thereon, characteristic values are input, and positions of characteristic points are designated such that a figure of fair copy is automatically prepared. Further, the sketch and the figure of fair copy are displayed being superposed upon each other while modifying the brightness or color so that the results of input can be easily recognized, making it possible to reduce the work for inputting the figure and to easily determine the size and position of the figure on the document which is a constituent component. In preparing the figure of fair copy by recognizing through a pattern recognition device the sketch that is input by the image scanner, furthermore, those portions that were not properly recognized are input again by the above method and apparatus.
摘要翻译：一种输入方法和输入装置，其中在显示器上显示由图像扫描器读取的草图，在其上指定分量图形的类别，输入特征值，并且指定特征点的位置，使得公平拷贝的图形为自动准备此外，在修改亮度或颜色的同时，将草图和公平复制图叠加在一起，使得可以容易地识别输入的结果，从而可以减少输入图形的工作并且容易地确定在作为组成部分的文件上的数字的大小和位置。在通过图案识别装置识别由图像扫描仪输入的草图的情况下准备公平拷贝的图形，此外，通过上述方法和装置再次输入未被正确识别的那些部分。

7. 发明授权

US06343373B1 Retargetable information process system 失效
标题翻译：可重定位信息处理系统
公开(公告)号：US06343373B1
公开(公告)日：2002-01-29
申请号：US09222954
申请日：1998-12-30
申请人： Shinobu Koizumi , Ichiro Kyushima , Tan Watanabe , Toshiaki Kohno , Singi Domen
发明人： Shinobu Koizumi , Ichiro Kyushima , Tan Watanabe , Toshiaki Kohno , Singi Domen
IPC分类号： G06F945
CPC分类号： G06F11/3664 , G06F8/447 , G06F8/47 , G06F11/362 , G06F11/3624
摘要： A translator system for translating source programs into machine language programs in an electronic computer system. An object program common to a plurality of different machine types of computers are generated while implementing execution performance equivalent to object programs inherent to the computers. A compiler translates a source program into an abstract object program including an abstract machine instruction sequence and indication concerning allocation of abstract registers. An installer converts the abstract object program into a machine language program of target computer on the basis of executable computer specification information including register usage indication and machine instruction selecting rules.
摘要翻译：一种用于将源程序翻译成电子计算机系统中的机器语言程序的翻译器系统。在实现与计算机固有的对象程序相当的执行性能的同时，生成多种不同机器类型的计算机共同的对象程序。编译器将源程序转换为抽象对象程序，包括抽象机器指令序列和关于抽象寄存器分配的指示。安装者根据包括登记使用指示和机器指令选择规则的可执行计算机指定信息，将抽象对象程序转换为目标计算机的机器语言程序。

8. 发明授权

US5564031A Dynamic allocation of registers to procedures in a digital computer 失效
标题翻译：动态分配寄存器到数字计算机中的程序
公开(公告)号：US5564031A
公开(公告)日：1996-10-08
申请号：US629041
申请日：1996-04-12
申请人： Frederic C. Amerson , Robert M. English , Rajiv Gupta , Tan Watanabe
发明人： Frederic C. Amerson , Robert M. English , Rajiv Gupta , Tan Watanabe
IPC分类号： G06F9/42 , G06F7/72 , G06F9/30 , G06F9/46 , G06F9/48 , G06F12/06
CPC分类号： G06F9/462 , G06F7/72 , G06F9/30123 , G06F9/30134
摘要： In a digital computer, a circular queue of registers in a register file are allocated as temporary local storage for procedures rather than using the known caller/callee save convention in order to minimize main memory references. A called procedure dynamically allocates local registers as needed without regard to registers used by the caller of the procedure or by any callee of the procedure, whereby register allocation is not restricted by any predetermined window size. Local registers, including parameter passing registers, are allocated in the called procedure, rather than a priori at compile time, by adjusting register stack pointer values. Only the number of registers actually required by the procedure need by allocated. Optionally, rotating registers may be allocated among the local registers. Stack pointer values are stored in one of the parameter passing registers when a procedure is called. Hardware register file access circuitry maps virtual register numbers used by the procedures into the hardware register file. Upon return from a procedure, registers are deallocated by adjusting the register stack pointers to the values stored when the procedure was called.
摘要翻译：在数字计算机中，寄存器文件中的寄存器的循环队列被分配为用于过程的临时本地存储器，而不是使用已知的调用者/被调用者保存约定来最小化主存储器引用。被调用的过程根据需要动态地分配本地寄存器，而不考虑由过程的调用者使用的寄存器或过程的任何被调用者，由此寄存器分配不受任何预定窗口大小的限制。本地寄存器（包括参数传递寄存器）在调用过程中被分配，而不是在编译时通过调整寄存器堆栈指针值来先验地分配。只有实际需要的寄存器数量需要分配。可选地，可以在本地寄存器之间分配旋转寄存器。调用过程时，堆栈指针值存储在参数传递寄存器之一中。硬件寄存器文件访问电路将程序使用的虚拟寄存器编号映射到硬件寄存器文件中。从过程返回时，通过将寄存器堆栈指针调整到调用过程时存储的值来释放寄存器。

9. 发明授权

US5586323A Compilier system using an intermediate abstract form and machine-specific installers 失效
标题翻译： Compilier系统使用中间抽象形式和机器特定的安装程序
公开(公告)号：US5586323A
公开(公告)日：1996-12-17
申请号：US872773
申请日：1992-04-23
申请人： Shinobu Koizumi , Ichiro Kyushima , Tan Watanabe , Toshiaki Kohno , Singi Domen
发明人： Shinobu Koizumi , Ichiro Kyushima , Tan Watanabe , Toshiaki Kohno , Singi Domen
IPC分类号： G06F9/45 , G06F11/36 , G06F9/44
CPC分类号： G06F11/3664 , G06F11/362 , G06F11/3624 , G06F8/447 , G06F8/47
摘要： A translator system for translating source programs into machine language programs in an electronic computer system. An object program common to a plurality of different machine types of computers are generated while implementing execution performance equivalent to object programs inherent to the computers. A compiler translates a source program into an abstract object program including an abstract machine instruction sequence and indication concerning allocation of abstract registers. An installer converts the abstract object program into a machine language program of target computer on the basis of executable computer specification information including register usage indication and machine instruction selecting rules.
摘要翻译：一种用于将源程序翻译成电子计算机系统中的机器语言程序的翻译器系统。在实现与计算机固有的对象程序相当的执行性能的同时，生成多种不同机器类型的计算机共同的对象程序。编译器将源程序转换为抽象对象程序，包括抽象机器指令序列和关于抽象寄存器分配的指示。安装者根据包括登记使用指示和机器指令选择规则的可执行计算机指定信息，将抽象对象程序转换为目标计算机的机器语言程序。

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