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1. 发明授权

US5311476A Semiconductor memory, components and layout arrangements thereof, and method of testing the memory 失效
公开(公告)号：US5311476A
公开(公告)日：1994-05-10
申请号：US943341
申请日：1992-06-18
申请人： Takeshi Kajimoto , Yutaka Shimbo , Katsuyuki Sato , Masahiro Ogata , Kanehide Kenmizaki , Shouji Kubono , Nobuo Kato , Kiichi Manita , Michitaro Kanamitsu
发明人： Takeshi Kajimoto , Yutaka Shimbo , Katsuyuki Sato , Masahiro Ogata , Kanehide Kenmizaki , Shouji Kubono , Nobuo Kato , Kiichi Manita , Michitaro Kanamitsu
IPC分类号： G01R31/26 , G01R31/28 , G11C11/401 , G11C11/403 , G11C11/406 , G11C11/407 , G11C11/408 , G11C11/409 , G11C11/4093 , G11C29/00 , G11C29/02 , G11C29/14 , G11C29/50 , H01L21/82 , H01L21/822 , H01L21/8242 , H01L27/04 , H01L27/10 , H01L27/108 , H03K3/037 , H03K19/096
CPC分类号： G11C29/027 , G11C11/406 , G11C11/4093 , G11C29/02 , G11C29/50 , G11C29/50012 , G11C29/50016 , G11C2029/5004
摘要： There is provided in connection with a semiconductor memory, such as of the pseudostatic RAM, a layout of the circuit components thereof including a method of testing the memory. There is provided an oscillation circuit which is capable of withstanding bumping of the power source voltage (varying) which effects stabilization regarding the operation of the circuits included therewith including a refresh timer circuit. There is also provided for testing a refresh timer circuit and a semiconductor memory which includes a refresh timer circuit. There is further provided for an output buffer which is capable of high speed operation with respect to memory data readout, a voltage generating circuit which is capable of stable operation and a fuse circuit, such as provided in connection with redundant circuitry in the memory and which is characterized as having a configuration of a fuse logic gate circuit employing complementary channel MOSFETs together with a fuse. With respect to the semiconductor memory, such as the pseudostatic RAM, the initial count of the refresh timer counter circuit of the refresh timer circuit can be set at an optional value by applying a signal to an address input terminal, and a test mode can be effected in which the refresh period can be set at an optional value by accordingly applying a test control signal to a predetermined external terminal. Therefore, the discharge current of the oscillation circuit capacitor associated with the refresh timer circuit becomes stabilized, noting the particular layout arrangement regarding the polycrystalline silicon layer forming the resistor of the oscillation circuit, and the fact that same parasitic capacitances are effectively connected between the polycrystalline silicon resistor and the supply voltage of the circuit and between the polycrystalline silicon resistor and the ground potential of the circuit thereby cancelling any variation of the output of the power source. Therefore, variation of the oscillation frequency of the oscillation circuit attributable to the bumping of the power source can be effectively suppressed.

2. 发明授权

US5467315A Semiconductor memory device facilitated with plural self-refresh modes 失效
标题翻译：具有多个自刷新模式的半导体存储器件
公开(公告)号：US5467315A
公开(公告)日：1995-11-14
申请号：US234414
申请日：1994-04-28
申请人： Takeshi Kajimoto , Yutaka Shimbo , Katsuyuki Sato , Masahiro Ogata , Kanehide Kenmizaki , Shouji Kubono , Nobuo Kato , Kiichi Manita , Michitaro Kanamitsu
发明人： Takeshi Kajimoto , Yutaka Shimbo , Katsuyuki Sato , Masahiro Ogata , Kanehide Kenmizaki , Shouji Kubono , Nobuo Kato , Kiichi Manita , Michitaro Kanamitsu
IPC分类号： G01R31/26 , G01R31/28 , G11C11/401 , G11C11/403 , G11C11/406 , G11C11/407 , G11C11/408 , G11C11/409 , G11C11/4093 , G11C29/00 , G11C29/02 , G11C29/14 , G11C29/50 , H01L21/82 , H01L21/822 , H01L21/8242 , H01L27/04 , H01L27/10 , H01L27/108 , H03K3/037 , H03K19/096 , G11C7/00
CPC分类号： G11C29/027 , G11C11/406 , G11C11/4093 , G11C29/02 , G11C29/50 , G11C29/50012 , G11C29/50016 , G11C2029/5004
摘要： The semiconductor memory is facilitated with control circuitry for effecting plural self-refresh modes having respectively different refresh periods. The plural self-refresh modes are typified by a PS (pseudo) refresh mode which is applied when the memory is in the nonselected state for a comparatively long period of time, such as in the state in which memory backup is being facilitated, and by a VS (virtual) refresh mode in which the refreshing operation of the memory cells is effected intermittently during the intervals of memory accessings. The pseudo refresh mode has a longer refresh time period than the virtual refresh mode. The control circuitry also has counter circuits for the generating of refresh address signals in accordance with a first timing signal indicative of a pseudo refresh mode and a second timing signal indicative of a virtual refresh mode, the latter timing signal being a higher frequency signal. Such availability of plural self-refresh modes becomes particularly advantageous when considering consumption of the back-up power for maintaining the IC memory device versus stability of stored data. While the consumption of the back-up power for maintaining the device would be relatively lower under one of the self-refresh modes, namely, the PS (pseudo) refresh mode, the stability of data stored would, however, be greater under another self-refresh mode, namely, the VS (virtual) refresh mode.
摘要翻译：利用用于实现分别具有不同刷新周期的多个自刷新模式的控制电路来促进半导体存储器。多个自刷新模式以PS（伪）刷新模式为代表，当存储器处于非选择状态较长时间段时，例如在便于存储器备份的状态下，以及由在存储器访问的间隔期间间歇地执行存储器单元的刷新操作的VS（虚拟）刷新模式。伪刷新模式具有比虚拟刷新模式更长的刷新时间段。控制电路还具有用于根据指示伪刷新模式的第一定时信号和指示虚拟刷新模式的第二定时信号产生刷新地址信号的计数器电路，后一定时信号是较高频率信号。当考虑用于维持IC存储器件的备用电源与存储的数据的稳定性的消耗时，这种多重自刷新模式的可用性变得特别有利。虽然在自刷新模式之一（即PS）（伪）刷新模式下，用于维持设备的备份功率的消耗将相对较低，但是存储的数据的稳定性在另一个自身下将更大 - 刷新模式，即VS（虚拟）刷新模式。

3. 发明授权

US5161120A Data output buffer for a semiconductor memory 失效
标题翻译：半导体存储器的数据输出缓冲器
公开(公告)号：US5161120A
公开(公告)日：1992-11-03
申请号：US496531
申请日：1990-03-20
申请人： Takeshi Kajimoto , Yutaka Shimbo , Katsuyuki Sato , Masahiro Ogata , Kanehide Kenmizaki , Shouji Kubono , Nobuo Kato , Kiichi Manita , Michitaro Kanamitsu
发明人： Takeshi Kajimoto , Yutaka Shimbo , Katsuyuki Sato , Masahiro Ogata , Kanehide Kenmizaki , Shouji Kubono , Nobuo Kato , Kiichi Manita , Michitaro Kanamitsu
IPC分类号： G01R31/26 , G01R31/28 , G11C11/401 , G11C11/403 , G11C11/406 , G11C11/407 , G11C11/408 , G11C11/409 , G11C11/4093 , G11C29/00 , G11C29/02 , G11C29/14 , G11C29/50 , H01L21/82 , H01L21/822 , H01L21/8242 , H01L27/04 , H01L27/10 , H01L27/108 , H03K3/037 , H03K19/096
CPC分类号： G11C29/027 , G11C11/406 , G11C11/4093 , G11C29/02 , G11C29/50 , G11C29/50012 , G11C29/50016 , G11C2029/5004
摘要： A data output buffer is provided in connection with a semiconductor memory, such as a pseudostatic RAM, which is capable of high speed operation with respect to memory data readout. The buffer includes a latch circuit comprising a pair of NAND gate circuits having input and output terminals connected in cross connection, a pair of precharge MOSFETs provided respectively between the noninverted and inverted input terminals of the latch circuit, a pair of CMOS NAND gates which transfer the inverted signal of the latch circuit according to an inverted timing signal and a pair of series-connected MOSFETs effecting a pull-up/pull-down arrangement which receives the inverted signal of the output signal of the NAND gates.
摘要翻译：数据输出缓冲器与诸如伪稳态RAM的半导体存储器相关地提供，其能够相对于存储器数据读出而进行高速操作。该缓冲器包括一个锁存电路，该锁存电路包括一对具有交叉连接的输入和输出端的NAND门电路，分别设置在锁存电路的非反相和反相输入端之间的一对预充电MOSFET，一对转换根据反相定时信号的锁存电路的反相信号和实现上拉/下拉布置的一对串联MOSFET，其接收NAND门输出信号的反相信号。

4. 发明申请

US20090220292A1 Tape printing apparatus 有权
标题翻译：胶带印刷装置
公开(公告)号：US20090220292A1
公开(公告)日：2009-09-03
申请号：US12380071
申请日：2009-02-23
申请人： Nobuo Kato
发明人： Nobuo Kato
IPC分类号： B41J11/00
CPC分类号： B41J3/4075 , B41J11/703
摘要： In the tape printing apparatus 1, in the state that the back cover 11 is not attached to the apparatus body 2, the coil spring member 22 urges the stopper member 15 so as to rotate and the cutter lever 5 becomes inoperable based on that the engagement portion 15A of the stopper member 15 is engaged with the difference portion 19 of the cutter lever 5, and in the state that the back cover 11 is attached to the apparatus body 2, the stopper member 5 is rotated against the urging force of the coil spring member 22 based on that the engagement lib 14 of the back cover 11 is engaged with the engagement portion 15B of the stopper member 15 and the cutter lever 5 becomes operable based on that the engagement portion 15A of the stopper member 15 is released from the difference portion 19 of the cutter lever 5.
摘要翻译：在带式打印设备1中，在后盖11未安装到设备主体2的状态下，螺旋弹簧部件22基于该接合件促使止动部件15旋转并且切割杆5变得不可操作止动构件15的部分15A与切割杆5的差异部分19接合，并且在后盖11附接到装置主体2的状态下，止动构件5抵抗线圈的作用力旋转基于后盖11的接合部分11b与止动构件15的接合部分15B接合并且基于止动构件15的接合部分15A从其中释放的切割杆5可操作的弹簧构件22 切割杆5的差分部19。

5. 发明授权

US07022339B2 Antidiabetic preparation for oral administration 失效
公开(公告)号：US07022339B2
公开(公告)日：2006-04-04
申请号：US10183322
申请日：2002-06-28
申请人： Chisato Makino , Nobutaka Ninomiya , Haruo Orita , Hidetoshi Sakai , Akira Yabuki , Nobuo Kato , Shigeru Shioya
发明人： Chisato Makino , Nobutaka Ninomiya , Haruo Orita , Hidetoshi Sakai , Akira Yabuki , Nobuo Kato , Shigeru Shioya
IPC分类号： A61K9/14 , A61K9/20 , A61K9/22 , A61K9/24 , A61K9/36
CPC分类号： A61K9/0095 , A61K9/146 , A61K9/1617 , A61K9/1647 , A61K9/1652 , A61K9/2054 , A61K9/209 , A61K9/2853 , A61K9/2866 , A61K9/5026 , A61K9/5031 , A61K9/5036 , A61K9/5084 , A61K31/195 , A61K31/198 , A61K45/06 , A61K2300/00
摘要： There is provided a single preparation which directly decreases both of the post prandial blood glucose level and the fasting blood glucose level close to normal levels, by release-sustaining a drug capable of decreasing the post prandial blood glucose level of diabetic patients close to the normal level, or mixing a controlled release drug capable of decreasing the post prandial blood glucose level close to the normal level with an immediate release drug. It is particularly preferable that the drug capable of decreasing the post prandial blood glucose level close to the normal level is nateglinide.

6. 发明申请

US20050167257A1 Key switches 有权
标题翻译：钥匙开关
公开(公告)号：US20050167257A1
公开(公告)日：2005-08-04
申请号：US10986935
申请日：2004-11-15
申请人： Nobuo Kato
发明人： Nobuo Kato
IPC分类号： H01H23/24 , H01H13/705 , H01H23/30 , H01H1/06
CPC分类号： H01H23/30 , H01H13/705 , H01H2221/016 , H01H2221/018 , H01H2221/058
摘要： A key switch includes a front cover formed with a cursor key hole. In the front cover, a first rib is formed on a first support wall and a second rib is formed on a second support wall. Accordingly, when a cursor key part disposed in the cursor key hole is pressed, it can be restrained against motion in a shorter side direction. The operationality of a cursor key can be improved, which allows a correct operation.
摘要翻译：键开关包括形成有光标键孔的前盖。在前盖中，第一肋形成在第一支撑壁上，第二肋形成在第二支撑壁上。因此，当按压设置在光标键孔中的光标键部分时，可以在短边方向上抑制其运动。可以改善光标键的操作性，这允许正确的操作。

7. 发明授权

US06843275B2 High-pressure fuel injection pipe 有权
标题翻译：高压燃油喷射管
公开(公告)号：US06843275B2
公开(公告)日：2005-01-18
申请号：US10858731
申请日：2004-06-02
申请人： Nobuo Kato
发明人： Nobuo Kato
IPC分类号： F02M61/16 , F02M55/00 , F02M55/02 , F02M61/18 , F16L19/02 , F16L19/028 , F16L9/00
CPC分类号： F02M55/02 , F16L19/0225 , F16L19/028
摘要： A high-pressure fuel injection pipe has a connecting head portion increased in diameter by buckling molding at the end of a thick and small-diameter metallic pipe. An under-head portion of the connecting head is formed with a thick wall portion that satisfies conditions of: a radius of curvature R1 of a portion A of the thick wall portion continuing to the connecting head is 0.03 to 0.15 times the outer diameter of the pipe; a radius of curvature R2 of a portion B continuing from the portion A of the thick wall portion to a straight pipe portion is 0.3 to 1.5 times the outer diameter of the pipe; and a maximum diametrical size w of the thick wall portion is 0.25 to 0.4 times a maximum diametrical projecting length W of the connecting head.
摘要翻译：高压燃料喷射管具有通过在小直径金属管的端部处弯曲成型而直径增大的连接头部。连接头的下头部形成有厚壁部，其满足以下条件：连续到连接头的厚壁部的部分A的曲率半径R1为所述连接头的外径的0.03〜0.15倍管; 从厚壁部分的A部分延伸到直管部分的部分B的曲率半径R2是管的外径的0.3至1.5倍; 厚壁部的最大直径尺寸w为连接头的最大径向突出长度W的0.25〜0.4倍。

8. 发明授权

US06840283B2 High-pressure fuel injection pipe having connecting head portion 失效
标题翻译：具有连接头部的高压燃料喷射管
公开(公告)号：US06840283B2
公开(公告)日：2005-01-11
申请号：US10439830
申请日：2003-05-16
申请人： Munekatsu Furugen , Shigeyuki Ishida , Nobuo Kato
发明人： Munekatsu Furugen , Shigeyuki Ishida , Nobuo Kato
IPC分类号： F02M55/00 , F02M55/02 , F16L19/02 , F16L19/028 , F16L9/00
CPC分类号： F02M55/02 , B21J5/08 , F02M55/005 , F16L19/0283
摘要： A high-pressure fuel injection pipe having connecting head portion is provided which is capable of eliminating a fear of the occurrence of cavitation erosion of the inner surface of the connecting head portion and a fatigue failure of the same head portion by having a contour of a cross section of an annular pocket occurring in an inner part of the connecting head portion during a head portion processing operation extend shallowly and gently. This fuel injection pipe has at a connecting end portion of a thick-walled steel pipe having a relatively small diameter, including a seat surface, an annular flange formed so that the flange is axially spaced from the seat surface, and a conical surface connected to the seat surface, extending therefrom to the annular flange and tapering off to a free end of the connecting head portion, wherein the conical surface is provided at a part thereof with an annular, shallow, cross-sectionally curved recess.
摘要翻译：提供具有连接头部的高压燃料喷射管，其能够消除对连接头部的内表面的气蚀的恐惧和相同头部的疲劳破坏的恐惧，在头部处理操作期间在连接头部的内部产生的环形袋的横截面浅浅地轻轻延伸。该燃料喷射管具有直径相对较小的厚壁钢管的连接端部，包括座面，形成为使得凸缘与座面轴向间隔开的环形凸缘，以及连接到座面从其延伸到环形凸缘并且逐渐变细到连接头部分的自由端，其中锥形表面在其一部分处设置有环形的，浅的横截面弯曲的凹部。

9. 发明授权

US06830759B2 Antidiabetic preparation for oral administration 失效
标题翻译：用于口服给药的抗糖尿病制剂
公开(公告)号：US06830759B2
公开(公告)日：2004-12-14
申请号：US10183405
申请日：2002-06-28
申请人： Chisato Makino , Nobutaka Ninomiya , Haruo Orita , Hidetoshi Sakai , Akira Yabuki , Nobuo Kato , Shigeru Shioya
发明人： Chisato Makino , Nobutaka Ninomiya , Haruo Orita , Hidetoshi Sakai , Akira Yabuki , Nobuo Kato , Shigeru Shioya
IPC分类号： A61K920
CPC分类号： A61K31/00 , A61K9/2077 , A61K9/2081 , A61K31/195 , A61K45/06
摘要： There is provided a single preparation which directly decreases both of the post prandial blood glucose level and the fasting blood glucose level close to normal levels, by release-sustaining a drug capable of decreasing the post prandial blood glucose level of diabetic patients close to the normal level, or mixing a controlled release drug capable of decreasing the post prandial blood glucose level close to the normal level with an immediate release drug. It is particularly preferable that the drug capable of decreasing the post prandial blood glucose level close to the normal level is nateglinide, repaglinide, or mitiglinide (KAD-1229).
摘要翻译：提供了一种直接降低餐后血糖水平和接近正常水平的空腹血糖水平的单一制剂，通过释放维持能够降低接近正常的糖尿病患者的餐后血糖水平的药物或者使用立即释放药物混合能够降低接近正常水平的餐后血糖水平的控释药物。特别优选能够降低接近正常水平的餐后血糖水平的药物是那格列奈，瑞格列奈或米格列奈（KAD-1229）。

10. 发明授权

US06431243B1 Laminating apparatus 有权
标题翻译：复合机
公开(公告)号：US06431243B1
公开(公告)日：2002-08-13
申请号：US09664051
申请日：2000-09-18
申请人： Akira Ito , Nobuo Kato , Masaru Moriguchi , Motohito Muraki
发明人： Akira Ito , Nobuo Kato , Masaru Moriguchi , Motohito Muraki
IPC分类号： B32B3104
CPC分类号： B32B37/226 , B32B2307/208 , B32B2309/06 , B32B2309/10 , Y10T156/1741
摘要： A laminate apparatus having a laminate target supply unit that supplies a laminate target along a supply path, a sheet supply unit in which a pair of upper and lower sheets being wound in roll shape are detachably mounted, the sheet supply unit supplying a pair of sheets to laminate the laminate target, a laminate processor, a laminate processor that laminates the laminate target supplied with the pair of sheets when the laminate target is sandwiched between the pair of sheets and then feeds the laminated product outwardly. The laminate processor includes a pair of upper and lower pinch rollers disposed in the laminating processor, a pair of upper and lower sheet guide portions disposed between the pinch rollers and the sides of the sheets drawn from the pair of sheet rolls. The sheets drawn from the sheet rolls contact the sheet guide portions and the centers of each sheet roll are disposed at positions apart from leadlines of the sheets which connect the peripheries of the pinching roller in the slide contact portions of the sheet guides.
摘要翻译：一种层叠装置，具有沿着供给路径供给层压体的层叠目标供给单元，能够可拆卸地安装卷绕成卷状的上下一对片材的片材供给单元，供给单元供给一对片材层压板，叠层处理器，叠层处理器，当层叠目标夹在一对片材之间时，层叠被供给的一对片材的叠层体，然后向外供给叠层体。层叠处理器包括一对设置在层压处理器中的上下夹送辊，一对上下片引导部分，设置在夹送辊与从一对片卷之间拉出的片的侧面之间。从片材辊拉出的片材接触片材引导部分，并且每个片材卷的中心设置在与片材引导件的滑动接触部分中的夹持辊的外周连接的片材的引线之间的位置。

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