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1. 发明授权

US07561765B2 Optical integrated circuit and optical integrated circuit module 有权
标题翻译：光集成电路和光集成电路模块
公开(公告)号：US07561765B2
公开(公告)日：2009-07-14
申请号：US12045281
申请日：2008-03-10
申请人： Masaki Funabashi , Junichi Hasegawa , Takeshi Akutsu , Kazutaka Nara , Noriyuki Yokouchi
发明人： Masaki Funabashi , Junichi Hasegawa , Takeshi Akutsu , Kazutaka Nara , Noriyuki Yokouchi
IPC分类号： G02B6/12
CPC分类号： G02B6/12004 , G02B6/12021
摘要： An optical integrated circuit 1 according to the present invention includes a planar lightwave circuit 2, and a semiconductor element 3, which are fixed at one contact surface 12. A semiconductor optical amplifier (SOA) 9 is formed on a semiconductor substrate 8. A semiconductor waveguide 10 and a semiconductor waveguide 11 are formed on an input side and an output side of SOA 9, respectively. The semiconductor waveguide 11 has a turnaround portion 11a turned around on the semiconductor substrate 8. Respective ends of the optical waveguides 5 and 6 on a PLC platform 4 and respective ends of semiconductor waveguides 10 and 11 are optically coupled with each other at the contact surface 12.
摘要翻译：根据本发明的光集成电路1包括固定在一个接触表面12上的平面光波电路2和半导体元件3.半导体光电放大器（SOA）9形成在半导体衬底8上。半导体波导10和半导体波导11分别形成在SOA 9的输入侧和输出侧。半导体波导11具有在半导体基板8上转动的转向部分11a。PLC平台4上的光波导5和6的各端和半导体波导10和11的相应端在接触表面处彼此光学耦合 12。

2. 发明申请

US20080240645A1 OPTICAL INTEGRATED CIRCUIT AND OPTICAL INTEGRATED CIRCUIT MODULE 有权
标题翻译：光集成电路和光集成电路模块
公开(公告)号：US20080240645A1
公开(公告)日：2008-10-02
申请号：US12045281
申请日：2008-03-10
申请人： Masaki FUNABASHI , Junichi Hasegawa , Takeshi Akutsu , Kazutaka Nara , Noriyuki Yokouchi
发明人： Masaki FUNABASHI , Junichi Hasegawa , Takeshi Akutsu , Kazutaka Nara , Noriyuki Yokouchi
IPC分类号： G02B6/12
CPC分类号： G02B6/12004 , G02B6/12021
摘要： An optical integrated circuit 1 according to the present invention includes a planar lightwave circuit 2, and a semiconductor element 3, which are fixed at one contact surface 12. A semiconductor optical amplifier (SOA) 9 is formed on a semiconductor substrate 8. A semiconductor waveguide 10 and a semiconductor waveguide 11 are formed on an input side and an output side of SOA 9, respectively. The semiconductor waveguide 11 has a turnaround portion 11a turned around on the semiconductor substrate 8. Respective ends of the optical waveguides 5 and 6 on a PLC platform 4 and respective ends of semiconductor waveguides 10 and 11 are optically coupled with each other at the contact surface 12.
摘要翻译：根据本发明的光集成电路1包括固定在一个接触表面12处的平面光波电路2和半导体元件3。在半导体基板8上形成半导体光放大器（SOA）9。分别在SOA 9的输入侧和输出侧形成半导体波导10和半导体波导11。半导体波导11具有在半导体基板8上转动的周转部11a。 PLC平台4上的光波导5和6的相应端和半导体波导10和11的相应端在接触表面12处彼此光学耦合。

3. 发明申请

US20110110622A1 HYBRID INTEGRATED OPTICAL MODULE 失效
标题翻译：混合集成光模块
公开(公告)号：US20110110622A1
公开(公告)日：2011-05-12
申请号：US12942481
申请日：2010-11-09
申请人： Takeshi AKUTSU , Junichi Hasegawa , Kazutaka Nara
发明人： Takeshi AKUTSU , Junichi Hasegawa , Kazutaka Nara
IPC分类号： G02B6/12 , H01P11/00
CPC分类号： G02B6/4225 , Y10T29/49016
摘要： The present invention provides a hybrid integrated optical module having a high coupling efficiency by suppressing a connection loss between waveguides. A hybrid integrated optical module according to an embodiment of the present invention is an optical module which integrates a semiconductor chip and a PLC chip. The semiconductor chip has a semiconductor waveguide and is mounted on a Si bench. The PLC chip includes a PLC substrate and an optical waveguide formed on the PLC substrate. An end face of the semiconductor chip protrudes from an end face of the Si bench toward the PLC chip side by a protrusion amount X. Gap adjustment (adjustment of a distance D) between the semiconductor waveguide and the optical waveguide becomes possible by setting a position where the end face of the semiconductor chip is brought into contact with an end face of the PLC chip to be a reference position (zero point).
摘要翻译：本发明通过抑制波导之间的连接损耗来提供具有高耦合效率的混合集成光模块。根据本发明的实施例的混合集成光学模块是集成了半导体芯片和PLC芯片的光学模块。半导体芯片具有半导体波导并且安装在Si台架上。 PLC芯片包括形成在PLC基板上的PLC基板和光波导。半导体芯片的端面从Si台架的端面朝向PLC芯片侧突出突出量X.通过设置半导体波导和光波导之间的间隙调整（距离D的调整）可以进行位置其中半导体芯片的端面与PLC芯片的端面接触成为基准位置（零点）。

4. 发明申请

US20100111468A1 OPTICAL INTEGRATED CIRCUIT AND OPTICAL INTEGRATED CIRCUIT MODULE 审中-公开
标题翻译：光集成电路和光集成电路模块
公开(公告)号：US20100111468A1
公开(公告)日：2010-05-06
申请号：US12482233
申请日：2009-06-10
申请人： Masaki FUNABASHI , Junichi Hasegawa , Takeshi Akutsu , Kazutaka Nara , Noriyuki Yokouchi
发明人： Masaki FUNABASHI , Junichi Hasegawa , Takeshi Akutsu , Kazutaka Nara , Noriyuki Yokouchi
IPC分类号： G02B6/122
CPC分类号： G02B6/12004 , G02B6/12021
摘要： An optical integrated circuit includes a planar lightwave circuit, and a semiconductor element, which are fixed at one contact surface. A semiconductor optical amplifier (SOA) and a turnaround waveguide having a turnaround portion are formed on a semiconductor substrate. The turnaround waveguide is turned around on the second substrate and is connected to an output port of the SOA. An input port and an output port of the turnaround waveguide are optically coupled at the contact surface with an input port and an output port of the optical waveguides respectively.
摘要翻译：光学集成电路包括固定在一个接触表面的平面光波电路和半导体元件。在半导体衬底上形成半导体光放大器（SOA）和具有折回部分的周转波导。转向波导在第二基板上转动并连接到SOA的输出端口。转向波导的输入端口和输出端口在接触表面处分别与光波导的输入端口和输出端口耦合。

5. 发明授权

US08503843B2 Hybrid integrated optical module 失效
标题翻译：混合集成光模块
公开(公告)号：US08503843B2
公开(公告)日：2013-08-06
申请号：US12942481
申请日：2010-11-09
申请人： Takeshi Akutsu , Junichi Hasegawa , Kazutaka Nara
发明人： Takeshi Akutsu , Junichi Hasegawa , Kazutaka Nara
IPC分类号： G02B6/26 , G02B6/12
CPC分类号： G02B6/4225 , Y10T29/49016
摘要： The present invention provides a hybrid integrated optical module having a high coupling efficiency by suppressing a connection loss between waveguides. A hybrid integrated optical module according to an embodiment of the present invention is an optical module which integrates a semiconductor chip and a PLC chip. The semiconductor chip has a semiconductor waveguide and is mounted on a Si bench. The PLC chip includes a PLC substrate and an optical waveguide formed on the PLC substrate. An end face of the semiconductor chip protrudes from an end face of the Si bench toward the PLC chip side by a protrusion amount X. Gap adjustment (adjustment of a distance D) between the semiconductor waveguide and the optical waveguide becomes possible by setting a position where the end face of the semiconductor chip is brought into contact with an end face of the PLC chip to be a reference position (zero point).
摘要翻译：本发明通过抑制波导之间的连接损耗来提供具有高耦合效率的混合集成光模块。根据本发明的实施例的混合集成光学模块是集成了半导体芯片和PLC芯片的光学模块。半导体芯片具有半导体波导并且安装在Si台架上。 PLC芯片包括形成在PLC基板上的PLC基板和光波导。半导体芯片的端面从Si台架的端面朝向PLC芯片侧突出突出量X.通过设置半导体波导和光波导之间的间隙调整（距离D的调整）可以进行位置其中半导体芯片的端面与PLC芯片的端面接触成为基准位置（零点）。

6. 发明授权

US07884996B2 Delay-line demodulator 失效
标题翻译：延迟线解调器
公开(公告)号：US07884996B2
公开(公告)日：2011-02-08
申请号：US12629846
申请日：2009-12-02
申请人： Junichi Hasegawa , Kazutaka Nara
发明人： Junichi Hasegawa , Kazutaka Nara
IPC分类号： G02F2/00 , G02B6/12
CPC分类号： G02F2/00 , H04B10/505 , H04B10/677
摘要： A delay-line demodulator for demodulating a differential quadrature phase shift keying (DQPSK) signal is provided. The demodulator includes two Mach-Zehnder interferometers individually comprising two waveguides having different lengths therebetween and through which a light signal branched from the DQPSK signal propagates, respectively. A phase of the light signal propagating at one of the waveguides is delayed as compared to a phase of the light signal propagating at another one of the waveguides, wherein a divergence amount of polarization is adjusted by driving sets of heaters that are facing each other and sandwiching a half wavelength plate therebetween.
摘要翻译：提供了用于解调差分正交相移键控（DQPSK）信号的延迟线解调器。解调器包括两个马赫 - 曾德干涉仪，它们分别包括两个不同长度的波导，分别从DQPSK信号分支的光信号通过该波导传播。与在另一个波导上传播的光信号的相位相比，在波导中的一个传播的光信号的相位被延迟，其中通过驱动彼此面对的加热器组来调节偏振的发散量，在其间夹着半波片。

7. 发明申请

US20110008002A1 ARRAYED-WAVEGUIDE-GRATING-TYPE OPTICAL MULTIPLEXER/DEMULTIPLEXER 失效
标题翻译：阵列式光栅型光学多路复用器/解复用器
公开(公告)号：US20110008002A1
公开(公告)日：2011-01-13
申请号：US12831662
申请日：2010-07-07
申请人： Junichi HASEGAWA , Kazutaka Nara
发明人： Junichi HASEGAWA , Kazutaka Nara
IPC分类号： G02B6/34 , G02B6/10
CPC分类号： G02B6/1203 , G02B6/12033
摘要： A multiplexer/demultiplexer includes: a waveguide chip including a first chip and a second chip that are divided by a plane and obtained by cutting, together with a substrate, in a direction crossing an optical axis, a first slab waveguide of an AWG including the first slab waveguide and a second slab waveguide that are formed on the substrate; a first base to which the first chip is fixed; a second base separated from the first base and to which the second chip is fixed; and a member that has one end fixed to the first base or chip and another end fixed to the second base or chip, in a state in which cut surfaces of the first and second chips face each other, and that is configured to move the first base and the second base relatively to each other along the plane by expanding/contracting when temperature changes.
摘要翻译：多路复用器/解复用器包括：波导芯片，包括由平面划分得到的第一芯片和第二芯片，所述第一芯片和第二芯片与基板一起沿与光轴交叉的方向切割，所述第一芯片和第二芯片包括AWG的第一平板波导第一平板波导和形成在基板上的第二平板波导; 固定第一芯片的第一基座; 与所述第一基座分离并且所述第二芯片固定到所述第二基座的第二基座; 以及在第一和第二芯片的切割面彼此面对的状态下固定到第一基座或芯片的一端固定到第二基座或芯片的另一端部，并且构造成将第一基部和第二基座在温度变化时通过膨胀/收缩沿着平面彼此相对。

8. 发明授权

US07539368B2 Arrayed waveguide grating 失效
标题翻译：阵列波导光栅
公开(公告)号：US07539368B2
公开(公告)日：2009-05-26
申请号：US12041231
申请日：2008-03-03
申请人： Junichi Hasegawa , Kazutaka Nara
发明人： Junichi Hasegawa , Kazutaka Nara
IPC分类号： G02B6/12 , G02B6/34
CPC分类号： G02B6/1203 , G02B6/12014
摘要： An arrayed waveguide grating has optical input waveguides, a first slab waveguide, an arrayed waveguide comprising plural waveguides of mutually-different lengths, a second slab waveguide and plural optical output waveguides. The first slab waveguide is divided along division surfaces crossing the light path into divided slab waveguides. The divided slab waveguide is temperature-dependently moved along the division surfaces by sliding members which are formed of members exhibiting different expansion/contraction corresponding to temperature change. The sliding members are configured to move the divided slab waveguide in their respective mutually-different temperature ranges in the operating temperature range of the arrayed waveguide grating. A sliding distance of the divided slab waveguide is used as a temperature-dependence reduction amount that varies as temperature changes so as to reduce the temperature difference of the light transmission center wavelength of the arrayed waveguide grating.
摘要翻译：阵列波导光栅具有光输入波导，第一平板波导，包括相互不同长度的多个波导的阵列波导，第二平板波导和多个光输出波导。将第一平板波导沿着穿过光路的划分表面划分成分开的平板波导。分开的平板波导通过由对应于温度变化显示不同的膨胀/收缩的构件形成的滑动构件沿分割表面温度依赖地移动。滑动构件被构造成在阵列波导光栅的工作温度范围内将分开的平板波导移动到它们各自相互不同的温度范围内。使用分开的平板波导的滑动距离作为随着温度变化而变化的温度依赖性降低量，以降低阵列波导光栅的透光中心波长的温差。

9. 发明授权

US08457459B2 Arrayed-waveguide-grating-type optical multiplexer/demultiplexer 失效
标题翻译：阵列波导光栅型光复用器/解复用器
公开(公告)号：US08457459B2
公开(公告)日：2013-06-04
申请号：US12831662
申请日：2010-07-07
申请人： Junichi Hasegawa , Kazutaka Nara
发明人： Junichi Hasegawa , Kazutaka Nara
IPC分类号： G02B6/26 , G02B6/42
CPC分类号： G02B6/1203 , G02B6/12033
摘要： A multiplexer/demultiplexer includes: a waveguide chip including a first chip and a second chip that are divided by a plane and obtained by cutting, together with a substrate, in a direction crossing an optical axis, a first slab waveguide of an AWG including the first slab waveguide and a second slab waveguide that are formed on the substrate; a first base to which the first chip is fixed; a second base separated from the first base and to which the second chip is fixed; and a member that has one end fixed to the first base or chip and another end fixed to the second base or chip, in a state in which cut surfaces of the first and second chips face each other, and that is configured to move the first base and the second base relatively to each other along the plane by expanding/contracting when temperature changes.
摘要翻译：多路复用器/解复用器包括：波导芯片，包括由平面划分得到的第一芯片和第二芯片，所述第一芯片和第二芯片与基板一起沿与光轴交叉的方向切割，所述第一芯片和第二芯片包括AWG的第一平板波导第一平板波导和形成在基板上的第二平板波导; 固定第一芯片的第一基座; 与所述第一基座分离并且所述第二芯片固定到所述第二基座的第二基座; 以及在第一和第二芯片的切割面彼此面对的状态下固定到第一基座或芯片的一端固定到第二基座或芯片的另一端部，并且构造成将第一基部和第二基座在温度变化时通过膨胀/收缩沿着平面彼此相对。

10. 发明授权

US07978401B2 Delay demodulation devices 失效
标题翻译：延时解调装置
公开(公告)号：US07978401B2
公开(公告)日：2011-07-12
申请号：US12415407
申请日：2009-03-31
申请人： Junichi Hasegawa , Kazutaka Nara
发明人： Junichi Hasegawa , Kazutaka Nara
IPC分类号： H04B10/06 , G02F2/00
CPC分类号： G02B6/12007 , G02B6/125 , H04B10/677
摘要： The delay demodulation device 1 comprises: an input waveguide 2 which receives DQPSK signals; a Y-branch waveguide 3 which splits the input waveguide 2; a first Mach-Zehnder interferometer 4; and a second Mach-Zehnder interferometer 5. Both end of two arm-waveguides 8, 9 of the first Mach-Zehnder interferometer 4 and both ends of two arm-waveguides 12, 13 of the second Mach-Zehnder interferometer 5 are angled toward the center portion of a planar lightwave circuit (PLC) 1A. Because of the angle, the length of the two arm-waveguides 8, 9 of the first Mach-Zehnder interferometer 4 and the length of the two arm-waveguides 12, 13 of the second Mach-Zehnder interferometer 5 in Z-direction can be shortened, and input couplers 6,10 and output couplers 7,11 of each Mach-Zehnder interferometers in Z-direction can be shortened as well. The area occupied by each Mach-Zehnder interferometers 4, 5 are also reduced.
摘要翻译：延迟解调装置1包括：输入波导2，其接收DQPSK信号; 分割输入波导2的Y分支波导3; 第一马赫 - 曾德干涉仪4; 和第二马赫 - 策德尔干涉仪5.第二马赫 - 策德尔干涉仪4的两个臂波导8,9的两端和第二马赫 - 策德尔干涉仪5的两个臂波导12,13的两端相对于平面光波电路（PLC）1A的中心部分。由于角度，第一马赫 - 策德尔干涉仪4的两个臂波导8,9的长度和第二马赫 - 策德尔干涉仪5的两个臂波导12,13在Z方向上的长度可以是每个马赫 - 策德尔干涉仪在Z方向上的缩短和输入耦合器6,10和输出耦合器7,11也可以被缩短。每个马赫 - 曾德干涉仪4,5所占据的面积也减少了。

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