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1. 发明授权

US06445055B1 Semiconductor integrated circuit device and manufacturing method thereof 有权
公开(公告)号：US06445055B1
公开(公告)日：2002-09-03
申请号：US09924588
申请日：2001-08-09
申请人： Takayuki Iwasakii , Yusuke Takeuchi , Yoshiaki Yuyama , Shinichi Tanabe , Koki Sakai , Minehiro Nemoto , Seigo Yukutake , Yasuyuki Kojima , Atsuo Watanabe , Mitsuaki Horiuchi
发明人： Takayuki Iwasakii , Yusuke Takeuchi , Yoshiaki Yuyama , Shinichi Tanabe , Koki Sakai , Minehiro Nemoto , Seigo Yukutake , Yasuyuki Kojima , Atsuo Watanabe , Mitsuaki Horiuchi
IPC分类号： H01L2900
摘要： A circuit region 2 on a main surface of an SOI substrate, and a isolating region 9b defined by insulating isolation trenches 4a and 4b are connected by a wiring resistor, or a diffused resistor 11a in the SOI substrate. The isolating region 9b and an intermediate region 9 are connected by a wiring resistor, or a diffused resistor 11b in the SOI substrate. Furthermore, a circuit region 3 on a main surface of an SOI substrate, and a isolating region 9c defined by insulating isolation trenches 4c and 4d are connected by a wiring resistor, or a diffused resistor 11d in the SOI substrate. The isolating region 9c and an intermediate region 9 are connected by a wiring resistor, or a diffused resistor 11c in the SOI substrate. As a result, distribution of voltage applied between the circuit regions 2 and 3 by the wiring resistors or the diffused resistors 11a to 11d can increase the withstand voltage of a semiconductor integrated circuit.

2. 发明授权

US07289553B2 Isolator and a modem device using the isolator 失效
公开(公告)号：US07289553B2
公开(公告)日：2007-10-30
申请号：US10377670
申请日：2003-03-04
申请人： Seigoh Yukutake , Yasuyuki Kojima , Minehiro Nemoto , Masatsugu Amishiro , Takayuki Iwasaki , Shinichiro Mitani , Katsuhiro Furukawa , Chiyoshi Kamada , Atsuo Watanabe , Takayuki Oouchi , Nobuyasu Kanekawa
发明人： Seigoh Yukutake , Yasuyuki Kojima , Minehiro Nemoto , Masatsugu Amishiro , Takayuki Iwasaki , Shinichiro Mitani , Katsuhiro Furukawa , Chiyoshi Kamada , Atsuo Watanabe , Takayuki Oouchi , Nobuyasu Kanekawa
IPC分类号： H04B1/38 , H01L29/00
CPC分类号： H04L25/0266 , H01L2924/0002 , H04L25/0268 , H04L25/0272 , H04L25/028 , H04L25/0292 , H04L27/0002 , H04M11/06 , H01L2924/00
摘要： A communication system is provided including a transceiver and an application controller to transmit and receive signals through the transceiver. An isolator which insulates and separates the transceiver and application controller includes primary and secondary side circuits insulated from each other on a substrate and a capacitive insulating means to transfer signals between the primary and second sides while insulating and separating the primary side circuit from the secondary side circuit.

3. 发明申请

US20070153886A1 Isolator and a modem device using the isolator 失效
标题翻译：隔离器和使用隔离器的调制解调器设备
公开(公告)号：US20070153886A1
公开(公告)日：2007-07-05
申请号：US11714856
申请日：2007-03-07
申请人： Seigoh Yukutake , Yasuyuki Kojima , Minehiro Nemoto , Masatsugu Amishiro , Takayuki Iwasaki , Shinichiro Mitani , Katsuhiro Furukawa , Chiyoshi Kamada , Atsuo Watanabe , Takayuki Oouchi , Nobuyasu Kanekawa
发明人： Seigoh Yukutake , Yasuyuki Kojima , Minehiro Nemoto , Masatsugu Amishiro , Takayuki Iwasaki , Shinichiro Mitani , Katsuhiro Furukawa , Chiyoshi Kamada , Atsuo Watanabe , Takayuki Oouchi , Nobuyasu Kanekawa
IPC分类号： H04L5/16
CPC分类号： H04L25/0266 , H01L2924/0002 , H04L25/0268 , H04L25/0272 , H04L25/028 , H04L25/0292 , H04L27/0002 , H04M11/06 , H01L2924/00
摘要： A communication system is provided including a transceiver and an application controller to transmit and receive signals through the transceiver. An isolator which insulates and separates the transceiver and application controller includes primary and secondary side circuits insulated from each other on a substrate and a capacitive insulating means to transfer signals between the primary and second sides while insulating and separating the primary side circuit from the secondary side circuit.
摘要翻译：提供一种通信系统，包括收发机和应用控制器，用于通过收发信机发送和接收信号。绝缘和分离收发器和应用控制器的隔离器包括在基板上彼此绝缘的初级和次级侧电路和用于在初级侧和第二侧之间传递信号的电容绝缘装置，同时将初级侧电路与次级侧隔离电路。

4. 发明授权

US06603807B1 Isolator and a modem device using the isolator 失效
标题翻译：隔离器和使用隔离器的调制解调器设备
公开(公告)号：US06603807B1
公开(公告)日：2003-08-05
申请号：US09259058
申请日：1999-02-26
申请人： Seigoh Yukutake , Yasuyuki Kojima , Minehiro Nemoto , Masatsugu Amishiro , Takayuki Iwasaki , Shinichiro Mitani , Katsuhiro Furukawa , Chiyoshi Kamada , Atsuo Watanabe , Takayuki Oouchi , Nobuyasu Kanekawa
发明人： Seigoh Yukutake , Yasuyuki Kojima , Minehiro Nemoto , Masatsugu Amishiro , Takayuki Iwasaki , Shinichiro Mitani , Katsuhiro Furukawa , Chiyoshi Kamada , Atsuo Watanabe , Takayuki Oouchi , Nobuyasu Kanekawa
IPC分类号： H01L2900
CPC分类号： H04L25/0266 , H01L2924/0002 , H04L25/0268 , H04L25/0272 , H04L25/028 , H04L25/0292 , H04L27/0002 , H04M11/06 , H01L2924/00
摘要： An isolator is made monolithic by forming a capacitive insulating barrier using an interlayer insulation film on the semiconductor substrate to miniaturize the modem device by the monolithic isolator.
摘要翻译：隔离器通过在半导体衬底上形成使用层间绝缘膜的电容绝缘屏障来制成单片，以通过单片隔离器使调制解调器装置小型化。

5. 发明授权

US07522692B2 Isolator and a modem device using the isolator 失效
标题翻译：隔离器和使用隔离器的调制解调器设备
公开(公告)号：US07522692B2
公开(公告)日：2009-04-21
申请号：US11714856
申请日：2007-03-07
申请人： Seigoh Yukutake , Yasuyuki Kojima , Minehiro Nemoto , Masatsugu Amishiro , Takayuki Iwasaki , Shinichiro Mitani , Katsuhiro Furukawa , Chiyoshi Kamada , Atsuo Watanabe , Takayuki Oouchi , Nobuyasu Kanekawa
发明人： Seigoh Yukutake , Yasuyuki Kojima , Minehiro Nemoto , Masatsugu Amishiro , Takayuki Iwasaki , Shinichiro Mitani , Katsuhiro Furukawa , Chiyoshi Kamada , Atsuo Watanabe , Takayuki Oouchi , Nobuyasu Kanekawa
IPC分类号： H04L23/00 , H04B1/38 , H01L29/00
CPC分类号： H04L25/0266 , H01L2924/0002 , H04L25/0268 , H04L25/0272 , H04L25/028 , H04L25/0292 , H04L27/0002 , H04M11/06 , H01L2924/00
摘要： A communication system is provided including a transceiver and an application controller to transmit and receive signals through the transceiver. An isolator which insulates and separates the transceiver and application controller includes primary and secondary side circuits insulated from each other on a substrate and a capacitive insulating means to transfer signals between the primary and second sides while insulating and separating the primary side circuit from the secondary side circuit.
摘要翻译：提供一种通信系统，包括收发机和应用控制器，用于通过收发信机发送和接收信号。绝缘和分离收发器和应用控制器的隔离器包括在基板上彼此绝缘的初级和次级侧电路和用于在初级侧和第二侧之间传递信号的电容绝缘装置，同时将初级侧电路与次级侧隔离电路。

6. 发明授权

US08134207B2 High breakdown voltage semiconductor circuit device 失效
标题翻译：高击穿电压半导体电路器件
公开(公告)号：US08134207B2
公开(公告)日：2012-03-13
申请号：US12028157
申请日：2008-02-08
申请人： Atsuo Watanabe
发明人： Atsuo Watanabe
IPC分类号： H01L29/66 , H01L27/12 , H01L29/786 , H01L21/02 , H01L21/70
CPC分类号： H01L27/1203 , H01L21/76283 , H01L21/76286 , H01L29/0619 , H01L29/0634 , H01L29/0878 , H01L29/1095 , H01L29/402 , H01L29/41775 , H01L29/66325 , H01L29/66681 , H01L29/7394 , H01L29/7824
摘要： In a high breakdown voltage semiconductor element among elements integrated together on an SOI substrate in which its rated voltage is shared between an embedded oxide layer and a drain region formed by an element active layer, both high integration and high breakdown voltage are realized while also securing suitability for practical implementation and practical use. The high breakdown voltage is realized without hampering size reduction of the element by forming an electrically floating layer of a conductivity type opposite to that of the drain region at the surface of the drain region. Further, the thickness of the embedded oxide layer is reduced to a level suitable for the practical implementation and practical use by setting the thickness of the element active layer of the SOI substrate at 30 μm or more.
摘要翻译：在集成在SOI衬底上的元件之间的高耐压电压半导体元件中，其中在由衬底的氧化物层和由元件有源层形成的漏极区域之间共享额定电压，实现高集成度和高击穿电压，同时还确保适用于实际实施和实际应用。通过在漏极区的表面形成与漏极区相反的导电类型的电浮置层，实现了高的击穿电压，而不会妨碍元件的尺寸减小。此外，通过将SOI衬底的元件有源层的厚度设定为30μm以上，将嵌入氧化物层的厚度减小到适于实际实现和实际应用的水平。

7. 发明授权

US08081781B2 A/V amplifier and method for driving the same 有权
标题翻译： A / V放大器及其驱动方法
公开(公告)号：US08081781B2
公开(公告)日：2011-12-20
申请号：US11814791
申请日：2006-02-23
申请人： Atsuo Watanabe
发明人： Atsuo Watanabe
IPC分类号： H02B1/00
CPC分类号： H04S5/02 , H03F3/181 , H03F3/217 , H03F3/68 , H03F2200/03
摘要： For achieving an audio reproduction with high sound quality, in a multi-channel A/V amplifier, front speakers are driven with a parallel-drive bi-amplifier arrangement upon stereo reproduction. In the case of the multi-channel reproduction mode, the switching circuit allows an output signal of each channel of the decoder to be sent to speakers via amplifiers for each channel in one-to-one correspondence. On the other hand, in the case of the 2-channel stereo reproduction mode, the switching circuit allows at least two amplifiers among the plurality of amplifiers to be connected in parallel between the output signal for each of the channels L and R of the decoder and the speakers for each of the channels L and R, and also allows the timing of the output signals of the respective amplifiers to be varied.
摘要翻译：为了实现高音质的音频再现，在多声道A / V放大器中，在立体声再现时，前置扬声器由并行驱动双放大器布置驱动。在多声道再现模式的情况下，切换电路允许解码器的每个声道的输出信号通过一个对应的每个声道的放大器发送到扬声器。另一方面，在2声道立体声再现模式的情况下，切换电路允许多个放大器中的至少两个放大器并联连接在解码器的每个通道L和R的输出信号之间以及每个通道L和R的扬声器，并且还允许各个放大器的输出信号的定时改变。

8. 发明申请

US20080153216A1 Method for manufacturing silicon carbide semiconductor device 有权
标题翻译：碳化硅半导体器件的制造方法
公开(公告)号：US20080153216A1
公开(公告)日：2008-06-26
申请号：US12071186
申请日：2008-02-19
申请人： Rajesh Kumar , Tsuyoshi Yamamoto , Hiroki Nakamura , Toshiyuki Morishita , Takasumi Ohyanagi , Atsuo Watanabe
发明人： Rajesh Kumar , Tsuyoshi Yamamoto , Hiroki Nakamura , Toshiyuki Morishita , Takasumi Ohyanagi , Atsuo Watanabe
IPC分类号： H01L21/82
CPC分类号： H01L29/1608 , H01L27/098 , H01L29/0619 , H01L29/66068 , H01L29/8083
摘要： A manufacturing method of a silicon carbide semiconductor device includes the steps of: preparing a semiconductor substrate including a silicon carbide substrate, a drift layer and a first semiconductor layer; forming a plurality of first trenches in a cell portion; forming a gate layer on an inner wall of each first trench by an epitaxial growth method; forming a first insulation film on the surface of the semiconductor substrate; forming a gate electrode on the first insulation film for connecting to the gate layer electrically; forming a source electrode on the first insulation film for connecting to the first semiconductor layer in the cell portion; and forming a drain electrode connected to the silicon carbide substrate electrically.
摘要翻译：碳化硅半导体器件的制造方法包括以下步骤：制备包括碳化硅衬底，漂移层和第一半导体层的半导体衬底; 在单元部分中形成多个第一沟槽; 通过外延生长法在每个第一沟槽的内壁上形成栅极层; 在所述半导体衬底的表面上形成第一绝缘膜; 在所述第一绝缘膜上形成用于电连接到所述栅极层的栅电极; 在所述第一绝缘膜上形成用于连接到所述单元部分中的所述第一半导体层的源电极; 以及电连接到所述碳化硅衬底的漏电极。

9. 发明申请

US20070241338A1 SIC semiconductor device and method for manufacturing the same 有权
标题翻译： SIC半导体器件及其制造方法
公开(公告)号：US20070241338A1
公开(公告)日：2007-10-18
申请号：US11783611
申请日：2007-04-10
申请人： Tsuyoshi Yamamoto , Toshio Sakakibara , Hiroki Nakamura , Toshiyuki Morishita , Takasumi Ooyanagi , Atsuo Watanabe
发明人： Tsuyoshi Yamamoto , Toshio Sakakibara , Hiroki Nakamura , Toshiyuki Morishita , Takasumi Ooyanagi , Atsuo Watanabe
IPC分类号： H01L31/0312
CPC分类号： H01L29/1608 , H01L29/0843 , H01L29/1066 , H01L29/8083 , H01L29/872
摘要： A SiC semiconductor device includes: a SiC substrate having a drain layer, a drift layer and a source layer stacked in this order; multiple trenches penetrating the source layer and reaching the drift layer; a gate layer on a sidewall of each trench; an insulation film on the sidewall of each trench covering the gate layer; a source electrode on the source layer; and a diode portion in or under the trench contacting the drift layer to provide a diode. The drift layer between the gate layer on the sidewalls of adjacent two trenches provides a channel region. The diode portion is coupled with the source electrode, and insulated from the gate layer with the insulation film.
摘要翻译： SiC半导体器件包括：具有漏极层，漂移层和源极层的SiC衬底; 多个沟槽穿透源层并到达漂移层; 每个沟槽的侧壁上的栅极层; 覆盖所述栅极层的每个沟槽的侧壁上的绝缘膜; 源极上的源电极; 以及与沟槽接触的沟槽中或下方的二极管部分，以提供二极管。相邻两个沟槽的侧壁上的栅极层之间的漂移层提供沟道区域。二极管部分与源电极耦合，并与绝缘膜与栅极层绝缘。

10. 发明申请

US20070221924A1 Semiconductor devices 有权
标题翻译：半导体器件
公开(公告)号：US20070221924A1
公开(公告)日：2007-09-27
申请号：US11802810
申请日：2007-05-25
申请人： Takasumi Ohyanagi , Atsuo Watanabe , Rajesh Malhan , Tsuyoshi Yamamoto , Toshiyuki Morishita
发明人： Takasumi Ohyanagi , Atsuo Watanabe , Rajesh Malhan , Tsuyoshi Yamamoto , Toshiyuki Morishita
IPC分类号： H01L29/772
CPC分类号： H01L29/66416 , H01L29/1608 , H01L29/7722 , H01L29/8083
摘要： A silicon carbide semiconductor device such as JFET, SIT and the like is provided for accomplishing a reduction in on-resistance and high-speed switching operations. In the JFET or SIT which turns on/off a current with a depletion layer extending in a channel between a gate region formed along trench grooves, a gate contact layer and a gate electrode, which can be supplied with voltages from the outside, are formed on one surface of a semiconductor substrate or on the bottom of the trench groove. A metal conductor (virtual gate electrode) is formed in ohmic contact with a p++ contact layer of the gate region on the bottom of the trench grooves independently of the gate electrode. The virtual gate electrode is electrically isolated from the gate electrode and an external wire.
摘要翻译：提供诸如JFET，SIT等的碳化硅半导体器件用于实现导通电阻和高速开关操作的降低。在JFET或SIT中，形成在沿着沟槽形成的栅极区之间的沟道中延伸的耗尽层的电流，可以从外部供应电压的栅极接触层和栅极电极在半导体衬底的一个表面上或在沟槽槽的底部。金属导体（虚拟栅电极）与沟槽沟槽底部的栅极区域的p ++接触层独立于栅电极形成欧姆接触。虚拟栅电极与栅极电极和外部电线电隔离。

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