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1. 发明授权

US4976216A Apparatus for vapor-phase growth 失效
标题翻译：气相生长装置
公开(公告)号：US4976216A
公开(公告)日：1990-12-11
申请号：US269348
申请日：1988-11-10
申请人： Takayoshi Maeda , Masahiko Hata , Yasunari Zempo , Noboru Fukuhara , Hiroaki Takata
发明人： Takayoshi Maeda , Masahiko Hata , Yasunari Zempo , Noboru Fukuhara , Hiroaki Takata
IPC分类号： H01L21/205 , C23C16/458 , C30B25/02 , C30B25/08 , C30B25/12 , C30B25/14
CPC分类号： C30B25/14 , C23C16/4588 , C30B25/02 , C30B25/08 , C30B25/12 , C30B29/42
摘要： In an apparatus for vapor-phase growth which comprises a reactor having an inlet for the introduction of the gas containing a source material on its top and a susceptor provided in the downstream portion of the reactor, the improvement wherein the susceptor is generally in a conical or polygonal pyramid form consisting of an upper rectifying portion and a lower substrate holding portion, with the diameter of the susceptor in its lower portion increasing by a greater degree than in its upper portion.
摘要翻译：在用于气相生长的装置中，其包括具有用于引入其顶部具有源材料的气体的入口和设置在反应器的下游部分中的基座的反应器，其中基座大体上为圆锥形或由上部整流部分和下部基板保持部分组成的多边形棱锥形状，其下部中的基座的直径比其上部增加更大的程度。

2. 发明授权

US5064778A Vapor-phase epitaxial growth method 失效
标题翻译：蒸气相外延生长法
公开(公告)号：US5064778A
公开(公告)日：1991-11-12
申请号：US472153
申请日：1990-01-30
申请人： Takayoshi Maeda , Masahiko Hata , Noboru Fukuhara , Tadeshi Watanabe
发明人： Takayoshi Maeda , Masahiko Hata , Noboru Fukuhara , Tadeshi Watanabe
IPC分类号： C30B25/02 , H01L21/205 , H01L21/20
CPC分类号： C30B25/02 , C30B29/40 , H01L21/02395 , H01L21/02463 , H01L21/02546 , H01L21/02576 , H01L21/0262 , Y10S148/065 , Y10S148/11
摘要： A vapor-phase epitaxial growth method for producing a Groups III-V compound semiconductor containing arsenic by vapor-phase epitaxial growth using arsenic trihydride as an arsenic source is disclosed, wherein said arsenic trihydride has a volatile impurity concentration of not more than 1.5 molppb on a germanium tetrahydride conversion. The resulting epitaxial crystal has a low residual carrier concentration and is applicable to a field effect transistor.

3. 发明授权

US5332451A Epitaxially grown compound-semiconductor crystal 失效
标题翻译：外延生长化合物半导体晶体
公开(公告)号：US5332451A
公开(公告)日：1994-07-26
申请号：US875410
申请日：1992-04-29
申请人： Masahiko Hata , Noboru Fukuhara , Takayoshi Maeda
发明人： Masahiko Hata , Noboru Fukuhara , Takayoshi Maeda
IPC分类号： H01L21/20 , H01L21/205 , H01L21/338 , H01L29/205 , H01L29/778 , H01L29/812 , H01L29/36
CPC分类号： H01L29/8128 , H01L21/02395 , H01L21/02461 , H01L21/02463 , H01L21/02543 , H01L21/02546 , H01L21/02581 , H01L29/205
摘要： An epitaxially grown compound-semiconductor crystal comprising a substrate, a buffer layer formed directly or indirectly on the substrate, and an active layer formed on the buffer layer. The buffer layer comprises (A) a high-resistivity AlGaAs or AlGaInP layer doped with oxygen or/and a transition metal and, formed thereon, (B) a layer consisting of high-purity GaAs, InGaP, or AlGaAs.
摘要翻译：一种外延生长的化合物半导体晶体，其包含基板，在基板上直接或间接形成的缓冲层以及形成在缓冲层上的活性层。缓冲层包括（A）掺杂有氧或/和过渡金属的高电阻率AlGaAs或AlGaInP层，并在其上形成（B）由高纯度GaAs，InGaP或AlGaAs组成的层。

4. 发明授权

US06946308B2 Method of manufacturing III-V group compound semiconductor 失效
标题翻译：制备III-V族化合物半导体的方法
公开(公告)号：US06946308B2
公开(公告)日：2005-09-20
申请号：US10396565
申请日：2003-03-26
申请人： Kazumasa Hiramatsu , Hideto Miyake , Shinya Bohyama , Takayoshi Maeda , Yasushi Iyechika
发明人： Kazumasa Hiramatsu , Hideto Miyake , Shinya Bohyama , Takayoshi Maeda , Yasushi Iyechika
IPC分类号： C30B29/38 , C30B25/02 , H01L21/205 , H01L29/201 , H01L33/32 , H01L21/00 , H01L33/00
CPC分类号： C30B25/02 , C30B29/403 , C30B29/406 , H01L21/0237 , H01L21/0242 , H01L21/02447 , H01L21/02458 , H01L21/0254 , H01L21/0262
摘要： When a crystal layer of III-V Group nitride compound semiconductor is formed, a nitride compound semiconductor layer is first overlaid on a substrate to form a base layer and a III-V Group nitride compound semiconductor represented by the general formula InxGayAlzN (where 0≦x≦1, 0≦y≦1, 0≦z≦1, x+y+z=1) is epitaxially grown on the base layer by hydride vapor phase epitaxy at a deposition pressure of not lower than 800 Torr. By making the deposition pressure not lower than 800 Torr, the crystallinity of the III-V Group nitride compound semiconductor can be markedly improved and its defect density reduced.
摘要翻译：当形成III-V族氮化物化合物半导体的晶体层时，首先将氮化物化合物半导体层重叠在基板上以形成基底层，并且由通式In x x表示的III-V族氮化物化合物半导体（其中0≤x≤1,0<= y <=1,0,0≤z≤1，x + y + z = 1）在不低于800托的沉积压力下通过氢化物气相外延在基底层上外延生长。通过使沉积压力不低于800托，III-V族氮化物化合物半导体的结晶度可以显着提高，并且其缺陷密度降低。

5. 发明授权

US4172108A Process for production of sialons 失效
标题翻译：赛隆生产工艺
公开(公告)号：US4172108A
公开(公告)日：1979-10-23
申请号：US861193
申请日：1977-12-14
申请人： Takayoshi Maeda
发明人： Takayoshi Maeda
IPC分类号： C04B35/599 , C01B21/082 , C04B35/597 , C04B35/626 , C04B35/44
CPC分类号： C04B35/597 , C01B21/0826
摘要： Sialon, which is one of promising materials in the field of engineering ceramics, is prepared by mixing a silicon nitride precursor such as amino- or imino-silanes and an alumina precursor such as trialkoxy- or triacyloxy-aluminums or polyaluminoxanes to obtain a sialon precursor, and then heating the sialon precursor at a temperature of not lower than 1000.degree. C. either in an ammonium or inert gas atmosphere or under reduced pressures.
摘要翻译：作为工程陶瓷领域中有希望的材料之一的赛隆，通过混合氮化硅前体如氨基或亚氨基硅烷和氧化铝前体如三烷氧基 - 铝或聚铝氧烷来制备，以获得赛隆前体，然后在不低于1000℃的温度下，在铵或惰性气体气氛中或减压下加热赛隆前体。

6. 发明申请

US20060172512A1 Substrate of gallium nitride single crystal and process for producing the same 有权
标题翻译：氮化镓单晶衬底及其制造方法
公开(公告)号：US20060172512A1
公开(公告)日：2006-08-03
申请号：US10546983
申请日：2004-03-04
申请人： Kazumasa Hiramatsu , Hideto Miyake , Shinya Bohyama , Takayoshi Maeda , Yoshinobu Ono
发明人： Kazumasa Hiramatsu , Hideto Miyake , Shinya Bohyama , Takayoshi Maeda , Yoshinobu Ono
IPC分类号： H01L21/20
CPC分类号： H01L21/02389 , H01L21/0242 , H01L21/02458 , H01L21/0254 , H01L21/0262 , H01L21/02642 , H01L21/02647
摘要： The present invention relates to a method for producing an epitaxial substrate having a III-V group compound semiconductor crystal represented by the general formula InxGayAlzN (wherein, x+y+z=1, 0≦x≦1, 0≦y≦1, 0≦z≦1) having reduced dislocation density, comprising a first step of covering with a mask made of a different material from the III-V group compound semiconductor so that only portions around points of the crystal constitute openings by using a III-V group compound semiconductor crystal having a plurality of projection shapes and a second step of growing the III-V group compound semiconductor crystal laterally by using the III-V group compound semiconductor crystal at the opening as a seed crystal. According to the present invention, an epitaxial substrate having a III-V group compound semiconductor crystal having low dislocation density and little warp is obtained.
摘要翻译：本发明涉及一种用于制造具有由通式为III-V族化合物半导体晶体表示的外延基板的方法，该III-V族化合物半导体晶体由以下通式表示：＆lt; N（其中，x + y + z = 1,0 <= x <=1,0,0≤i≤1,0<= z <= 1）具有降低的位错密度，包括第一步覆盖具有由与III-V族化合物半导体不同的材料制成的掩模，使得通过使用具有多个投影形状的III-V族化合物半导体晶体，仅使晶体周围的部分构成开口，第二步是使 III-V族化合物半导体晶体通过在开口处使用III-V族化合物半导体晶体作为晶种横向。根据本发明，获得具有位错密度低且翘曲少的III-V族化合物半导体晶体的外延基板。

7. 发明授权

US06503610B2 Group III-V compound semiconductor and method of producing the same 有权
标题翻译： III-V族化合物半导体及其制造方法
公开(公告)号：US06503610B2
公开(公告)日：2003-01-07
申请号：US09814875
申请日：2001-03-23
申请人： Kazumasa Hiramatsu , Hideto Miyake , Takayoshi Maeda , Yasushi Iyechika
发明人： Kazumasa Hiramatsu , Hideto Miyake , Takayoshi Maeda , Yasushi Iyechika
IPC分类号： C30B100
CPC分类号： C30B23/02 , C30B25/02 , C30B29/403 , C30B29/406 , H01L21/0242 , H01L21/02458 , H01L21/0254 , H01L21/0262 , H01L21/02639 , H01L21/02647 , H01L33/0066 , H01L33/007 , H01S2304/12 , Y10T428/24926
摘要： Provided is a method of producing a group III-V compound semiconductor having a low dislocation density without increasing the thickness of a re-grown layer, the method includes a re-growing process using a mask pattern, and threading dislocations in the re-grown layer are terminated by the voids formed on the pattern.
摘要翻译：提供了一种在不增加再生长层的厚度的情况下生产具有低位错密度的III-V族化合物半导体的方法，该方法包括使用掩模图案的再生长过程，以及再生长中的穿孔位错层被图案上形成的空隙终止。

8. 发明授权

US4533987A Power supply system 失效
标题翻译：电源系统
公开(公告)号：US4533987A
公开(公告)日：1985-08-06
申请号：US440425
申请日：1982-11-09
申请人： Yoshiaki Tomofuji , Takayoshi Maeda
发明人： Yoshiaki Tomofuji , Takayoshi Maeda
IPC分类号： H02M3/28 , H02M7/48 , H02M5/453
CPC分类号： H02M3/285 , H02M7/48
摘要： A power supply system is disclosed in which each of the phases of a three phase AC source are rectified and inverted. During inversion high frequency signals are obtained corresponding to the phases of the AC source which are synchronized so that their zero cross points occur at the same time. The high frequency signals are superposed in series to produce an output signal for a load which has a constant power and diminished current distortion.
摘要翻译：公开了一种电源系统，其中三相AC电源的每个相位被整流和反相。在反转期间，与同步的交流电源的相位相应地获得高频信号，使得它们的零交叉点同时出现。高频信号被串联叠加以产生具有恒定功率和减小的电流失真的负载的输出信号。

9. 发明授权

US07399687B2 Substrate of gallium nitride single crystal and process for producing the same 有权
标题翻译：氮化镓单晶衬底及其制造方法
公开(公告)号：US07399687B2
公开(公告)日：2008-07-15
申请号：US10546983
申请日：2004-03-04
申请人： Kazumasa Hiramatsu , Hideto Miyake , Shinya Bohyama , Takayoshi Maeda , Yoshinobu Ono
发明人： Kazumasa Hiramatsu , Hideto Miyake , Shinya Bohyama , Takayoshi Maeda , Yoshinobu Ono
IPC分类号： H01L21/20
CPC分类号： H01L21/02389 , H01L21/0242 , H01L21/02458 , H01L21/0254 , H01L21/0262 , H01L21/02642 , H01L21/02647
摘要： The present invention relates to a method for producing an epitaxial substrate having a III-V group compound semiconductor crystal represented by the general formula InxGayAlzN (wherein, x+y+z=1, 0≦x≦1, 0≦y≦1, 0≦z≦1) having reduced dislocation density, comprising a first step of covering with a mask made of a different material from the III-V group compound semiconductor so that only portions around points of the crystal constitute openings by using a III-V group compound semiconductor crystal having a plurality of projection shapes and a second step of growing the III-V group compound semiconductor crystal laterally by using the III-V group compound semiconductor crystal at the opening as a seed crystal. According to the present invention, an epitaxial substrate having a III-V group compound semiconductor crystal having low dislocation density and little warp is obtained.
摘要翻译：本发明涉及一种用于制造具有由通式为III-V族化合物半导体晶体表示的外延基板的方法，该III-V族化合物半导体晶体由以下通式表示：＆lt; N（其中，x + y + z = 1,0 <= x <=1,0,0≤i≤1,0<= z <= 1）具有降低的位错密度，包括第一步覆盖具有由与III-V族化合物半导体不同的材料制成的掩模，使得通过使用具有多个投影形状的III-V族化合物半导体晶体，仅使晶体周围的部分构成开口，第二步是使 III-V族化合物半导体晶体通过在开口处使用III-V族化合物半导体晶体作为晶种横向。根据本发明，获得具有位错密度低且翘曲少的III-V族化合物半导体晶体的外延基板。

10. 发明授权

US06844574B1 III-V compound semiconductor 失效
标题翻译： III-V族化合物半导体
公开(公告)号：US06844574B1
公开(公告)日：2005-01-18
申请号：US09522707
申请日：2000-03-10
申请人： Kazumasa Hiramatsu , Hideto Miyake , Takayoshi Maeda , Yasushi Iyechika
发明人： Kazumasa Hiramatsu , Hideto Miyake , Takayoshi Maeda , Yasushi Iyechika
IPC分类号： H01L21/205 , H01L33/00 , H01L33/02 , H01S5/323 , H01L29/04
CPC分类号： H01L33/025 , H01L21/0242 , H01L21/02458 , H01L21/0254 , H01L21/0262 , H01L21/02642 , H01L21/02647 , H01L33/0075 , H01S5/32341
摘要： Provided is a III-V compound semiconductor having a layer formed from a first III-V compound semiconductor expressed by the general formula InuGavAlwN (where 0≦u≦1, 0≦v≦1, 0≦w≦1, u+v+w=1), a pattern formed on the layer from a material different not only from the first III-V compound semiconductor but also from a second III-V compound semiconductor hereinafter described, and a layer formed on the first III-V compound semiconductor and the pattern from the second III-V compound semiconductor expressed by the general formula InxGayAlzN (where 0≦x≦1, 0≦y≦1, 0≦x≦1, x+y+z=1), wherein the full width at half maximum of the (0004) reflection X-ray rocking curve of the second III-V compound semiconductor is 700 seconds or less regardless of the direction of X-ray incidence. In the III-V compound semiconductor, which is a high quality semiconductor, the occurrence of low angle grain boundaries is suppressed.
摘要翻译：提供了具有由通式InuGavAlwN表示的第一III-V族化合物半导体形成的层的III-V族化合物半导体（其中0≤u≤1,0<=v≤1,0<= w < 1，u + v + w = 1），从不同于第一III-V族化合物半导体的材料形成在该层上的图案，以及由下文所述的第二III-V族化合物半导体形成的层第一III-V族化合物半导体和由通式InxGayAlzN表示的第二III-V族化合物半导体的图案（其中0 <= x <= 1,0 <= y <=1,0,0≤x≤1，x + y + z = 1），其中，与X射线入射方向无关地，第二III-V族化合物半导体的（0004）反射X射线摇摆曲线的半峰全宽为700秒以下。在作为高质量半导体的III-V族化合物半导体中，抑制了低角度晶界的发生。

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