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1. 发明授权

US07705812B2 Liquid crystal display device having a drive IC mounted on a flexible board directly connected to a liquid crystal panel 失效
标题翻译：具有安装在直接连接到液晶面板的柔性板上的驱动IC的液晶显示装置
公开(公告)号：US07705812B2
公开(公告)日：2010-04-27
申请号：US11226153
申请日：2005-09-14
申请人： Takashi Yuda , Satoshi Sekido , Syouichi Fukutoku
发明人： Takashi Yuda , Satoshi Sekido , Syouichi Fukutoku
IPC分类号： G09G3/36 , G09G5/00 , G06F3/038
CPC分类号： G02F1/13452 , G09G3/3611 , H05K1/147 , H05K3/361
摘要： A liquid crystal display apparatus including a glass substrate having a liquid display part formed thereon and a plurality of flexible boards connected to a periphery of the glass substrate. The apparatus also includes a liquid crystal drive IC mounted on each of the flexible boards so as to generate liquid crystal drive signals based on input signals. Additionally, the glass substrate has first internal lines and second internal lines. The first internal lines supply the input signals supplied from a first one of the flexible boards to a second one of the flexible boards, and the second internal lines return the input signals supplied from the first one of the flexible boards back to the first one of the flexible boards without any change.
摘要翻译：一种液晶显示装置，包括其上形成有液体显示部分的玻璃基板和与玻璃基板周边连接的多个柔性基板。该装置还包括安装在每个柔性板上的液晶驱动IC，以便基于输入信号产生液晶驱动信号。此外，玻璃基板具有第一内部线和第二内部线。第一内部线路将从第一柔性板提供的输入信号提供给柔性板中的第二个，并且第二内部线路将从第一个柔性板提供的输入信号返回到柔性板没有任何变化。

2. 发明申请

US20060055649A1 Liquid crystal display device having a drive IC mounted on a flexible board directly connected to a liquid crystal panel 失效
公开(公告)号：US20060055649A1
公开(公告)日：2006-03-16
申请号：US11226153
申请日：2005-09-14
申请人： Takashi Yuda , Satoshi Sekido , Syouichi Fukutoku
发明人： Takashi Yuda , Satoshi Sekido , Syouichi Fukutoku
IPC分类号： G09G3/36
CPC分类号： G02F1/13452 , G09G3/3611 , H05K1/147 , H05K3/361
摘要： A liquid crystal display device converts input signals into liquid crystal drive signals so as to display an image on a liquid crystal panel. A plurality of flexible boards are connected to the liquid crystal panel, each of the flexible boards having a drive IC which converts the input signals into the liquid crystal drive signals. A connection board is connected to the liquid crystal panel so as to supply the input signals to first input lines formed on the liquid crystal panel. Each of the flexible boards has second input signal lines for supplying the input signals to the drive IC; a first end of each of the second input signal lines is connected to a respective one of a first group of the first input signal lines. A second end of each of the second input signal lines is connected to a respective one of a second group of the first input signal lines which are formed in positions different from positions where the first ends of the second input lines are connected to the first group of the first input lines.

3. 发明申请

US20080080238A1 Method of programming a semiconductor nonvolatile memory cell and memory with multiple charge traps 有权
标题翻译：使用多个充电陷阱编程半导体非易失性存储单元和存储器的方法
公开(公告)号：US20080080238A1
公开(公告)日：2008-04-03
申请号：US11898302
申请日：2007-09-11
申请人： Takashi Yuda
发明人： Takashi Yuda
IPC分类号： G11C16/04 , H01L21/336 , H01L29/788
CPC分类号： G11C16/0425 , G11C11/5671 , G11C16/0475 , G11C16/12 , G11C16/3418 , G11C2211/5621 , H01L21/28282 , H01L29/42348 , H01L29/7923
摘要： A semiconductor nonvolatile memory has a memory cell array in which each memory cell has a pair of charge traps and each charge trap stores data with at least three possible values. Different data values produce different read current values. To store data, a controller and a voltage supplying unit in the semiconductor nonvolatile memory successively program and verify the charge traps that require programming, using higher programming voltages for data values that must produce lower read currents. This operation is iterated on the charge traps that have not yet attained their necessary read current values, until no such charge traps remain. The programming voltages are set so that all charge traps require substantially the same number of programming iterations, regardless of the data being stored.
摘要翻译：半导体非易失性存储器具有存储单元阵列，其中每个存储单元具有一对电荷陷阱，并且每个电荷陷阱存储具有至少三个可能值的数据。不同的数据值产生不同的读取电流值。为了存储数据，控制器和电压提供单元在半导体非易失性存储器中连续编程和验证需要编程的电荷陷阱，对于必须产生较低读取电流的数据值，使用更高的编程电压。在尚未达到必要的读取电流值的充电陷阱上重复该操作，直到不存在这样的充电陷阱。编程电压被设置为使得所有电荷陷阱需要基本上相同数量的编程迭代，而不管存储的数据如何。

4. 发明申请

US20080303790A1 PROGRAM FOR GAME APPARATUS, GAME APPARATUS, AND RECORDING MEDIUM STORING PROGRAM FOR GAME APPARATUS 有权
标题翻译：游戏装置程序，游戏装置和记录游戏装置的中档存储程序
公开(公告)号：US20080303790A1
公开(公告)日：2008-12-11
申请号：US12044669
申请日：2008-03-07
申请人： Kenjiro MORIMOTO , Takashi Yuda
发明人： Kenjiro MORIMOTO , Takashi Yuda
IPC分类号： G09G5/08
CPC分类号： A63F13/577 , A63F13/10 , A63F13/573 , A63F13/803 , A63F13/807 , A63F2300/64 , A63F2300/646 , A63F2300/8017 , A63F2300/8041
摘要： An object is to provide a program for a game apparatus for making a plurality of moving objects including a moving object operated by a player to compete in virtual space against each other, in which players are capable of fully using the stage effects specific to a virtual game to enjoy a heated racing game even when they vary in skill. In a program for a game apparatus comprising moving-object operating means, image-information generating means, and image-information outputting means, the program causes a computer to perform a step of producing land-configuration information, a step of monitoring movement information regarding a plurality of moving objects, a step of producing a special area object when results of monitoring meet predetermined requirements, a step of displaying the special area object in such a manner as to be viewable for the player, and a step of allowing another moving object to ride therein.
摘要翻译：本发明的目的是提供一种游戏装置的程序，用于制造包括由玩家操作的运动对象的多个移动对象的游戏装置，以相互竞争虚拟空间，其中玩家能够充分利用特定于虚拟的舞台效果游戏即使在技能不一样的时候也可以享受加热的赛车游戏。在包括移动物体操作装置，图像信息产生装置和图像信息输出装置的游戏装置的程序中，程序使计算机执行产生陆地配置信息的步骤，监视关于多个移动物体，当监视结果满足预定要求时产生特殊区域物体的步骤，以特定区域物体显示为使玩家能够观看的步骤，以及允许另一移动物体骑在里面

5. 发明授权

US5517752A Method of connecting a pressure-connector terminal of a device with a terminal electrode of a substrate 失效
标题翻译：将装置的压力连接器端子与基板的端子电极连接的方法
公开(公告)号：US5517752A
公开(公告)日：1996-05-21
申请号：US61086
申请日：1993-05-13
申请人： Toshio Sakata , Takashi Yuda , Shinichi Kasahara , Toshiaki Sukeda , Hiromichi Watanabe , Yoshiaki Maruyama , Eiji Nittoh , Kenichi Kuroiwa , Hiroaki Kobayashi
发明人： Toshio Sakata , Takashi Yuda , Shinichi Kasahara , Toshiaki Sukeda , Hiromichi Watanabe , Yoshiaki Maruyama , Eiji Nittoh , Kenichi Kuroiwa , Hiroaki Kobayashi
IPC分类号： G02F1/13 , H01L21/58 , H01L21/60 , H05K3/32 , H05K3/36 , H05K3/40 , H05K3/30
CPC分类号： H01L24/83 , H01L24/29 , H01L24/32 , H01L24/81 , H05K3/325 , G02F1/13452 , H01L2224/13019 , H01L2224/13078 , H01L2224/13144 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/73104 , H01L2224/73204 , H01L2224/81191 , H01L2224/81192 , H01L2224/81345 , H01L2224/81385 , H01L2224/81801 , H01L2224/83192 , H01L2224/8385 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01067 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/07802 , H01L2924/12042 , H01L2924/14 , H05K3/361 , H05K3/4007 , Y10T29/4913 , Y10T29/49144
摘要： A method for establishing electrical connection of a pressure-connector terminal by forming a plurality of divided terminals by providing a plurality of grooves on a connecting surface of a pressure-connector terminal used for TAB connection and COG connection, placing such divided connecting surfaces in contact with a connecting surface of an opposed terminal electrode, imperfectly hardening a bonding material under such condition, deforming a divided terminal by applying pressure and thereafter perfectly hardening the bonding material and a configuration of the pressure-connector terminal are disclosed.
摘要翻译：一种用于通过在用于TAB连接和COG连接的压力连接器端子的连接表面上设置多个槽来形成多个分开的端子来建立压力连接器端子的电连接的方法，将这种分开的连接表面接触具有相对的端子电极的连接表面，在这种条件下不均匀地硬化接合材料，通过施加压力使分割的端子变形，然后完全硬化接合材料和压力连接器端子的构造。

6. 发明申请

US20070228483A1 Semiconductor device and Manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070228483A1
公开(公告)日：2007-10-04
申请号：US11693408
申请日：2007-03-29
申请人： Takashi Yuda
发明人： Takashi Yuda
IPC分类号： H01L29/94
CPC分类号： H01L29/7923 , H01L21/28282 , H01L27/115 , H01L27/11568 , H01L29/4234
摘要： The present invention provides a semiconductor device which includes a gate electrode shaped in the form of an approximately quadrangular prism, including a laminated body of a gate oxide layer, a gate polysilicon layer and a gate silicon nitride layer provided in a first conduction type substrate, a second conduction type implantation region provided in a region outside the gate electrode, a sidewall that exposes a top face of the gate electrode and is formed by laminating a sidewall mask oxide layer covering side surfaces, an electron storage nitride layer and a sidewall silicon oxide layer, and a source/drain diffusion layer provided in the first conduction type substrate exposed from the gate electrode and the sidewall.
摘要翻译：本发明提供了一种半导体器件，其包括形成为大致四棱镜形式的栅电极，其包括设置在第一导电型衬底中的栅极氧化物层的层叠体，栅极多晶硅层和栅极氮化硅层，设置在栅电极外的区域中的第二导电型注入区，暴露栅电极顶面的侧壁，并且通过层叠覆盖侧面的侧壁掩模氧化物层，电子存储氮化物层和侧壁氧化硅层，以及设置在从栅电极和侧壁露出的第一导电型基板中的源极/漏极扩散层。

7. 发明授权

US08085597B2 Nonvolatile semiconductor memory and data writing method for nonvolatile semiconductor memory 有权
标题翻译：非易失性半导体存储器和非易失性半导体存储器的数据写入方法
公开(公告)号：US08085597B2
公开(公告)日：2011-12-27
申请号：US12503091
申请日：2009-07-15
申请人： Takashi Yuda
发明人： Takashi Yuda
IPC分类号： G11C16/04
CPC分类号： G11C11/5671 , G11C16/0475 , G11C2211/5621
摘要： A method having the steps of applying the same gate voltage to each of gate terminals of a plurality of memory cells via word lines to designate the memory cells as a write target, and simultaneously applying a write voltage that corresponds to each write data across drain-source terminals of two or more memory cells that are write targets via bit lines to write simultaneously a plurality of data elements having mutually different data values to the memory cells.
摘要翻译：一种方法，具有通过字线将相同的栅极电压施加到多个存储单元的每个栅极端子以将存储器单元指定为写入目标的步骤，并且同时施加与漏极连接的每个写入数据相对应的写入电压，两个或多个存储器单元的源极端子，其通过位线写入目标，以将具有相互不同数据值的多个数据元素同时写入存储器单元。

8. 发明申请

US20100238734A1 SEMICONDUCTOR NON-VOLATILE MEMORY, CHARGE ACCUMULATING METHOD FOR SEMICONDUCTOR NON-VOLATILE MEMORY, CHARGE ACCUMULATING PROGRAM STORAGE MEDIUM 有权
标题翻译：半导体非易失性存储器的充电累积方法，充电累积程序存储介质的半导体非易失性存储器
公开(公告)号：US20100238734A1
公开(公告)日：2010-09-23
申请号：US12724666
申请日：2010-03-16
申请人： Takashi Yuda
发明人： Takashi Yuda
IPC分类号： G11C16/04
CPC分类号： G11C16/3404 , G11C11/5621
摘要： There is provided a semiconductor non-volatile memory including: plural memory sections, a voltage application section, and a control section that controls the voltage application section wherein the control section controlling voltage application such that, based on a value of current detected by a current detection section, in a region where the current flowing in a channel region is greater than a predetermined target value at which a amount of charge accumulated has become a specific value in at least one of a first charge accumulating section or a second charge accumulating section, when a value of current flowing in the channel region approaches a target value, a rate of increase in the charge accumulating amount per time is decreased at least once.
摘要翻译：提供了一种半导体非易失性存储器，包括：多个存储器部分，电压施加部分和控制部分，其控制电压施加部分，其中控制部分控制电压施加使得基于由电流检测到的电流值检测部，在流过所述沟道区域的电流大于在第一电荷累积部或第二电荷累积部中的至少一个中累积的电荷量成为特定值的规定目标值的区域中，当在通道区域中流动的电流值接近目标值时，每时间的电荷累积量的增加率至少减少一次。

9. 发明申请

US20100020603A1 NONVOLATILE SEMICONDUCTOR MEMORY AND DATA WRITING METHOD FOR NONVOLATILE SEMICONDUCTOR MEMORY 有权
标题翻译：非易失性半导体存储器的非线性半导体存储器和数据写入方法
公开(公告)号：US20100020603A1
公开(公告)日：2010-01-28
申请号：US12503091
申请日：2009-07-15
申请人： Takashi Yuda
发明人： Takashi Yuda
IPC分类号： G11C16/04
CPC分类号： G11C11/5671 , G11C16/0475 , G11C2211/5621
摘要： A method having the steps of applying the same gate voltage to each of gate terminals of a plurality of memory cells via word lines to designate the memory cells as a write target, and simultaneously applying a write voltage that corresponds to each write data across drain-source terminals of two or more memory cells that are write targets via bit lines to write simultaneously a plurality of data elements having mutually different data values to the memory cells.
摘要翻译：一种方法，具有通过字线将相同的栅极电压施加到多个存储单元的每个栅极端子以将存储器单元指定为写入目标的步骤，并且同时施加与漏极连接的每个写入数据相对应的写入电压，两个或多个存储器单元的源极端子，其通过位线写入目标，以将具有相互不同数据值的多个数据元素同时写入存储器单元。

10. 发明授权

US07531866B2 Non-volatile semiconductor memory device, drive method and manufacturing method 失效
标题翻译：非易失性半导体存储器件，驱动方法及制造方法
公开(公告)号：US07531866B2
公开(公告)日：2009-05-12
申请号：US11294442
申请日：2005-12-06
申请人： Takashi Yuda
发明人： Takashi Yuda
IPC分类号： H01L29/792
CPC分类号： G11C16/0475 , H01L21/28282 , H01L27/115 , H01L27/11568 , H01L29/66833 , H01L29/7923
摘要： A MONOS type non-volatile semiconductor memory device has a memory cell array. The memory cell array includes a plurality of pairs of bit line and control line. These bit line-control line pairs are parallel to the channel on the substrate. The memory cell array also includes a plurality of memory cells. Each memory cell has a two-transistor configuration. A certain number of memory cells are disposed between the bit line and control line of each pair. These memory cells are connected in series, and connected with the bit line and control line alternately. The first gate electrode and second gate electrode in the memory cell are formed in strips in a direction perpendicular to the channel.
摘要翻译： MONOS型非易失性半导体存储器件具有存储单元阵列。存储单元阵列包括多对位线和控制线。这些位线控制线对与衬底上的通道平行。存储单元阵列还包括多个存储单元。每个存储单元具有双晶体管配置。在每对的位线和控制线之间设置一定数量的存储单元。这些存储单元串联连接，并与位线和控制线交替连接。存储单元中的第一栅极电极和第二栅电极在垂直于沟道的方向上形成带状。

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