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    • 1. 发明授权
    • Pacemaker with improved pulse detection
    • 起搏器具有改进的脉搏检测
    • US5285780A
    • 1994-02-15
    • US797889
    • 1991-11-26
    • Takashi TsujiMasayuki Horikawa
    • Takashi TsujiMasayuki Horikawa
    • A61N1/37A61N1/362
    • A61N1/3704
    • Disclosed is a pacemaker having an output circuit which is set to a high impedance when the potential of the input signal transmitted through the input-output terminal is within a predetermined range, and is set to a low impedance when the potential of the signal is outside of the range. Therefore, the time when the input to an R wave detection circuit must be stopped due to the after potential becomes extremely short and the failure of detection of an R wave decreases and, further, there are no rapid fluctuations in the potential arising due to the on-off operation of the switch. Further, the pacemaker of the invention may include a pulse lowering circuit for inputting a lowering pulse to the R wave detecting circuit so that the pacing pulse and the following after potential can't be detected as the R wave of the electrical activity of the heart.
    • 公开了一种具有输出电路的起搏器,当通过输入 - 输出端子传输的输入信号的电位在预定范围内时,输出电路被设置为高阻抗,并且当信号的电位在外部时被设置为低阻抗 的范围。 因此,R波检测电路的输入必须由于后置电位而停止的时间变得非常短,并且R波检测的失败降低,并且还不会由于 开关的开 - 关操作。 此外,本发明的起搏器可以包括用于向R波检测电路输入降低脉冲的脉冲降低电路,使得起搏脉冲和随后的电位不能被检测为心脏的电活动的R波 。
    • 9. 发明授权
    • Trench MOS type silicon carbide semiconductor device
    • 沟槽MOS型碳化硅半导体器件
    • US07732861B2
    • 2010-06-08
    • US12461713
    • 2009-08-21
    • Takashi Tsuji
    • Takashi Tsuji
    • H01L21/336H01L29/788
    • H01L29/7813H01L21/047H01L29/0623H01L29/0696H01L29/0878H01L29/1608H01L29/41766H01L29/66068
    • A trench MOS type SiC semiconductor device includes a first conductivity semiconductor substrate, a first conductivity drift layer on the substrate, a second conductivity base layer on the drift layer, a first conductivity source layer on the base layer, a stripe shaped trench reaching from the surface of the source layer to the drift layer and having a gate electrode via a gate oxide film, a second conductivity layer on the bottom of the trench, and a second conductivity type region thereon on across-the-width side walls of at least one end of the trench, electrically coupling the second conductivity layer with the base layer. The device allows a low on-resistance without newly forming an electrode connected to the second conductivity layer even in the case of a device in which the second conductivity layer has to be grounded.
    • 沟槽MOS型SiC半导体器件包括第一导电半导体衬底,衬底上的第一电导率漂移层,漂移层上的第二导电性基底层,基底层上的第一导电源层, 源极层的表面到漂移层,并且通过栅极氧化膜具有栅电极,在沟槽的底部具有第二导电层,并且在其上的至少一个的宽度侧壁上的第二导电类型区域 沟槽的端部,将第二导电层与基底层电耦合。 即使在第二导电层必须接地的装置的情况下,该装置也允许低导通电阻而不新形成连接到第二导电层的电极。