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1. 发明授权

US08510529B2 Method for generating program and method for operating system 失效
标题翻译：用于生成操作系统的程序和方法的方法
公开(公告)号：US08510529B2
公开(公告)日：2013-08-13
申请号：US12888614
申请日：2010-09-23
申请人： Takahisa Suzuki , Hiromasa Yamauchi , Hideo Miyake , Makiko Ito
发明人： Takahisa Suzuki , Hiromasa Yamauchi , Hideo Miyake , Makiko Ito
IPC分类号： G06F12/00
CPC分类号： G06F9/445 , G06F9/44557
摘要： An information processing apparatus sequentially selects a function whose execution frequency is high as a selected function that is to be stored in an internal memory, in a source program having a hierarchy structure. The information processing apparatus allocates the selected function to a memory area of the internal memory, allocates a function that is not the selected function and is called from the selected function to an area close to the memory area of the internal memory, and generates an internal load module. The information processing apparatus allocates a remaining function to an external memory coupled to a processor and generates an external load module. Then, a program executed by the processor having the internal memory is generated.
摘要翻译：在具有层次结构的源程序中，信息处理装置顺序选择执行频率高的功能作为要存储在内部存储器中的选择功能。信息处理装置将所选择的功能分配给内部存储器的存储区域，分配不是所选功能的功能，并且从所选择的功能调用到靠近内部存储器的存储区域的区域，并且生成内部加载模块。信息处理装置将剩余的功能分配给耦合到处理器的外部存储器，并生成外部负载模块。然后，生成由具有内部存储器的处理器执行的程序。

2. 发明授权

US08407507B2 Power management circuit, power management method and power management program for controlling power supplied to functional blocks in integrated circuits 失效
标题翻译：电源管理电路，电源管理方法和电源管理程序，用于控制集成电路中功能块的供电
公开(公告)号：US08407507B2
公开(公告)日：2013-03-26
申请号：US12795402
申请日：2010-06-07
申请人： Takahisa Suzuki , Hideo Miyake
发明人： Takahisa Suzuki , Hideo Miyake
IPC分类号： G06F1/00 , G06F1/26
CPC分类号： G06F1/3203 , G06F1/3287 , Y02D10/171
摘要： A power management circuit has a resource management unit which performs a use management of a functional block in an integrated circuit, and a power management unit which transmits a power control request to a power control device which controls power of the functional block for each domain. The power control request designates the domain and the power control content for the domain. The power management unit executes a use prohibition process prohibiting the use of the functional block belonging to the domain, by using the resource management unit, before transmitting the power control request to the power control device, in accordance with a type of the functional block belonging to the domain and the power control content.
摘要翻译：功率管理电路具有执行集成电路中的功能块的使用管理的资源管理单元和向功率控制装置发送功率控制请求的功率管理单元，该功率控制装置控制各个功能块的功率。功率控制请求指定域的域和功率控制内容。功率管理单元根据所属功能块的类型，在向功率控制装置发送功率控制请求之前，通过使用资源管理单元，执行禁止使用属于该域的功能块的使用禁止处理到域和电源控制内容。

3. 发明申请

US20080295120A1 ASYNCHRONOUS REMOTE PROCEDURE CALLING METHOD AND COMPUTER PRODUCT IN SHARED-MEMORY MULTIPROCESSOR 有权
标题翻译：非共享远程程序调用方法和共享内存多处理器中的计算机产品
公开(公告)号：US20080295120A1
公开(公告)日：2008-11-27
申请号：US12182846
申请日：2008-07-30
申请人： Takahisa Suzuki , Hideo Miyake
发明人： Takahisa Suzuki , Hideo Miyake
IPC分类号： G06F9/54
CPC分类号： G06F9/547 , H04L67/40
摘要： A first processor makes a procedure call, specifying an address of a procedure in an address space controlled by a second processor and an address of procedure control information generated in an address space controlled by the first processor. The second processor executes the procedure present at the address specified by the first processor. Upon finishing of execution of the procedure, the second processor returns the address of the procedure control information to the first processor. The first processor changes the execution status included in the procedure control information at the address returned from the second processor from “being executed” to “completed”.
摘要翻译：第一处理器进行程序调用，指定由第二处理器控制的地址空间中的过程的地址以及由第一处理器控制的地址空间中生成的过程控制信息的地址。第二处理器执行存在于由第一处理器指定的地址的过程。在完成该过程的执行之后，第二处理器将过程控制信息的地址返回给第一处理器。第一处理器将从第二处理器返回的地址的过程控制信息中包括的执行状态从“被执行”改变为“已完成”。

4. 发明授权

US08117626B2 Asynchronous remote procedure calling method and computer product in shared-memory multiprocessor 有权
标题翻译：共享内存多处理器中的异步远程过程调用方法和计算机产品
公开(公告)号：US08117626B2
公开(公告)日：2012-02-14
申请号：US12182846
申请日：2008-07-30
申请人： Takahisa Suzuki , Hideo Miyake
发明人： Takahisa Suzuki , Hideo Miyake
IPC分类号： G06F3/00
CPC分类号： G06F9/547 , H04L67/40
摘要： A first processor makes a procedure call, specifying an address of a procedure in an address space controlled by a second processor and an address of procedure control information generated in an address space controlled by the first processor. The second processor executes the procedure present at the address specified by the first processor. Upon finishing of execution of the procedure, the second processor returns the address of the procedure control information to the first processor. The first processor changes the execution status included in the procedure control information at the address returned from the second processor from “being executed” to “completed”.
摘要翻译：第一处理器进行程序调用，指定由第二处理器控制的地址空间中的过程的地址以及由第一处理器控制的地址空间中生成的过程控制信息的地址。第二处理器执行存在于由第一处理器指定的地址的过程。在完成该过程的执行之后，第二处理器将过程控制信息的地址返回给第一处理器。第一处理器将从第二处理器返回的地址的过程控制信息中包括的执行状态从“被执行”改变为“已完成”。

5. 发明授权

US07953962B2 Multiprocessor system and control method thereof 有权
标题翻译：多处理器系统及其控制方法
公开(公告)号：US07953962B2
公开(公告)日：2011-05-31
申请号：US12585620
申请日：2009-09-18
申请人： Yasuki Nakamura , Takahisa Suzuki , Makiko Ito , Hideo Miyake
发明人： Yasuki Nakamura , Takahisa Suzuki , Makiko Ito , Hideo Miyake
IPC分类号： G06F9/54
CPC分类号： G06F9/54
摘要： A multiprocessor system according to an embodiment comprises a plurality of processors, an execution control unit to control processing by the plurality of processors and data transfer between the plurality of processors; and an internal data storage unit to store data dependence information indicating status of the data transfer. If control flow of processing by a processor is fixed after a preceding data transfer is registered for execution and another data transfer to a similar destination as the preceding data transfer is necessary, the execution control unit cancels the preceding data transfer based on the data dependence information.
摘要翻译：根据实施例的多处理器系统包括多个处理器，执行控制单元，用于控制多个处理器的处理和多个处理器之间的数据传输; 以及内部数据存储单元，用于存储指示数据传送状态的数据相关信息。如果在先前的数据传送被注册执行之后处理器的处理的控制流程是固定的，并且需要与之前的数据传送相同的目的地的另一数据传送，则执行控制单元基于数据依赖信息来取消先前的数据传送。

6. 发明申请

US20090019259A1 MULTIPROCESSING METHOD AND MULTIPROCESSOR SYSTEM 审中-公开
标题翻译：多处理方法和多处理器系统
公开(公告)号：US20090019259A1
公开(公告)日：2009-01-15
申请号：US12235209
申请日：2008-09-22
申请人： Takahisa SUZUKI , Makiko Ito , Hideo Miyake
发明人： Takahisa SUZUKI , Makiko Ito , Hideo Miyake
IPC分类号： G06F15/76 , G06F9/02
CPC分类号： G06F9/5038
摘要： A multiprocessing method and a multiprocessor system capable of reducing time lost due to sequential waiting when procedures (program units) having dependencies are executed in which an order of execution of a plurality of program units in a sequential execution program and dependencies of the plurality of program units are registered, the execution states of the plurality of program units are managed based on the registered dependencies, executable program units are determined, and are assigned to server processors sequentially and executed are disclosed.
摘要翻译：一种多处理方法和多处理器系统，其能够在顺序执行程序中执行多个程序单元的执行顺序和多个程序的依赖性时执行具有依赖关系的程序（程序单元）时由于顺序等待而减少时间损失注册单元，基于注册的依赖关系管理多个程序单元的执行状态，确定可执行程序单元，并且依次分配给服务器处理器并执行。

7. 发明申请

US20080288967A1 PROCEDURE CALLING METHOD, PROCEDURE CALLING PROGRAM, AND COMPUTER PRODUCT 审中-公开
标题翻译：程序呼叫方法，程序呼叫程序和计算机产品
公开(公告)号：US20080288967A1
公开(公告)日：2008-11-20
申请号：US12184000
申请日：2008-07-31
申请人： Takahisa SUZUKI , Hideo Miyake
发明人： Takahisa SUZUKI , Hideo Miyake
IPC分类号： G06F9/46
CPC分类号： G06F9/547 , H04L67/40
摘要： In a shared-memory multiprocessor having plural processors that share a shared memory, each have an address space that is respectively independent in the shared memory and are configured to be capable of inter-processor communication using a bus, a first processor makes a procedure call to a second processor by specifying an address in the address space of the second processor. In response to the procedure call, by initiating and executing the procedure located at the address specified by the first processor, the second processor initiates the procedure at a high speed.
摘要翻译：在具有共享共享存储器的多个处理器的共享存储器多处理器中，每个存储器具有分别独立于共享存储器中的地址空间，并且被配置为能够使用总线进行处理器间通信，第一处理器进行过程调用通过指定第二处理器的地址空间中的地址到第二处理器。响应于过程调用，通过启动和执行位于由第一处理器指定的地址的过程，第二处理器以高速启动过程。

8. 发明授权

US5429843A Vapor deposition for formation of plating layer 失效
标题翻译：用于形成镀层的蒸镀
公开(公告)号：US5429843A
公开(公告)日：1995-07-04
申请号：US087731
申请日：1993-07-19
申请人： Katsuhiko Masaki , Minoru Saito , Hideo Miyake , Masahiko Souda , Yukihiro Morita , Yasushi Fukui
发明人： Katsuhiko Masaki , Minoru Saito , Hideo Miyake , Masahiko Souda , Yukihiro Morita , Yasushi Fukui
IPC分类号： C23C14/02 , C23C14/16 , C23C14/24 , B05D3/06 , C23C16/00
CPC分类号： C23C14/16 , C23C14/022 , C23C14/24
摘要： The surface of a steel material is irradiated with ion beams, held at a temperature of 100.degree.-400.degree. C. and then subjected to vapor deposition plating in vacuo. The vapor deposition plating may be performed by successively or simultaneously depositing different plating metals. The temperature control may use the sensible heat of the steel material, wherein the vapor deposition plating is applied to the surface of the steel material, which is in the temperature range of 100.degree.-400.degree. C. during cooling after ion beam irradiation, in a vacuum atmosphere. Since the surface of the steel material is held at a temperature of 100.degree.-400.degree.C., a lot of active spots remain on the surface. The active spots serve as starting points for the vapor deposition of the plating metals. The obtained plating layer is excellent in adhesiveness, workability, corrosion resistance and conformability to paint.
摘要翻译： PCT No.PCT / JP92 / 01511 Sec。 371日期：1993年7月19日 102（e）日期1993年7月19日PCT 1991年11月19日PCT PCT。公开号WO93 / 10275 日期：1993年5月27日。钢材表面用离子束照射，保持在100〜400℃，真空蒸镀。可以通过连续或同时沉积不同的电镀金属来进行蒸镀。温度控制可以使用钢材的显热，其中在离子束照射之后的冷却期间，在钢材表面施加气相沉积电镀，其在100-400℃的温度范围内真空气氛。由于钢材的表面保持在100-400℃的温度下，表面上仍留有大量活性斑点。活性斑点作为电镀金属气相沉积的起点。所得到的镀层的粘合性，加工性，耐腐蚀性和涂料适应性优异。

9. 发明授权

US5346975A Light-sensitive composition 失效
标题翻译：感光组合物
公开(公告)号：US5346975A
公开(公告)日：1994-09-13
申请号：US945388
申请日：1992-09-16
申请人： Keitaro Aoshima , Hideo Miyake
发明人： Keitaro Aoshima , Hideo Miyake
IPC分类号： G03F7/004 , G03F7/038 , C08F226/06 , C08F218/02 , C08F228/02 , C08F230/02 , C08F265/06
CPC分类号： G03F7/0388 , G03F7/004 , Y10S430/127
摘要： The present invention provides a light-sensitive composition comprising specific photo-crosslinkable polymer compounds.The light-sensitive composition of the present invention exhibits excellent wear resistance when it is photo-hardened, and hence it can give lithographic printing plates capable of producing a lot of printed matter in good quality when it is used for presensitized plates for use in making lithographic printing plates.
摘要翻译：本发明提供了包含特定光可交联聚合物化合物的感光组合物。本发明的感光性组合物在光硬化时表现出优异的耐磨性，因此当用于制造用于制造的预感板时，可以提供能够产生大量印刷品的平版印刷版。平版印刷版。

10. 发明授权

US4888208A Ceramic substrate for printed circuits and production thereof 失效
标题翻译：印刷电路用陶瓷基板及其制造
公开(公告)号：US4888208A
公开(公告)日：1989-12-19
申请号：US103456
申请日：1987-10-01
申请人： Satoshi Maeda , Ryu Yoneda , Kenichi Yokota , Hideo Miyake
发明人： Satoshi Maeda , Ryu Yoneda , Kenichi Yokota , Hideo Miyake
IPC分类号： C04B41/53 , C04B41/91 , C23C18/18 , H05K1/03 , H05K3/18 , H05K3/38
CPC分类号： C04B41/009 , C04B41/5353 , C04B41/5361 , C04B41/91 , C23C18/1851 , C23C18/1865 , C23C18/1889 , C23C18/1893 , H05K3/381 , C04B2111/00844 , H05K1/0306 , H05K2203/087 , H05K3/181
摘要： There is provided a method of producing a ceramic substrate for printed circuits wherein at least the surface of the side to be circuit-printed is subjected to a roughening treatment with one of the following compounds:(1) substances containing sulfur trioxide and(2) substances which, upon decomposition, generate sulfur trioxide.
摘要翻译：提供一种制造用于印刷电路的陶瓷基板的方法，其中至少使用电路印刷的一侧的表面用以下化合物之一进行粗糙化处理：（1）含有三氧化硫的物质和（2）分解后产生三氧化硫的物质。

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