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1. 发明申请

US20110115571A1 QUADRATURE MODULATOR AND SEMICONDUCTOR INTEGRATED CIRCUIT WITH IT BUILT-IN 失效
标题翻译：二次调制器和半导体集成电路与内置
公开(公告)号：US20110115571A1
公开(公告)日：2011-05-19
申请号：US12942533
申请日：2010-11-09
申请人： Takahiro NAKAMURA , Taizo YAMAWAKI , Takayasu NORIMATSU , Takao KIHARA
发明人： Takahiro NAKAMURA , Taizo YAMAWAKI , Takayasu NORIMATSU , Takao KIHARA
IPC分类号： H03C5/00
CPC分类号： H04L27/36
摘要： A quadrature modulator has first to fourth transistors, a first node, a second node, and a first output node. A non-inversion in-phase analog signal, an inversion in-phase analog signal, a non-inversion quadrature analog signal, and an inversion quadrature analog signal are supplied to input electrodes of the first to fourth transistors, respectively. Control electrodes of the first to fourth transistors respond to a non-inversion in-phase RF signal, an inversion in-phase RF signal, a non-inversion quadrature RF signal, and an inversion quadrature RF signal, respectively. Output electrodes of the first and second transistors are coupled to the first node, and output electrodes of the third and fourth transistors are coupled to the second node. A first high-pass filter is coupled between the first node and the first output node, and a second high-pass filter is coupled between the second node and the first output node.
摘要翻译：正交调制器具有第一至第四晶体管，第一节点，第二节点和第一输出节点。分别向第一至第四晶体管的输入电极提供非反相同相模拟信号，反相同相模拟信号，非反相正交模拟信号和反相正交模拟信号。第一至第四晶体管的控制电极分别响应非反相同相RF信号，反相同相RF信号，非反相正交RF信号和反相正交RF信号。第一和第二晶体管的输出电极耦合到第一节点，并且第三和第四晶体管的输出电极耦合到第二节点。第一高通滤波器耦合在第一节点和第一输出节点之间，并且第二高通滤波器耦合在第二节点和第一输出节点之间。

2. 发明申请

US20110059704A1 TRANSMITTER AND SEMICONDUCTOR INTEGRATED CIRCUIT AVAILABLE FOR IT 有权
标题翻译：发射机和半导体集成电路可供选择
公开(公告)号：US20110059704A1
公开(公告)日：2011-03-10
申请号：US12854216
申请日：2010-08-11
申请人： Takayasu NORIMATSU , Taizo YAMAWAKI , Yukinori AKAMINE , Koji MAEDA
发明人： Takayasu NORIMATSU , Taizo YAMAWAKI , Yukinori AKAMINE , Koji MAEDA
IPC分类号： H04B1/04
CPC分类号： H04B1/0483 , H03C5/00 , H04B2001/0491
摘要： The transmitter synthesizes amplitude and phase components and calibrates a delay mismatch between amplitude and phase components with high accuracy at high speed. The transmitter has: a digital-to-analog converter (DAC) and a low-pass filter (LPF) in its amplitude-signal path; and a phase modulator operable to convert up a phase component into an RF component in its phase-signal path. In an operation of delay calibration, a test input signal is supplied to a delay-calibrating unit in the amplitude-signal path, and the delay-calibrating unit provides a test input signal to DAC. Then, LPF generates a test output signal. The delay-calibrating unit detects a delay of the test output signal relative to the test input signal, calibrates an amplitude signal delay in a range from the input of the delay-calibrating unit to the output of LPF, reduces the difference between amplitude and phase signal delays of the phase modulator in the phase-signal path.
摘要翻译：发射机合成幅度和相位分量，并以高精度高速校准振幅和相位分量之间的延迟失配。发射机具有：幅度信号路径中的数模转换器（DAC）和低通滤波器（LPF）; 以及相位调制器，其可操作以将相位分量转换成其相位信号路径中的RF分量。在延迟校准的操作中，将测试输入信号提供给幅度信号路径中的延迟校准单元，并且延迟校准单元向DAC提供测试输入信号。然后，LPF产生测试输出信号。延迟校准单元检测测试输出信号相对于测试输入信号的延迟，校准从延迟校准单元的输入到LPF的输出的范围内的振幅信号延迟，减小振幅和相位之间的差异相位调制器在相位信号路径中的信号延迟。

3. 发明申请

US20110286368A1 RADIO FREQUENCY DEVICE AND MOBILE COMMUNICATION TERMINAL USING THE SAME 失效
标题翻译：无线电频率设备和移动通信终端
公开(公告)号：US20110286368A1
公开(公告)日：2011-11-24
申请号：US13197684
申请日：2011-08-03
申请人： Akira KURIYAMA , Taizo YAMAWAKI , Satoshi TANAKA
发明人： Akira KURIYAMA , Taizo YAMAWAKI , Satoshi TANAKA
IPC分类号： H04W4/00
CPC分类号： H04B1/0483 , H04B1/0458
摘要： There is provided a radio frequency circuit device for multi-band and multi-mode which is low in a circuit loss, and a mobile communication terminal using the radio frequency circuit device. The radio frequency circuit device has a first path 110 that includes an amplifier 10a that amplifies signals of at least two modulation techniques in power, a matching network 20 that is connected to the amplifier and a duplexer 50 and allows the matching network to be coupled with an antenna, and a second path 111 that does not include the duplexer and allows the matching network to be coupled with the antenna. The first path is selected when the amplifier amplifies one of the signals of at least two modulation techniques, and the second path is selected when the amplifier amplifies another signal. An output impedance of the amplifier is matched with an impedance when viewing the antenna side from the amplifier in the first path and the second path.
摘要翻译：提供了一种电路损耗低的用于多频和多模的射频电路装置，以及使用射频电路装置的移动通信终端。射频电路装置具有第一路径110，其包括放大器10a，其放大至少两个功率调制技术的信号，连接到放大器的匹配网络20和双工器50，并允许匹配网络与天线和第二路径111，其不包括双工器并且允许匹配网络与天线耦合。当放大器放大至少两个调制技术的信号之一时，选择第一路径，并且当放大器放大另一信号时选择第二路径。当从第一路径和第二路径中的放大器观看天线侧时，放大器的输出阻抗与阻抗匹配。

4. 发明申请

US20110304388A1 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND WIRELESS COMMUNICATION SYSTEM 有权
标题翻译：半导体集成电路设备和无线通信系统
公开(公告)号：US20110304388A1
公开(公告)日：2011-12-15
申请号：US13114340
申请日：2011-05-24
申请人： Taizo YAMAWAKI , Tomonori TANOUE , Kazuaki HORI
发明人： Taizo YAMAWAKI , Tomonori TANOUE , Kazuaki HORI
IPC分类号： H04B1/40
CPC分类号： H04B1/006 , H04B1/52
摘要： Disclosed are a semiconductor integrated circuit device and a wireless communication system that are capable of improving reception sensitivity. The wireless communication system includes, for instance, a first duplexer, a second duplexer, a first low-noise amplifier circuit, and a second low-noise amplifier circuit. A transmission band compliant with a communication standard is split into two segments for use, namely, low- and high-frequency transmission bands. A reception band compliant with the communication standard is split into two segments for use, namely, low- and high-frequency reception bands. The first duplexer uses the low-frequency transmission band and low-frequency reception band as passbands. The second duplexer uses the high-frequency transmission band and high-frequency reception band as passbands. A signal received from the first duplexer and a signal received from the second duplexer are respectively amplified by the first and the second low-noise amplifier circuits, which are respectively provided to handle such signals.
摘要翻译：公开了能够提高接收灵敏度的半导体集成电路装置和无线通信系统。无线通信系统包括例如第一双工器，第二双工器，第一低噪声放大器电路和第二低噪声放大器电路。符合通信标准的传输频带被分成两个段，即低频和高频传输频带。符合通信标准的接收频段被分为两段供低频和高频接收频段使用。第一双工器使用低频传输频带和低频接收频带作为通带。第二双工器使用高频传输频带和高频接收频带作为通带。从第一双工器接收的信号和从第二双工器接收的信号分别由分别提供以处理这种信号的第一和第二低噪声放大器电路放大。

5. 发明申请

US20100052743A1 SEMICONDUCTOR INTEGRATED CIRCUIT AND CIRCUIT OPERATION METHOD 有权
标题翻译：半导体集成电路和电路操作方法
公开(公告)号：US20100052743A1
公开(公告)日：2010-03-04
申请号：US12541358
申请日：2009-08-14
申请人： Hiroshi KAMIZUMA , Taizo YAMAWAKI , Yukinori AKAMINE , Koji MAEDA
发明人： Hiroshi KAMIZUMA , Taizo YAMAWAKI , Yukinori AKAMINE , Koji MAEDA
IPC分类号： H03L7/00 , H03K3/00
CPC分类号： G06F1/3296 , G06F1/12 , G06F13/4243 , H04W52/0274 , Y02D10/14 , Y02D10/151 , Y02D70/00 , Y02D70/1224
摘要： The power consumption of a data sampling unit that selects a phase of a clock signal appropriate for sampling payload data is reduced at an input interface. A semiconductor integrated circuit includes an input interface and internal core circuits. The input interface includes a hysteresis circuit and a data sampling unit. The hysteresis circuit detects an input signal between first and second input thresholds as a sleep command. The data sampling unit selects an appropriate phase of a sampling clock signal in accordance with a synchronizing signal and samples payload data. When a sleep command is detected, a sleep signal is also supplied to the internal core circuits and the data sampling unit and they are controlled into a low-power consumption state.
摘要翻译：在输入接口处减少选择适合于抽样有效载荷数据的时钟信号的相位的数据采样单元的功耗。半导体集成电路包括输入接口和内部核心电路。输入接口包括滞后电路和数据采样单元。滞后电路将第一和第二输入阈值之间的输入信号作为睡眠命令检测。数据采样单元根据同步信号选择采样时钟信号的适当相位，并采样有效载荷数据。当检测到睡眠命令时，还向内部核心电路和数据采样单元提供睡眠信号，并将它们控制为低功耗状态。

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