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1. 发明申请

US20140319539A1 SEMICONDUCTOR WAFER MANUFACTURING METHOD, AND SEMICONDUCTOR WAFER 有权
标题翻译：半导体制造方法和半导体波导
公开(公告)号：US20140319539A1
公开(公告)日：2014-10-30
申请号：US14240710
申请日：2012-08-24
申请人： Tadaaki Kaneko , Noboru Ohtani , Shoji Ushio , Ayumu Adachi , Satoru Nogami
发明人： Tadaaki Kaneko , Noboru Ohtani , Shoji Ushio , Ayumu Adachi , Satoru Nogami
IPC分类号： H01L21/02 , H01L29/16
CPC分类号： H01L21/02664 , C30B19/04 , C30B19/12 , C30B29/36 , H01L21/02378 , H01L21/0243 , H01L21/02447 , H01L21/02529 , H01L21/02625 , H01L21/02658 , H01L21/67109 , H01L29/1608
摘要： A method for manufacturing a semiconductor wafer includes a carbon layer formation step, a through hole formation step, a feed layer formation step, and an epitaxial layer formation step. In the carbon layer formation step, a carbon layer (71) is formed on a surface of a substrate (70) made of polycrystalline SiC. In the through hole formation step, through holes (71c) are formed in the carbon layer (71) formed on the substrate (70). In the feed layer formation step, a Si layer (72) and a 3C—SiC polycrystalline layer (73) are formed on a surface of the carbon layer (71). In the epitaxial layer formation step, the substrate (70) is heated so that a seed crystal made of 4H—SiC single crystal is formed on portions of the surface of the substrate (70) that are exposed through the through holes (71c), and a close-spaced liquid-phase epitaxial growth of the seed crystal is caused to form a 4H—SiC single crystal layer.
摘要翻译：制造半导体晶片的方法包括碳层形成步骤，通孔形成步骤，进料层形成步骤和外延层形成步骤。在碳层形成工序中，在由多晶SiC构成的基板（70）的表面上形成碳层（71）。在通孔形成工序中，在形成于基板（70）上的碳层（71）上形成通孔（71c）。在进料层形成步骤中，在碳层（71）的表面上形成Si层（72）和3C-SiC多晶层（73）。在外延层形成步骤中，加热衬底（70），使得在通过通孔（71c）暴露的衬底（70）的表面的部分上形成由4H-SiC单晶制成的晶种，并且引起晶种的紧密间隔的液相外延生长形成4H-SiC单晶层。

2. 发明授权

US10012675B2 Nanometer standard prototype and method for manufacturing nanometer standard prototype 有权
公开(公告)号：US10012675B2
公开(公告)日：2018-07-03
申请号：US14357379
申请日：2011-11-11
申请人： Tadaaki Kaneko , Shoji Ushio
发明人： Tadaaki Kaneko , Shoji Ushio
IPC分类号： C30B29/36 , G01Q40/02 , C30B23/02 , C30B25/02 , H01L29/16 , C30B33/12 , H01L21/02
CPC分类号： G01Q40/02 , C30B23/02 , C30B25/02 , C30B29/36 , C30B33/12 , H01L21/02378 , H01L21/02529 , H01L29/1608
摘要： A standard sample (72) that is a nanometer standard prototype, having a standard length that serves as a length reference, includes a SiC layer in which a step-terrace structure is formed. The height of a step, used as the standard length, is equal to the height of a full unit that corresponds to one periodic of a stack of SiC molecules in a stack direction or equal to the height of a half unit that corresponds to one-half periodic of the stack of SiC molecules in the stack direction. In a microscope such as an STM to be measured in a high-temperature vacuum environment, heating in a vacuum furnace enables surface reconstruction with ordered atomic arrangement, while removing a natural oxide film from the surface, so that accuracy of the height of the step is not degraded. Accordingly, a standard sample usable under a high-temperature vacuum is achieved.

3. 发明申请

US20140317791A1 NANOMETER STANDARD PROTOTYPE AND METHOD FOR MANUFACTURING NANOMETER STANDARD PROTOTYPE 有权
标题翻译： NANOMETER标准原型及制造纳米标准原型的方法
公开(公告)号：US20140317791A1
公开(公告)日：2014-10-23
申请号：US14357379
申请日：2011-11-11
申请人： Tadaaki Kaneko , Shoji Ushio
发明人： Tadaaki Kaneko , Shoji Ushio
IPC分类号： G01Q40/02
CPC分类号： G01Q40/02 , C30B23/02 , C30B25/02 , C30B29/36 , C30B33/12 , H01L21/02378 , H01L21/02529 , H01L29/1608
摘要： A standard sample (72) that is a nanometer standard prototype, having a standard length that serves as a length reference, includes a SiC layer in which a step-terrace structure is formed. The height of a step, used as the standard length, is equal to the height of a full unit that corresponds to one periodic of a stack of SiC molecules in a stack direction or equal to the height of a half unit that corresponds to one-half periodic of the stack of SiC molecules in the stack direction. In a microscope such as an STM to be measured in a high-temperature vacuum environment, heating in a vacuum furnace enables surface reconstruction with ordered atomic arrangement, while removing a natural oxide film from the surface, so that accuracy of the height of the step is not degraded. Accordingly, a standard sample usable under a high-temperature vacuum is achieved.
摘要翻译：标准样品（72）是具有用作长度参考的标准长度的纳米标准样品，包括其中形成台阶式结构的SiC层。用作标准长度的台阶的高度等于对应于堆叠方向上的SiC分子堆叠的一个周期的整个单位的高度，或等于对应于单层的半单位的高度，堆叠方向的SiC分子堆的半周期。在要在高温真空环境中测量的STM等显微镜中，真空炉中的加热使得能够以有序的原子排列进行表面重构，同时从表面去除天然氧化膜，从而使步骤的高度精度没有退化因此，可以实现在高温真空下可使用的标准样品。

4. 发明授权

US09029219B2 Semiconductor wafer manufacturing method, and semiconductor wafer 有权
标题翻译：半导体晶片制造方法和半导体晶片
公开(公告)号：US09029219B2
公开(公告)日：2015-05-12
申请号：US14240710
申请日：2012-08-24
申请人： Tadaaki Kaneko , Noboru Ohtani , Shoji Ushio , Ayumu Adachi , Satoru Nogami
发明人： Tadaaki Kaneko , Noboru Ohtani , Shoji Ushio , Ayumu Adachi , Satoru Nogami
IPC分类号： H01L21/02 , C30B19/04 , C30B29/36 , H01L21/67 , C30B19/12 , H01L29/16
CPC分类号： H01L21/02664 , C30B19/04 , C30B19/12 , C30B29/36 , H01L21/02378 , H01L21/0243 , H01L21/02447 , H01L21/02529 , H01L21/02625 , H01L21/02658 , H01L21/67109 , H01L29/1608
摘要： A method for manufacturing a semiconductor wafer includes a carbon layer formation step, a through hole formation step, a feed layer formation step, and an epitaxial layer formation step. In the carbon layer formation step, a carbon layer (71) is formed on a surface of a substrate (70) made of polycrystalline SiC. In the through hole formation step, through holes (71c) are formed in the carbon layer (71) formed on the substrate (70). In the feed layer formation step, a Si layer (72) and a 3C—SiC polycrystalline layer (73) are formed on a surface of the carbon layer (71). In the epitaxial layer formation step, the substrate (70) is heated so that a seed crystal made of 4H—SiC single crystal is formed on portions of the surface of the substrate (70) that are exposed through the through holes (71c), and a close-spaced liquid-phase epitaxial growth of the seed crystal is caused to form a 4H—SiC single crystal layer.
摘要翻译：制造半导体晶片的方法包括碳层形成步骤，通孔形成步骤，进料层形成步骤和外延层形成步骤。在碳层形成工序中，在由多晶SiC构成的基板（70）的表面上形成碳层（71）。在通孔形成工序中，在形成于基板（70）上的碳层（71）上形成通孔（71c）。在进料层形成步骤中，在碳层（71）的表面上形成Si层（72）和3C-SiC多晶层（73）。在外延层形成步骤中，加热衬底（70），使得在通过通孔（71c）暴露的衬底（70）的表面的部分上形成由4H-SiC单晶制成的晶种，并且引起晶种的紧密间隔的液相外延生长形成4H-SiC单晶层。

5. 发明申请

US20090038538A1 METHOD FOR PRODUCING SINGLE CRYSTAL SILICON CARBIDE 有权
标题翻译：生产单晶碳化硅的方法
公开(公告)号：US20090038538A1
公开(公告)日：2009-02-12
申请号：US12250644
申请日：2008-10-14
申请人： Tadaaki Kaneko , Yasushi Asaoka , Naokatsu Sano
发明人： Tadaaki Kaneko , Yasushi Asaoka , Naokatsu Sano
IPC分类号： C30B19/00
CPC分类号： C30B19/04 , C30B29/36
摘要： Single crystal SiC, having no fine grain boundaries, a micropipe defect density of 1/cm2 or less and a crystal terrace of 10 micrometer or more is obtained by a high-temperature liquid phase growth method using a very thin Si melt layer. The method does not require temperature difference control between the growing crystal surface and a raw material supply polycrystal and preparation of a doped single crystal SiC is possible.
摘要翻译：通过使用非常薄的Si熔融层的高温液相生长法，可以获得不具有微细晶界的微晶SiC，1 / cm 2以下的微孔缺陷密度和10微米以上的晶体平台。该方法不需要生长晶体表面和原料供应多晶体之间的温度差控制，并且可以制备掺杂的单晶SiC。

6. 发明申请

US20120175639A1 TANTALUM CARBIDE, METHOD FOR PRODUCING TANTALUM CARBIDE, TANTALUM CARBIDE WIRING AND TANTALUM CARBIDE ELECTRODE 审中-公开
标题翻译：碳化钨，生产碳酸钡的方法，碳化钨配线和碳酸铅电极
公开(公告)号：US20120175639A1
公开(公告)日：2012-07-12
申请号：US13422861
申请日：2012-03-16
申请人： Tadaaki Kaneko , Yasushi Asaoka , Naokatsu Sano
发明人： Tadaaki Kaneko , Yasushi Asaoka , Naokatsu Sano
IPC分类号： H01L29/24 , H01B1/06 , C01B31/30
CPC分类号： C23C8/02 , C23C8/20 , Y10T428/24917 , Y10T428/24926
摘要： It is an object of the present invention to provide a method for manufacturing tantalum carbide which can form tantalum carbide having a prescribed shape using a simple method, can form the tantalum carbide having a uniform thickness even when the tantalum carbide is coated on the surface of an article and is not peeled off by a thermal history, tantalum carbide obtained by the manufacturing method, wiring of tantalum carbide, and electrodes of tantalum carbide.The tantalum carbide is formed on the surface of tantalum or a tantalum alloy by placing the tantalum or tantalum alloy in a vacuum heat treatment furnace, heat-treating the tantalum or tantalum alloy under a condition where a native oxide layer of Ta2O5 formed on the surface of tantalum or tantalum alloy is sublimated to remove the Ta2O5, introducing a carbon source into the vacuum heat treatment furnace, and then heat-treating.
摘要翻译：本发明的目的是提供一种制造碳化钽的方法，该方法可以使用简单的方法形成具有规定形状的碳化钽，即使在碳化钽被涂覆在并且不会被热历史剥离，通过制造方法获得的碳化钽，碳化钽的布线和碳化钽的电极。通过将钽或钽合金置于真空热处理炉中，在钽或钽合金的表面上形成碳化钽，在表面形成有Ta 2 O 5的天然氧化物层的条件下对钽或钽合金进行热处理的钽或钽合金升华以去除Ta2O5，将碳源引入真空热处理炉中，然后进行热处理。

7. 发明授权

US08211244B2 Tantalum carbide, method for producing tantalum carbide, tantalum carbide wiring and tantalum carbide electrode 有权
标题翻译：碳化钽，碳化钽的生产方法，碳化钽布线和碳化钽电极
公开(公告)号：US08211244B2
公开(公告)日：2012-07-03
申请号：US12781501
申请日：2010-05-17
申请人： Tadaaki Kaneko , Yasushi Asaoka , Naokatsu Sano
发明人： Tadaaki Kaneko , Yasushi Asaoka , Naokatsu Sano
IPC分类号： C23C8/00 , C01B31/30
CPC分类号： C23C8/02 , C23C8/20 , Y10T428/24917 , Y10T428/24926
摘要： The present invention relates to a method for manufacturing tantalum carbide which can form tantalum carbide having a prescribed shape using a simple method, can form the tantalum carbide having a uniform thickness even when the tantalum carbide is coated on the surface of an article and is not peeled off by a thermal history, tantalum carbide obtained by the manufacturing method, wiring of tantalum carbide, and electrodes of tantalum carbide, where the tantalum carbide is formed on the surface of tantalum or a tantalum alloy by placing the tantalum or tantalum alloy in a vacuum heat treatment furnace, heat-treating the tantalum or tantalum alloy under a condition where a native oxide layer of Ta2O5 formed on the surface of tantalum or tantalum alloy is sublimated to remove the Ta2O5, introducing a carbon source into the vacuum heat treatment furnace, and then heat-treating.
摘要翻译：本发明涉及一种利用简单的方法形成具有规定形状的碳化钽的碳化钽的制造方法，即使将碳化钽涂覆在制品的表面上也能形成均匀厚度的碳化钽，而不是通过热历史剥离，通过制造方法获得的碳化钽，碳化钽的布线和碳化钽的电极，其中通过将钽或钽合金置于钽或钽合金的表面上形成钽碳化钽的钽或钽合金真空热处理炉，在钽或钽合金表面上形成的Ta2O5的天然氧化物层升华以去除Ta2O5，将碳源引入真空热处理炉中的条件下对钽或钽合金进行热处理，然后进行热处理。

8. 发明申请

US20100143828A1 METHOD OF MASK FORMING AND METHOD OF THREE-DIMENSIONAL MICROFABRICATION 失效
标题翻译：掩膜形成方法和三维微晶化方法
公开(公告)号：US20100143828A1
公开(公告)日：2010-06-10
申请号：US11912503
申请日：2005-04-25
申请人： Naokatsu Sano , Tadaaki Kaneko
发明人： Naokatsu Sano , Tadaaki Kaneko
IPC分类号： G03F7/20 , G03F1/00
CPC分类号： H01L21/31105 , B81C1/00428 , B82Y10/00 , G03F7/0043 , H01L21/02395 , H01L21/02546 , H01L21/02631 , H01L21/02639 , H01L21/02642 , H01L21/2636 , H01L21/3086 , Y10S430/143 , Y10S430/145 , Y10S430/146
摘要： The invention provides a method for forming a selective mask on a surface of a layer of AlXGaYIn1-X-YAsZP1-Z or AlXGaYIn1-X-YNZAs1-Z (0≦X≦1, 0≦Y≦1, 0≦Z≦1), which is a method for forming a mask with a minute width suitable for microfabrication in nano-order.(1) An energy beam 4a, 4b is selectively irradiated onto a natural oxide layer 2 formed on the surface of the layer 1 of AlXGaYIn1-X-YAsZP1-Z or AlXGaYIn1-X-YNZAs1-Z. (2) Of the natural oxide layer 2, parts other than parts onto which the energy beam 4a, 4b has been irradiated is removed by heating. (3) The natural oxide layer 2 of the parts onto which the energy beam 4a, 4b has been irradiated is partially removed by heating while alternatively carrying out a rise and fall in heating temperature.
摘要翻译：本发明提供了一种在AlXGaYIn1-X-YAsZP1-Z或AlXGaYIn1-X-YNZAs1-Z（0＆amp; NlE; X＆amp; NlE; 1,0＆amp; NlE; Y＆nlE; 1,0＆amp; NlE; Z＆nlE; 1）的表面上形成选择性掩模的方法），其是以适合于纳米级微细加工的微小宽度形成掩模的方法。（1）能量束4a，4b被选择性地照射到形成在AlXGaYIn1-X-YAsZP1-Z或AlXGaYIn1-X-YNZAs1-Z的层1的表面上的自然氧化物层2上。（2）在天然氧化物层2中，通过加热除去能量束4a，4b所照射的部分以外的部分。（3）照射能量束4a，4b的部分的天然氧化物层2通过加热部分除去，交替地进行加热温度的上升和下降。

9. 发明授权

US07704861B2 Electron beam microprocessing method 失效
标题翻译：电子束微处理方法
公开(公告)号：US07704861B2
公开(公告)日：2010-04-27
申请号：US10558194
申请日：2004-05-25
申请人： Tadaaki Kaneko , Kiyoshi Sakaue , Naokatsu Sano
发明人： Tadaaki Kaneko , Kiyoshi Sakaue , Naokatsu Sano
IPC分类号： H01L21/36
CPC分类号： H01L21/31122 , H01L21/0332 , H01L21/0337 , H01L21/30621 , H01L21/3086 , H01L21/316
摘要： Onto a surface of an AlxGayIn1-x-yAszP1-z (0≦x, y, z≦1) layer including GaAs alone or an InP substrate, an electron beam controlled to an arbitrary electron beam diameter and current density is irradiated so as to selectively substitute or generate Ga2O3 for a natural oxide layer formed on the AlxGayIn1-x-yAszP1-z, layer surface, then the AlxGayIn1-x-yAszP1-z layer surface is dry-etched by a bromide in single atomic layer units, whereby the natural oxide layer other than the part substituted by the Ga2O3 and AlxGayIn1-x-yAszP1-z substrate are removed.
摘要翻译：在包含GaAs或InP衬底的AlxGayIn1-x-yAszP1-z（0＆amp; nlE; x，y，z＆nlE; 1）层的表面上，照射受控于任意电子束直径和电流密度的电子束，以便选择性地取代或生成Ga 2 O 3用于形成在AlxGayIn1-x-yAszP1-z层表面上的自然氧化物层，然后通过溴化物以单原子层单位对Al x Ga y In 1-x-y As z P 1-z层表面进行干蚀刻，由此除去由Ga 2 O 3和Al x Ga y In 1-x-y As z P 1-z衬底取代的部分之外的自然氧化物层。

10. 发明授权

US07432176B2 Method of three-dimensional microfabrication and high-density three-dimentional fine structure 失效
标题翻译：三维微细加工方法及高密度三维精细结构
公开(公告)号：US07432176B2
公开(公告)日：2008-10-07
申请号：US11578034
申请日：2004-04-13
申请人： Tadaaki Kaneko , Naokatsu Sano , Kiyoshi Sakaue
发明人： Tadaaki Kaneko , Naokatsu Sano , Kiyoshi Sakaue
IPC分类号： H01L21/20 , H01L21/36
CPC分类号： B82Y20/00 , B82Y10/00 , H01L21/02392 , H01L21/02395 , H01L21/02546 , H01L21/02631 , H01L21/02639 , H01L21/02642 , H01S5/341
摘要： Surface of a thin film formed on a surface of substrate of AlxGayIn1-x-yAszP1-z (0≦x
摘要翻译：形成在Al 2 O 3衬底的表面上的薄膜的表面在1-xy 包括物质GaAs和InP在内的电子束被照射到以任意电子束直径和电流密度控制的电子束的P 1 -Z <0 <= x <1,0 <= y和z <= 1 导致在GaAs表面上形成的任何天然氧化物膜进行选择性的Ga 2 O 3 O 3取代或形成。此后，将基板的温度调节至给定温度，以便在除了Ga 2 N 3 O 3取代以外的区域处实现自然氧化膜的剥离。根据分子束外延生长技术，在其自然氧化膜剥离侧的基板上进行III-V族化合物半导体晶体的选择性生长，从而实现基板密度的增加。实现了具有沿纳米级匀化的晶体生长方向的晶体膜厚度的电路图形的现场形成。

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