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1. 发明申请

US20140319539A1 SEMICONDUCTOR WAFER MANUFACTURING METHOD, AND SEMICONDUCTOR WAFER 有权
标题翻译：半导体制造方法和半导体波导
公开(公告)号：US20140319539A1
公开(公告)日：2014-10-30
申请号：US14240710
申请日：2012-08-24
申请人： Tadaaki Kaneko , Noboru Ohtani , Shoji Ushio , Ayumu Adachi , Satoru Nogami
发明人： Tadaaki Kaneko , Noboru Ohtani , Shoji Ushio , Ayumu Adachi , Satoru Nogami
IPC分类号： H01L21/02 , H01L29/16
CPC分类号： H01L21/02664 , C30B19/04 , C30B19/12 , C30B29/36 , H01L21/02378 , H01L21/0243 , H01L21/02447 , H01L21/02529 , H01L21/02625 , H01L21/02658 , H01L21/67109 , H01L29/1608
摘要： A method for manufacturing a semiconductor wafer includes a carbon layer formation step, a through hole formation step, a feed layer formation step, and an epitaxial layer formation step. In the carbon layer formation step, a carbon layer (71) is formed on a surface of a substrate (70) made of polycrystalline SiC. In the through hole formation step, through holes (71c) are formed in the carbon layer (71) formed on the substrate (70). In the feed layer formation step, a Si layer (72) and a 3C—SiC polycrystalline layer (73) are formed on a surface of the carbon layer (71). In the epitaxial layer formation step, the substrate (70) is heated so that a seed crystal made of 4H—SiC single crystal is formed on portions of the surface of the substrate (70) that are exposed through the through holes (71c), and a close-spaced liquid-phase epitaxial growth of the seed crystal is caused to form a 4H—SiC single crystal layer.
摘要翻译：制造半导体晶片的方法包括碳层形成步骤，通孔形成步骤，进料层形成步骤和外延层形成步骤。在碳层形成工序中，在由多晶SiC构成的基板（70）的表面上形成碳层（71）。在通孔形成工序中，在形成于基板（70）上的碳层（71）上形成通孔（71c）。在进料层形成步骤中，在碳层（71）的表面上形成Si层（72）和3C-SiC多晶层（73）。在外延层形成步骤中，加热衬底（70），使得在通过通孔（71c）暴露的衬底（70）的表面的部分上形成由4H-SiC单晶制成的晶种，并且引起晶种的紧密间隔的液相外延生长形成4H-SiC单晶层。

2. 发明授权

US09029219B2 Semiconductor wafer manufacturing method, and semiconductor wafer 有权
标题翻译：半导体晶片制造方法和半导体晶片
公开(公告)号：US09029219B2
公开(公告)日：2015-05-12
申请号：US14240710
申请日：2012-08-24
申请人： Tadaaki Kaneko , Noboru Ohtani , Shoji Ushio , Ayumu Adachi , Satoru Nogami
发明人： Tadaaki Kaneko , Noboru Ohtani , Shoji Ushio , Ayumu Adachi , Satoru Nogami
IPC分类号： H01L21/02 , C30B19/04 , C30B29/36 , H01L21/67 , C30B19/12 , H01L29/16
CPC分类号： H01L21/02664 , C30B19/04 , C30B19/12 , C30B29/36 , H01L21/02378 , H01L21/0243 , H01L21/02447 , H01L21/02529 , H01L21/02625 , H01L21/02658 , H01L21/67109 , H01L29/1608
摘要： A method for manufacturing a semiconductor wafer includes a carbon layer formation step, a through hole formation step, a feed layer formation step, and an epitaxial layer formation step. In the carbon layer formation step, a carbon layer (71) is formed on a surface of a substrate (70) made of polycrystalline SiC. In the through hole formation step, through holes (71c) are formed in the carbon layer (71) formed on the substrate (70). In the feed layer formation step, a Si layer (72) and a 3C—SiC polycrystalline layer (73) are formed on a surface of the carbon layer (71). In the epitaxial layer formation step, the substrate (70) is heated so that a seed crystal made of 4H—SiC single crystal is formed on portions of the surface of the substrate (70) that are exposed through the through holes (71c), and a close-spaced liquid-phase epitaxial growth of the seed crystal is caused to form a 4H—SiC single crystal layer.
摘要翻译：制造半导体晶片的方法包括碳层形成步骤，通孔形成步骤，进料层形成步骤和外延层形成步骤。在碳层形成工序中，在由多晶SiC构成的基板（70）的表面上形成碳层（71）。在通孔形成工序中，在形成于基板（70）上的碳层（71）上形成通孔（71c）。在进料层形成步骤中，在碳层（71）的表面上形成Si层（72）和3C-SiC多晶层（73）。在外延层形成步骤中，加热衬底（70），使得在通过通孔（71c）暴露的衬底（70）的表面的部分上形成由4H-SiC单晶制成的晶种，并且引起晶种的紧密间隔的液相外延生长形成4H-SiC单晶层。

3. 发明授权

US10012675B2 Nanometer standard prototype and method for manufacturing nanometer standard prototype 有权
公开(公告)号：US10012675B2
公开(公告)日：2018-07-03
申请号：US14357379
申请日：2011-11-11
申请人： Tadaaki Kaneko , Shoji Ushio
发明人： Tadaaki Kaneko , Shoji Ushio
IPC分类号： C30B29/36 , G01Q40/02 , C30B23/02 , C30B25/02 , H01L29/16 , C30B33/12 , H01L21/02
CPC分类号： G01Q40/02 , C30B23/02 , C30B25/02 , C30B29/36 , C30B33/12 , H01L21/02378 , H01L21/02529 , H01L29/1608
摘要： A standard sample (72) that is a nanometer standard prototype, having a standard length that serves as a length reference, includes a SiC layer in which a step-terrace structure is formed. The height of a step, used as the standard length, is equal to the height of a full unit that corresponds to one periodic of a stack of SiC molecules in a stack direction or equal to the height of a half unit that corresponds to one-half periodic of the stack of SiC molecules in the stack direction. In a microscope such as an STM to be measured in a high-temperature vacuum environment, heating in a vacuum furnace enables surface reconstruction with ordered atomic arrangement, while removing a natural oxide film from the surface, so that accuracy of the height of the step is not degraded. Accordingly, a standard sample usable under a high-temperature vacuum is achieved.

4. 发明申请

US20140317791A1 NANOMETER STANDARD PROTOTYPE AND METHOD FOR MANUFACTURING NANOMETER STANDARD PROTOTYPE 有权
标题翻译： NANOMETER标准原型及制造纳米标准原型的方法
公开(公告)号：US20140317791A1
公开(公告)日：2014-10-23
申请号：US14357379
申请日：2011-11-11
申请人： Tadaaki Kaneko , Shoji Ushio
发明人： Tadaaki Kaneko , Shoji Ushio
IPC分类号： G01Q40/02
CPC分类号： G01Q40/02 , C30B23/02 , C30B25/02 , C30B29/36 , C30B33/12 , H01L21/02378 , H01L21/02529 , H01L29/1608
摘要： A standard sample (72) that is a nanometer standard prototype, having a standard length that serves as a length reference, includes a SiC layer in which a step-terrace structure is formed. The height of a step, used as the standard length, is equal to the height of a full unit that corresponds to one periodic of a stack of SiC molecules in a stack direction or equal to the height of a half unit that corresponds to one-half periodic of the stack of SiC molecules in the stack direction. In a microscope such as an STM to be measured in a high-temperature vacuum environment, heating in a vacuum furnace enables surface reconstruction with ordered atomic arrangement, while removing a natural oxide film from the surface, so that accuracy of the height of the step is not degraded. Accordingly, a standard sample usable under a high-temperature vacuum is achieved.
摘要翻译：标准样品（72）是具有用作长度参考的标准长度的纳米标准样品，包括其中形成台阶式结构的SiC层。用作标准长度的台阶的高度等于对应于堆叠方向上的SiC分子堆叠的一个周期的整个单位的高度，或等于对应于单层的半单位的高度，堆叠方向的SiC分子堆的半周期。在要在高温真空环境中测量的STM等显微镜中，真空炉中的加热使得能够以有序的原子排列进行表面重构，同时从表面去除天然氧化膜，从而使步骤的高度精度没有退化因此，可以实现在高温真空下可使用的标准样品。

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