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1. 发明申请

WO1998027739A1 PARALLEL COMPRESSORS FOR RECOMPRESSION OF INTERLEAVED PIXEL DATA WITHIN AN MPEG DECODER 审中-公开
标题翻译：用于在MPEG解码器中恢复间隔像素数据的并行压缩器
公开(公告)号：WO1998027739A1
公开(公告)日：1998-06-25
申请号：PCT/US1997022845
申请日：1997-12-15
申请人： THOMSON CONSUMER ELECTRONICS, INC. , KRANAWETTER, Greg, Alan , SCHULTZ, Mark, Alan
发明人： THOMSON CONSUMER ELECTRONICS, INC.
IPC分类号： H04N07/50
CPC分类号： H03M7/40 , G06T9/007 , H04N5/4401 , H04N5/46 , H04N11/044 , H04N19/13 , H04N19/186 , H04N19/40 , H04N19/42 , H04N19/423 , H04N19/428 , H04N19/436 , H04N19/439 , H04N19/59 , H04N19/60 , H04N19/61 , H04N19/895 , H04N19/90 , H04N19/91 , H04N21/4305
摘要： An MPEG decoder (14, 18, 22) in a high definition television receiver decodes and decompresses MPEG coded data to produce decompressed image pixel blocks, and includes a motion compensation network (90...) coupled to a frame memory (60) to produce finally decoded pixel data for display. The decompressed MPEG data is recompressed by plural parallel recompressors (40, 42) prior to storage in frame memory. Each recompressor receives a datastream of interleaved pixel data (24, 27; Fig. 5), and predicts and compresses interleaved pixel values (a, c) during each clock cycle, respectively (Fig. 20, 27). One of the recompressors (42) is de-energized in a reduced data processing mode when pixel data is subsampled (36, 38) prior to recompression. Subsampled data is re-ordered (43) prior to recompression. Multiple parallel decompressors (80, 82, 84) coupled to the frame memory provide pixel data to the motion processing network. A control unit (356, 360, 364, Fig. 23) insures an uninterrupted interleaved data flow to the decompressors by repeating last valid data when source data is interrupted.
摘要翻译：高分辨率电视接收机中的MPEG解码器（14,18,22）对MPEG编码数据进行解码和解压缩以产生解压缩的图像像素块，并且包括耦合到帧存储器（60）的运动补偿网络（90 ...）产生最终解码的像素数据进行显示。解压缩的MPEG数据在存储在帧存储器中之前由多个并行的再压缩器（40,42）重新压缩。每个重新压缩器接收交织像素数据的数据流（24,27;图5），并且分别在每个时钟周期期间预测和压缩交织像素值（a，c）（图20,27）。当在再压缩之前对像素数据进行二次采样（36,38）时，其中一个再压缩器（42）在减小的数据处理模式中被断电。在重新压缩前重新排序（43）采样数据。耦合到帧存储器的多个并行解压缩器（80,82,84）向运动处理网络提供像素数据。当源数据被中断时，控制单元（356,360,364，图23）通过重复最后的有效数据来确保不间断的交错数据流到解压缩器。

2. 发明申请

WO1998027738A1 VIDEO DECODER WITH INTERLEAVED DATA PROCESSING 审中-公开
标题翻译：具有交互数据处理的视频解码器
公开(公告)号：WO1998027738A1
公开(公告)日：1998-06-25
申请号：PCT/US1997022831
申请日：1997-12-15
申请人： THOMSON CONSUMER ELECTRONICS, INC. , KRANAWETTER, Greg, Alan , SCHULTZ, Mark, Alan
发明人： THOMSON CONSUMER ELECTRONICS, INC.
IPC分类号： H04N07/50
CPC分类号： H03M7/40 , G06T9/007 , H04N5/4401 , H04N5/46 , H04N11/044 , H04N19/13 , H04N19/186 , H04N19/40 , H04N19/42 , H04N19/423 , H04N19/428 , H04N19/436 , H04N19/439 , H04N19/59 , H04N19/60 , H04N19/61 , H04N19/895 , H04N19/90 , H04N19/91 , H04N21/4305
摘要： An MPEG decoder (14, 18, 22) in a high definition television receiver decodes and decompresses MPEG coded data to produce decompressed image pixel blocks, and includes a motion compensation network (90...) coupled to a frame memory (60) to produce finally decoded pixel data for display. The decompressed MPEG data is recompressed by plural parallel recompressors (40, 42) prior to storage in frame memory. Each recompressor receives a datastream of interleaved pixel data (24, 27; Fig. 5), and predicts and compresses interleaved pixel values (a, c) during each clock cycle, respectively (Fig. 20, 27). One of the recompressors (42) is de-energized in a reduced data processing mode when pixel data is subsampled (36, 38) prior to recompression. Subsampled data is re-ordered (43) prior to recompression. Multiple parallel decompressors (80, 82, 84) coupled to the frame memory provide pixel data to the motion processing network. A control unit (356, 360, 364, Fig. 23) insures an uninterrupted interleaved data flow to the decompressors by repeating last valid data when source data is interrupted.
摘要翻译：高分辨率电视接收机中的MPEG解码器（14,18,22）对MPEG编码数据进行解码和解压缩以产生解压缩的图像像素块，并且包括耦合到帧存储器（60）的运动补偿网络（90 ...）产生最终解码的像素数据进行显示。解压缩的MPEG数据在存储在帧存储器中之前由多个并行的再压缩器（40,42）重新压缩。每个重新压缩器接收交织像素数据的数据流（24,27;图5），并且分别在每个时钟周期期间预测和压缩交织像素值（a，c）（图20,27）。当在再压缩之前对像素数据进行二次采样（36,38）时，其中一个再压缩器（42）在减小的数据处理模式中被断电。在重新压缩前重新排序（43）采样数据。耦合到帧存储器的多个并行解压缩器（80,82,84）向运动处理网络提供像素数据。当源数据被中断时，控制单元（356,360,364，图23）通过重复最后的有效数据来确保不间断的交错数据流到解压缩器。

3. 发明申请

WO1998027743A1 SELECTIVE COMPRESSION NETWORK IN AN MPEG COMPATIBLE DECODER 审中-公开
标题翻译： MPEG兼容解码器中的选择性压缩网络
公开(公告)号：WO1998027743A1
公开(公告)日：1998-06-25
申请号：PCT/US1997023075
申请日：1997-12-15
申请人： THOMSON CONSUMER ELECTRONICS, INC. , SCHULTZ, Mark, Alan , KRANAWETTER, Greg, Alan
发明人： THOMSON CONSUMER ELECTRONICS, INC.
IPC分类号： H04N07/50
CPC分类号： H03M7/40 , G06T9/007 , H04N5/4401 , H04N5/46 , H04N11/044 , H04N19/13 , H04N19/186 , H04N19/40 , H04N19/42 , H04N19/423 , H04N19/428 , H04N19/436 , H04N19/439 , H04N19/59 , H04N19/60 , H04N19/61 , H04N19/895 , H04N19/90 , H04N19/91 , H04N21/4305
摘要： An MPEG decoder (14, 18, 22) in a high definition television receiver decodes and decompresses MPEG coded data to produce decompressed image pixel blocks, and includes a motion compensation network (90, ...) coupled to a frame memory (60) to produce finally decoded pixel data for display. The decompressed MPEG data is recompressed by plural parallel recompressors (40, 42) prior to storage in frame memory. Each recompressor receives a datastream of interleaved pixel data (24, 27; Fig. 5), and predicts and compresses interleaved pixel values (a, c) during each clock cycle, respectively (Fig. 20, 27). One of the recompressors (42) is de-energized in a reduced data processing mode when pixel data is subsampled (36, 38) prior to recompression. Subsampled data is re-ordered (43) prior to recompression. Multiple parallel decompressors (80, 82, 84) coupled to the frame memory provide pixel data to the motion processing network. A control unit (356, 360, 364, Fig. 23) insures an uninterrupted interleaved data flow to the decompressors by repeating last valid data when source data is interrupted.
摘要翻译：高分辨率电视接收机中的MPEG解码器（14,18,22）对MPEG编码数据进行解码和解压缩以产生解压缩的图像像素块，并且包括耦合到帧存储器（60）的运动补偿网络（90，...）以产生用于显示的最终解码的像素数据。解压缩的MPEG数据在存储在帧存储器中之前由多个并行的再压缩器（40,42）重新压缩。每个再压缩器接收交错像素数据（24,27;图5）的数据流，并分别在每个时钟周期期间预测和压缩交错像素值（a，c）（图20,27）。当在再压缩之前对像素数据进行二次采样（36,38）时，其中一个再压缩器（42）在减小的数据处理模式中被断电。在重新压缩前重新排序（43）采样数据。耦合到帧存储器的多个并行解压缩器（80,82,84）向运动处理网络提供像素数据。当源数据被中断时，控制单元（356,360,364，图23）通过重复最后的有效数据来确保不间断的交错数据流到解压缩器。

4. 发明申请

WO1998027734A1 EFFICIENT FIXED-LENGTH BLOCK COMPRESSION AND DECOMPRESSION 审中-公开
标题翻译：有效的固定长度块压缩和解压缩
公开(公告)号：WO1998027734A1
公开(公告)日：1998-06-25
申请号：PCT/US1997017470
申请日：1997-09-30
申请人： THOMSON CONSUMER ELECTRONICS, INC. , KRANAWETTER, Greg, Alan , SCHULTZ, Mark, Alan
发明人： THOMSON CONSUMER ELECTRONICS, INC.
IPC分类号： H04N07/32
CPC分类号： H03M7/40 , G06T9/007 , H04N5/4401 , H04N5/46 , H04N11/044 , H04N19/13 , H04N19/186 , H04N19/40 , H04N19/42 , H04N19/423 , H04N19/428 , H04N19/436 , H04N19/439 , H04N19/59 , H04N19/60 , H04N19/61 , H04N19/895 , H04N19/90 , H04N19/91 , H04N21/4305
摘要： Compression and decompression apparatus and methods for producing fixed-length compressed data blocks with variable-length compression are described. The compression system receives and N-bit word from a data block (60) and determines the variable compression length for the word (62). A bit counter keeps track of the number of bits remaining (64) and determines if sufficient bits have been used to ensure that the fixed-length compressed data block will be filled (66). If so, the compressed word is output (70). If not, prior to output the compressed word is padded with an appropriate number of bits (68), which may be null bits.
摘要翻译：描述了用于产生具有可变长度压缩的固定长度压缩数据块的压缩和解压缩装置和方法。压缩系统从数据块（60）接收N位字，并确定字（62）的可变压缩长度。位计数器跟踪剩余的位数（64），并确定是否使用足够的位来确保固定长度的压缩数据块将被填充（66）。如果是，则输出压缩字（70）。如果不是，在输出之前，用适当数量的位（68）填充压缩字，其可以是空位。

5. 发明申请

WO1998027742A1 SYSTEM FOR MAINTAINING DATASTREAM CONTINUITY IN THE PRESENCE OF DISRUPTED SOURCE DATA 审中-公开
标题翻译：破坏源数据存在时保持数据连续性的系统
公开(公告)号：WO1998027742A1
公开(公告)日：1998-06-25
申请号：PCT/US1997022956
申请日：1997-12-15
申请人： THOMSON CONSUMER ELECTRONICS, INC. , SCHULTZ, Mark, Alan , KRANAWETTER, Greg, Alan
发明人： THOMSON CONSUMER ELECTRONICS, INC.
IPC分类号： H04N07/50
CPC分类号： H03M7/40 , G06T9/007 , H04N5/4401 , H04N5/46 , H04N11/044 , H04N19/13 , H04N19/186 , H04N19/40 , H04N19/42 , H04N19/423 , H04N19/428 , H04N19/436 , H04N19/439 , H04N19/59 , H04N19/60 , H04N19/61 , H04N19/895 , H04N19/90 , H04N19/91 , H04N21/4305
摘要： An MPEG decoder (14, 18, 22) in a high definition television receiver decodes and decompresses MPEG coded data to produce decompressed image pixel blocks, and includes a motion compensation network (90...) coupled to a frame memory (60) to produce finally decoded pixel data for display. The decompressed MPEG data is recompressed by plural parallel recompressors (40, 42) prior to storage in frame memory. Each recompressor receives a datastream of interleaved pixel data (24, 27; Fig. 5), and predicts and compresses interleaved pixel values (a, c) during each clock cycle, respectively (Fig. 20, 27). One of the recompressors (42) is de-energized in a reduced data processing mode when pixel data is subsampled (36, 38) prior to recompression. Subsampled data is re-ordered (43) prior to recompression. Multiple parallel decompressors (80, 82, 84) coupled to the frame memory provide pixel data to the motion processing network. A control unit (356, 360, 364, Fig. 23) insures an uninterrupted interleaved data flow to the decompressors by repeating last valid data when source data is interrupted.
摘要翻译：高分辨率电视接收机中的MPEG解码器（14,18,22）对MPEG编码数据进行解码和解压缩以产生解压缩的图像像素块，并且包括耦合到帧存储器（60）的运动补偿网络（90 ...）产生最终解码的像素数据进行显示。解压缩的MPEG数据在存储在帧存储器中之前由多个并行的再压缩器（40,42）重新压缩。每个重新压缩器接收交织像素数据的数据流（24,27;图5），并且分别在每个时钟周期期间预测和压缩交织像素值（a，c）（图20,27）。当在再压缩之前对像素数据进行二次采样（36,38）时，其中一个再压缩器（42）在减小的数据处理模式中被断电。在重新压缩前重新排序（43）采样数据。耦合到帧存储器的多个并行解压缩器（80,82,84）向运动处理网络提供像素数据。当源数据被中断时，控制单元（356,360,364，图23）通过重复最后的有效数据来确保不间断的交错数据流到解压缩器。

6. 发明申请

WO1998027737A1 FORMATTING OF RECOMPRESSED DATA IN AN MPEG DECODER 审中-公开
标题翻译：在MPEG解码器中格式化恢复数据
公开(公告)号：WO1998027737A1
公开(公告)日：1998-06-25
申请号：PCT/US1997022603
申请日：1997-12-15
申请人： THOMSON CONSUMER ELECTRONICS, INC. , SCHULTZ, Mark, Alan , KRANAWETTER, Greg, Alan
发明人： THOMSON CONSUMER ELECTRONICS, INC.
IPC分类号： H04N07/50
CPC分类号： H03M7/40 , G06T9/007 , H04N5/4401 , H04N5/46 , H04N11/044 , H04N19/13 , H04N19/186 , H04N19/40 , H04N19/42 , H04N19/423 , H04N19/428 , H04N19/436 , H04N19/439 , H04N19/59 , H04N19/60 , H04N19/61 , H04N19/895 , H04N19/90 , H04N19/91 , H04N21/4305
摘要： An MPEG decoder (14, 18, 22) in a high definition television receiver decodes and decompresses MPEG coded data to produce decompressed image pixel blocks, and includes a motion compensation network (90...) coupled to a frame memory (60) to produce finally decoded pixel data for display. The decompressed MPEG data is recompressed by plural parallel recompressors (40, 42) prior to storage in frame memory. Each recompressor receives a datastream of interleaved pixel data (24, 27; Fig. 5), and predicts and compresses interleaved pixel values (a, c) during each clock cycle, respectively (Fig. 20, 27). One of the recompressors (42) is de-energized in a reduced data processing mode when pixel data is subsampled (36, 38) prior to recompression. Subsampled data is re-ordered (43) prior to recompression. Multiple parallel decompressors (80, 82, 84) coupled to the frame memory provide pixel data to the motion processing network. A control unit (356, 360, 364, Fig. 23) insures an ininterrupted interleaved data flow to the decompressors by repeating last valid data when source data is interrupted.
摘要翻译：高分辨率电视接收机中的MPEG解码器（14,18,22）对MPEG编码数据进行解码和解压缩以产生解压缩的图像像素块，并且包括耦合到帧存储器（60）的运动补偿网络（90 ...）产生最终解码的像素数据进行显示。解压缩的MPEG数据在存储在帧存储器中之前由多个并行的再压缩器（40,42）重新压缩。每个重新压缩器接收交织像素数据的数据流（24,27;图5），并且分别在每个时钟周期期间预测和压缩交织像素值（a，c）（图20,27）。当在再压缩之前对像素数据进行二次采样（36,38）时，其中一个再压缩器（42）在减小的数据处理模式中被断电。在重新压缩前重新排序（43）采样数据。耦合到帧存储器的多个并行解压缩器（80,82,84）向运动处理网络提供像素数据。当源数据被中断时，控制单元（356,360,364，图23）通过重复最后的有效数据来确保中断的交错数据流到解压缩器。

7. 发明申请

WO1998027720A1 A MULTIPLE FORMAT VIDEO SIGNAL PROCESSOR 审中-公开
标题翻译：多种格式的视频信号处理器
公开(公告)号：WO1998027720A1
公开(公告)日：1998-06-25
申请号：PCT/US1997017512
申请日：1997-09-30
申请人： THOMSON CONSUMER ELECTRONICS, INC. , SCHULTZ, Mark, Alan , KRANAWETTER, Greg, Alan
发明人： THOMSON CONSUMER ELECTRONICS, INC.
IPC分类号： H04N05/44
CPC分类号： H03M7/40 , G06T9/007 , H04N5/4401 , H04N5/46 , H04N11/044 , H04N19/13 , H04N19/186 , H04N19/40 , H04N19/42 , H04N19/423 , H04N19/428 , H04N19/436 , H04N19/439 , H04N19/59 , H04N19/60 , H04N19/61 , H04N19/895 , H04N19/90 , H04N19/91 , H04N21/4305
摘要： A video decoder (10) capable of transcoding video data from various input formats to a predetermined output format is disclosed. Input data may be standard definition (NTSC or PAL) data or MPEG compressed data. Standard definition data are rearranged into block format to be compatible with the decoder's (10) single display processor (40). The display processor (40) includes a block-to-line converter (56, 58) and selectively processes and conveys either MPEG format data or non-MPEG format data to a display device. A block based memory (20) stores MPEG and non-MPEG pixel block data. The decoder is capable of receiving and displaying burst and non-continuous transmissions.
摘要翻译：公开了能够将视频数据从各种输入格式转码为预定输出格式的视频解码器（10）。输入数据可以是标准清晰度（NTSC或PAL）数据或MPEG压缩数据。标准清晰度数据被重新排列成块格式以与解码器（10）单显示处理器（40）兼容。显示处理器（40）包括一个一对一转换器（56,58），并选择性地将MPEG格式数据或非MPEG格式数据传送到显示设备。基于块的存储器（20）存储MPEG和非MPEG像素块数据。解码器能够接收和显示突发和非连续传输。

8. 发明申请

WO1998027741A1 PARALLEL DECODING OF INTERLEAVED DATA STREAMS WITHIN AN MPEG DECODER 审中-公开
标题翻译：在MPEG解码器中并行解码交互数据流
公开(公告)号：WO1998027741A1
公开(公告)日：1998-06-25
申请号：PCT/US1997022855
申请日：1997-12-15
申请人： THOMSON CONSUMER ELECTRONICS, INC. , KRANAWETTER, Greg, Alan , SCHULTZ, Mark, Alan
发明人： THOMSON CONSUMER ELECTRONICS, INC.
IPC分类号： H04N07/50
CPC分类号： H03M7/40 , G06T9/007 , H04N5/4401 , H04N5/46 , H04N11/044 , H04N19/13 , H04N19/186 , H04N19/40 , H04N19/42 , H04N19/423 , H04N19/428 , H04N19/436 , H04N19/439 , H04N19/59 , H04N19/60 , H04N19/61 , H04N19/895 , H04N19/90 , H04N19/91 , H04N21/4305
摘要： An MPEG decoder (14, 18, 22) in a high definition television receiver decodes and decompresses MPEG coded data to produce decompressed image pixel blocks, and includes a motion compensation network (90...) coupled to a frame memory (60) to produce finally decoded pixel data for display. The decompressed MPEG data is recompressed by plural parallel recompressors (40, 42) prior to storage in frame memory. Each recompressor receives a datastream of interleaved pixel data (24, 27, Fig. 5), and predicts and compresses interleaved pixel values (a, c) during each clock cycle, respectively (Fig. 20, 27). One of the recompressors (42) is de-energized in a reduced data processing mode when pixel data is subsampled (36, 38) prior to recompression. Subsampled data is re-ordered (43) prior to recompression. Multiple parallel decompressors (80, 82, 84) coupled to the frame memory provide pixel data to the motion processing network. A control unit (356, 360, 364, Fig. 23) insures an uninterrupted interleaved data flow to the decompressors by repeating last valid data when source data is interrupted.
摘要翻译：高分辨率电视接收机中的MPEG解码器（14,18,22）对MPEG编码数据进行解码和解压缩以产生解压缩的图像像素块，并且包括耦合到帧存储器（60）的运动补偿网络（90 ...）产生最终解码的像素数据进行显示。解压缩的MPEG数据在存储在帧存储器中之前由多个并行的再压缩器（40,42）重新压缩。每个重新压缩器接收交错像素数据的数据流（图27,24,27），并分别在每个时钟周期期间预测和压缩交错像素值（a，c）（图20,27）。当在再压缩之前对像素数据进行二次采样（36,38）时，其中一个再压缩器（42）在减小的数据处理模式中被断电。在重新压缩前重新排序（43）采样数据。耦合到帧存储器的多个并行解压缩器（80,82,84）向运动处理网络提供像素数据。当源数据被中断时，控制单元（356,360,364，图23）通过重复最后的有效数据来确保不间断的交错数据流到解压缩器。

9. 发明申请

WO1998027740A1 PARALLEL DECOMPRESSORS FOR RECOMPRESSED PIXEL DATA WITHIN AN MPEG DECODER 审中-公开
标题翻译：用于MPEG解码器中的恢复像素数据的并行解码器
公开(公告)号：WO1998027740A1
公开(公告)日：1998-06-25
申请号：PCT/US1997022853
申请日：1997-12-15
申请人： THOMSON CONSUMER ELECTRONICS, INC. , KRANAWETTER, Greg, Alan , SCHULTZ, Mark, Alan
发明人： THOMSON CONSUMER ELECTRONICS, INC.
IPC分类号： H04N07/50
CPC分类号： H03M7/40 , G06T9/007 , H04N5/4401 , H04N5/46 , H04N11/044 , H04N19/13 , H04N19/186 , H04N19/40 , H04N19/42 , H04N19/423 , H04N19/428 , H04N19/436 , H04N19/439 , H04N19/59 , H04N19/60 , H04N19/61 , H04N19/895 , H04N19/90 , H04N19/91 , H04N21/4305
摘要： An MPEG decoder (14, 18, 22) in a high definition television receiver decodes and decompresses MPEG coded data to produce decompressed image pixel blocks, and includes a motion compensation network (90...) coupled to a frame memory (60) to produce finally decoded pixel data for display. The decompressed MPEG data is recompressed by plural parallel recompressors (40, 42) prior to storage in frame memory. Each recompressor receives a datastream of interleaved pixel data (24, 27; Fig. 5), and predicts and compresses interleaved pixel values (a, c) during each clock cycle, respectively (Fig. 20, 27). One of the recompressors (42) is de-energized in a reduced data processing mode when pixel data is subsampled (36, 38) prior to recompression. Subsampled data is re-ordered (43) prior to recompression. Multiple parallel decompressors (80, 82, 84) coupled to the frame memory provide pixel data to the motion processing network. A control unit (356, 360, 364, Fig. 23) insures an uninterrupted interleaved data flow to the decompressors by repeating last valid data when source data is interrupted.
摘要翻译：高分辨率电视接收机中的MPEG解码器（14,18,22）对MPEG编码数据进行解码和解压缩以产生解压缩的图像像素块，并且包括耦合到帧存储器（60）的运动补偿网络（90 ...）产生最终解码的像素数据进行显示。解压缩的MPEG数据在存储在帧存储器中之前由多个并行的再压缩器（40,42）重新压缩。每个重新压缩器接收交织像素数据的数据流（24,27;图5），并且分别在每个时钟周期期间预测和压缩交织像素值（a，c）（图20,27）。当在再压缩之前对像素数据进行二次采样（36,38）时，其中一个再压缩器（42）在减小的数据处理模式中被断电。在重新压缩前重新排序（43）采样数据。耦合到帧存储器的多个并行解压缩器（80,82,84）向运动处理网络提供像素数据。当源数据被中断时，控制单元（356,360,364，图23）通过重复最后的有效数据来确保不间断的交错数据流到解压缩器。

10. 发明申请

WO1991019399A1 CHROMINANCE PROCESSING SYSTEM 审中-公开
标题翻译：色彩处理系统
公开(公告)号：WO1991019399A1
公开(公告)日：1991-12-12
申请号：PCT/US1991003813
申请日：1991-05-30
申请人： THOMSON CONSUMER ELECTRONICS, INC. , ERSOZ, Nathaniel, Haluk , SAEGER, Timothy, William , DOTY, James, Harrison, II , KRANAWETTER, Greg, Alan
发明人： THOMSON CONSUMER ELECTRONICS, INC.
IPC分类号： H04N11/06
CPC分类号： H04N9/641 , G06T3/0012 , G06T3/4007 , H04N3/223 , H04N3/227 , H04N3/27 , H04N5/2624 , H04N5/45 , H04N7/007 , H04N7/01 , H04N7/0105 , H04N7/0122 , H04N7/015 , H04N9/64 , H04N19/90
摘要： Video luminance data from a video signal is selectably compressed and expanded in a first signal path including a first line memory (356). A second line memory (358) in a parallel signal path processes video chrominance data from the video signal. A control circuit (320) generates respective timing signals for writing data into the line memories and for reading data from the line memories. A timing delay circuit (337) for the control means, has video compression and expansion modes of operation. During the compression mode, reading of the second line memory is delayed relative to writing of the second line memory. During said expansion mode, writing of the first line memory is delayed relative to writing of the second line memory or reading of the second line memory is delayed relative to writing of the second line memory. The duration of the timing delays can be selected from a range of values. The line memories are first in first out (FIFO) devices having independently enabled write and read ports.
摘要翻译：来自视频信号的视频亮度数据可选择地在包括第一行存储器（356）的第一信号路径中被压缩和扩展。并行信号路径中的第二行存储器（358）从视频信号处理视频色度数据。控制电路（320）产生用于将数据写入行存储器并用于从行存储器读取数据的相应定时信号。用于控制装置的定时延迟电路（337）具有视频压缩和扩展操作模式。在压缩模式期间，相对于第二行存储器的写入，第二行存储器的读取被延迟。在所述扩展模式期间，第一行存储器的写入相对于第二行存储器的写入而延迟，或者第二行存储器的读取相对于第二行存储器的写入而延迟。时间延迟的持续时间可以从值的范围中选择。行存储器是先进先出（FIFO）设备，具有独立使能的写和读端口。

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